* [U-Boot] [PATCH 0/8] ARMV7: Enhance support for OMAP4
@ 2010-07-21 19:25 Steve Sakoman
2010-07-21 19:25 ` [U-Boot] [PATCH 1/8] ARMV7: Add pad mux " Steve Sakoman
` (7 more replies)
0 siblings, 8 replies; 15+ messages in thread
From: Steve Sakoman @ 2010-07-21 19:25 UTC (permalink / raw)
To: u-boot
This patch series adds support for:
- pad mux initialization
- OMAP4 TWL6030 companion chip initialization
- usb driver and gadget support
It also fixes issues in the udelay implementation and the OMAP I2C
driver as well as tweaks the default environment.
These patches were tested on Panda and OMAP4430 SDP as well as on
the Gumstix Overo to verify that there were no regressions on OMAP3.
Steve Sakoman (9):
ARMV7: Add pad mux support for OMAP4
ARMV7: Fix udelay for OMAP4
ARMV7: Modify i2c driver for more reliable operation on OMAP4
ARMV7: Add support for the TWL6030 I2C power chip used in OMAP4
systems
ARMV7: Restructure omap3 musb driver to allow code sharing between
OMAP3 and OMAP4
ARMV7: Enable musb driver and usbtty on OMAP4430 SDP
ARMV7: Enable musb driver and usbtty on OMAP4 Panda
ARMV7: Update default environment for OMAP4 boards
arch/arm/cpu/armv7/omap-common/timer.c | 9 -
arch/arm/cpu/armv7/omap4/board.c | 11 +
arch/arm/include/asm/arch-omap3/cpu.h | 3 +
arch/arm/include/asm/arch-omap3/i2c.h | 4 +-
arch/arm/include/asm/arch-omap4/cpu.h | 3 +
arch/arm/include/asm/arch-omap4/mux_omap4.h | 344 +++++++++++++++++++++++++++
arch/arm/include/asm/arch-omap4/omap4.h | 2 +
board/ti/panda/panda.c | 27 ++
board/ti/panda/panda.h | 265 +++++++++++++++++++++
board/ti/sdp4430/sdp.c | 27 ++
board/ti/sdp4430/sdp.h | 265 +++++++++++++++++++++
drivers/i2c/omap24xx_i2c.c | 37 ++-
drivers/i2c/omap24xx_i2c.h | 4 +
drivers/power/Makefile | 1 +
drivers/power/twl6030.c | 77 ++++++
drivers/usb/musb/omap3.c | 16 ++
drivers/usb/musb/omap3.h | 3 +-
include/configs/omap4_panda.h | 28 ++-
include/configs/omap4_sdp4430.h | 28 ++-
include/twl6030.h | 90 +++++++
20 files changed, 1215 insertions(+), 29 deletions(-)
create mode 100644 arch/arm/include/asm/arch-omap4/mux_omap4.h
create mode 100644 board/ti/panda/panda.h
create mode 100644 board/ti/sdp4430/sdp.h
create mode 100644 drivers/power/twl6030.c
create mode 100644 include/twl6030.h
^ permalink raw reply [flat|nested] 15+ messages in thread* [U-Boot] [PATCH 1/8] ARMV7: Add pad mux support for OMAP4 2010-07-21 19:25 [U-Boot] [PATCH 0/8] ARMV7: Enhance support for OMAP4 Steve Sakoman @ 2010-07-21 19:25 ` Steve Sakoman 2010-07-21 19:25 ` [U-Boot] [PATCH 2/8] ARMV7: Fix udelay " Steve Sakoman ` (6 subsequent siblings) 7 siblings, 0 replies; 15+ messages in thread From: Steve Sakoman @ 2010-07-21 19:25 UTC (permalink / raw) To: u-boot Add functional multiplexing support for OMAP4 pads. Configure all the pads for the OMAP4430 SDP and OMAP4 Panda boards Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Aneesh V <aneesh@ti.com> --- arch/arm/cpu/armv7/omap4/board.c | 11 + arch/arm/include/asm/arch-omap4/mux_omap4.h | 344 +++++++++++++++++++++++++++ arch/arm/include/asm/arch-omap4/omap4.h | 2 + arch/arm/include/asm/arch-omap4/sys_proto.h | 1 + board/ti/panda/panda.c | 26 ++ board/ti/panda/panda.h | 265 +++++++++++++++++++++ board/ti/sdp4430/sdp.c | 26 ++ board/ti/sdp4430/sdp.h | 265 +++++++++++++++++++++ include/configs/omap4_panda.h | 1 + include/configs/omap4_sdp4430.h | 1 + 10 files changed, 942 insertions(+), 0 deletions(-) create mode 100644 arch/arm/include/asm/arch-omap4/mux_omap4.h create mode 100644 board/ti/panda/panda.h create mode 100644 board/ti/sdp4430/sdp.h diff --git a/arch/arm/cpu/armv7/omap4/board.c b/arch/arm/cpu/armv7/omap4/board.c index 5bf7173..2e80d1f 100644 --- a/arch/arm/cpu/armv7/omap4/board.c +++ b/arch/arm/cpu/armv7/omap4/board.c @@ -88,3 +88,14 @@ int checkboard(void) return 0; } +/* +* This function is called by start_armboot. You can reliably use static +* data. Any boot-time function that require static data should be +* called from here +*/ +int arch_cpu_init(void) +{ + set_muxconf_regs(); + return 0; +} + diff --git a/arch/arm/include/asm/arch-omap4/mux_omap4.h b/arch/arm/include/asm/arch-omap4/mux_omap4.h new file mode 100644 index 0000000..019574b --- /dev/null +++ b/arch/arm/include/asm/arch-omap4/mux_omap4.h @@ -0,0 +1,344 @@ +/* + * (C) Copyright 2004-2009 + * Texas Instruments Incorporated + * Richard Woodruff <r-woodruff2@ti.com> + * Aneesh V <aneesh@ti.com> + * Balaji Krishnamoorthy <balajitk@ti.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#ifndef _MUX_OMAP4_H_ +#define _MUX_OMAP4_H_ + +#include <asm/types.h> + +struct pad_conf_entry { + + u16 offset; + + u16 val; + +} __attribute__ ((packed)); + +#ifdef CONFIG_OFF_PADCONF +#define OFF_PD (1 << 12) +#define OFF_PU (3 << 12) +#define OFF_OUT_PTD (0 << 10) +#define OFF_OUT_PTU (2 << 10) +#define OFF_IN (1 << 10) +#define OFF_OUT (0 << 10) +#define OFF_EN (1 << 9) +#else +#define OFF_PD (0 << 12) +#define OFF_PU (0 << 12) +#define OFF_OUT_PTD (0 << 10) +#define OFF_OUT_PTU (0 << 10) +#define OFF_IN (0 << 10) +#define OFF_OUT (0 << 10) +#define OFF_EN (0 << 9) +#endif + +#define IEN (1 << 8) +#define IDIS (0 << 8) +#define PTU (3 << 3) +#define PTD (1 << 3) +#define EN (1 << 3) +#define DIS (0 << 3) + +#define M0 0 +#define M1 1 +#define M2 2 +#define M3 3 +#define M4 4 +#define M5 5 +#define M6 6 +#define M7 7 + +#define SAFE_MODE M7 + +#ifdef CONFIG_OFF_PADCONF +#define OFF_IN_PD (OFF_PD | OFF_IN | OFF_EN) +#define OFF_IN_PU (OFF_PU | OFF_IN | OFF_EN) +#define OFF_OUT_PD (OFF_OUT_PTD | OFF_OUT | OFF_EN) +#define OFF_OUT_PU (OFF_OUT_PTU | OFF_OUT | OFF_EN) +#else +#define OFF_IN_PD 0 +#define OFF_IN_PU 0 +#define OFF_OUT_PD 0 +#define OFF_OUT_PU 0 +#endif + +#define CORE_REVISION 0x0000 +#define CORE_HWINFO 0x0004 +#define CORE_SYSCONFIG 0x0010 +#define GPMC_AD0 0x0040 +#define GPMC_AD1 0x0042 +#define GPMC_AD2 0x0044 +#define GPMC_AD3 0x0046 +#define GPMC_AD4 0x0048 +#define GPMC_AD5 0x004A +#define GPMC_AD6 0x004C +#define GPMC_AD7 0x004E +#define GPMC_AD8 0x0050 +#define GPMC_AD9 0x0052 +#define GPMC_AD10 0x0054 +#define GPMC_AD11 0x0056 +#define GPMC_AD12 0x0058 +#define GPMC_AD13 0x005A +#define GPMC_AD14 0x005C +#define GPMC_AD15 0x005E +#define GPMC_A16 0x0060 +#define GPMC_A17 0x0062 +#define GPMC_A18 0x0064 +#define GPMC_A19 0x0066 +#define GPMC_A20 0x0068 +#define GPMC_A21 0x006A +#define GPMC_A22 0x006C +#define GPMC_A23 0x006E +#define GPMC_A24 0x0070 +#define GPMC_A25 0x0072 +#define GPMC_NCS0 0x0074 +#define GPMC_NCS1 0x0076 +#define GPMC_NCS2 0x0078 +#define GPMC_NCS3 0x007A +#define GPMC_NWP 0x007C +#define GPMC_CLK 0x007E +#define GPMC_NADV_ALE 0x0080 +#define GPMC_NOE 0x0082 +#define GPMC_NWE 0x0084 +#define GPMC_NBE0_CLE 0x0086 +#define GPMC_NBE1 0x0088 +#define GPMC_WAIT0 0x008A +#define GPMC_WAIT1 0x008C +#define C2C_DATA11 0x008E +#define C2C_DATA12 0x0090 +#define C2C_DATA13 0x0092 +#define C2C_DATA14 0x0094 +#define C2C_DATA15 0x0096 +#define HDMI_HPD 0x0098 +#define HDMI_CEC 0x009A +#define HDMI_DDC_SCL 0x009C +#define HDMI_DDC_SDA 0x009E +#define CSI21_DX0 0x00A0 +#define CSI21_DY0 0x00A2 +#define CSI21_DX1 0x00A4 +#define CSI21_DY1 0x00A6 +#define CSI21_DX2 0x00A8 +#define CSI21_DY2 0x00AA +#define CSI21_DX3 0x00AC +#define CSI21_DY3 0x00AE +#define CSI21_DX4 0x00B0 +#define CSI21_DY4 0x00B2 +#define CSI22_DX0 0x00B4 +#define CSI22_DY0 0x00B6 +#define CSI22_DX1 0x00B8 +#define CSI22_DY1 0x00BA +#define CAM_SHUTTER 0x00BC +#define CAM_STROBE 0x00BE +#define CAM_GLOBALRESET 0x00C0 +#define USBB1_ULPITLL_CLK 0x00C2 +#define USBB1_ULPITLL_STP 0x00C4 +#define USBB1_ULPITLL_DIR 0x00C6 +#define USBB1_ULPITLL_NXT 0x00C8 +#define USBB1_ULPITLL_DAT0 0x00CA +#define USBB1_ULPITLL_DAT1 0x00CC +#define USBB1_ULPITLL_DAT2 0x00CE +#define USBB1_ULPITLL_DAT3 0x00D0 +#define USBB1_ULPITLL_DAT4 0x00D2 +#define USBB1_ULPITLL_DAT5 0x00D4 +#define USBB1_ULPITLL_DAT6 0x00D6 +#define USBB1_ULPITLL_DAT7 0x00D8 +#define USBB1_HSIC_DATA 0x00DA +#define USBB1_HSIC_STROBE 0x00DC +#define USBC1_ICUSB_DP 0x00DE +#define USBC1_ICUSB_DM 0x00E0 +#define SDMMC1_CLK 0x00E2 +#define SDMMC1_CMD 0x00E4 +#define SDMMC1_DAT0 0x00E6 +#define SDMMC1_DAT1 0x00E8 +#define SDMMC1_DAT2 0x00EA +#define SDMMC1_DAT3 0x00EC +#define SDMMC1_DAT4 0x00EE +#define SDMMC1_DAT5 0x00F0 +#define SDMMC1_DAT6 0x00F2 +#define SDMMC1_DAT7 0x00F4 +#define ABE_MCBSP2_CLKX 0x00F6 +#define ABE_MCBSP2_DR 0x00F8 +#define ABE_MCBSP2_DX 0x00FA +#define ABE_MCBSP2_FSX 0x00FC +#define ABE_MCBSP1_CLKX 0x00FE +#define ABE_MCBSP1_DR 0x0100 +#define ABE_MCBSP1_DX 0x0102 +#define ABE_MCBSP1_FSX 0x0104 +#define ABE_PDM_UL_DATA 0x0106 +#define ABE_PDM_DL_DATA 0x0108 +#define ABE_PDM_FRAME 0x010A +#define ABE_PDM_LB_CLK 0x010C +#define ABE_CLKS 0x010E +#define ABE_DMIC_CLK1 0x0110 +#define ABE_DMIC_DIN1 0x0112 +#define ABE_DMIC_DIN2 0x0114 +#define ABE_DMIC_DIN3 0x0116 +#define UART2_CTS 0x0118 +#define UART2_RTS 0x011A +#define UART2_RX 0x011C +#define UART2_TX 0x011E +#define HDQ_SIO 0x0120 +#define I2C1_SCL 0x0122 +#define I2C1_SDA 0x0124 +#define I2C2_SCL 0x0126 +#define I2C2_SDA 0x0128 +#define I2C3_SCL 0x012A +#define I2C3_SDA 0x012C +#define I2C4_SCL 0x012E +#define I2C4_SDA 0x0130 +#define MCSPI1_CLK 0x0132 +#define MCSPI1_SOMI 0x0134 +#define MCSPI1_SIMO 0x0136 +#define MCSPI1_CS0 0x0138 +#define MCSPI1_CS1 0x013A +#define MCSPI1_CS2 0x013C +#define MCSPI1_CS3 0x013E +#define UART3_CTS_RCTX 0x0140 +#define UART3_RTS_SD 0x0142 +#define UART3_RX_IRRX 0x0144 +#define UART3_TX_IRTX 0x0146 +#define SDMMC5_CLK 0x0148 +#define SDMMC5_CMD 0x014A +#define SDMMC5_DAT0 0x014C +#define SDMMC5_DAT1 0x014E +#define SDMMC5_DAT2 0x0150 +#define SDMMC5_DAT3 0x0152 +#define MCSPI4_CLK 0x0154 +#define MCSPI4_SIMO 0x0156 +#define MCSPI4_SOMI 0x0158 +#define MCSPI4_CS0 0x015A +#define UART4_RX 0x015C +#define UART4_TX 0x015E +#define USBB2_ULPITLL_CLK 0x0160 +#define USBB2_ULPITLL_STP 0x0162 +#define USBB2_ULPITLL_DIR 0x0164 +#define USBB2_ULPITLL_NXT 0x0166 +#define USBB2_ULPITLL_DAT0 0x0168 +#define USBB2_ULPITLL_DAT1 0x016A +#define USBB2_ULPITLL_DAT2 0x016C +#define USBB2_ULPITLL_DAT3 0x016E +#define USBB2_ULPITLL_DAT4 0x0170 +#define USBB2_ULPITLL_DAT5 0x0172 +#define USBB2_ULPITLL_DAT6 0x0174 +#define USBB2_ULPITLL_DAT7 0x0176 +#define USBB2_HSIC_DATA 0x0178 +#define USBB2_HSIC_STROBE 0x017A +#define UNIPRO_TX0 0x017C +#define UNIPRO_TY0 0x017E +#define UNIPRO_TX1 0x0180 +#define UNIPRO_TY1 0x0182 +#define UNIPRO_TX2 0x0184 +#define UNIPRO_TY2 0x0186 +#define UNIPRO_RX0 0x0188 +#define UNIPRO_RY0 0x018A +#define UNIPRO_RX1 0x018C +#define UNIPRO_RY1 0x018E +#define UNIPRO_RX2 0x0190 +#define UNIPRO_RY2 0x0192 +#define USBA0_OTG_CE 0x0194 +#define USBA0_OTG_DP 0x0196 +#define USBA0_OTG_DM 0x0198 +#define FREF_CLK1_OUT 0x019A +#define FREF_CLK2_OUT 0x019C +#define SYS_NIRQ1 0x019E +#define SYS_NIRQ2 0x01A0 +#define SYS_BOOT0 0x01A2 +#define SYS_BOOT1 0x01A4 +#define SYS_BOOT2 0x01A6 +#define SYS_BOOT3 0x01A8 +#define SYS_BOOT4 0x01AA +#define SYS_BOOT5 0x01AC +#define DPM_EMU0 0x01AE +#define DPM_EMU1 0x01B0 +#define DPM_EMU2 0x01B2 +#define DPM_EMU3 0x01B4 +#define DPM_EMU4 0x01B6 +#define DPM_EMU5 0x01B8 +#define DPM_EMU6 0x01BA +#define DPM_EMU7 0x01BC +#define DPM_EMU8 0x01BE +#define DPM_EMU9 0x01C0 +#define DPM_EMU10 0x01C2 +#define DPM_EMU11 0x01C4 +#define DPM_EMU12 0x01C6 +#define DPM_EMU13 0x01C8 +#define DPM_EMU14 0x01CA +#define DPM_EMU15 0x01CC +#define DPM_EMU16 0x01CE +#define DPM_EMU17 0x01D0 +#define DPM_EMU18 0x01D2 +#define DPM_EMU19 0x01D4 +#define WAKEUPEVENT_0 0x01D8 +#define WAKEUPEVENT_1 0x01DC +#define WAKEUPEVENT_2 0x01E0 +#define WAKEUPEVENT_3 0x01E4 +#define WAKEUPEVENT_4 0x01E8 +#define WAKEUPEVENT_5 0x01EC +#define WAKEUPEVENT_6 0x01F0 + +#define WKUP_REVISION 0x0000 +#define WKUP_HWINFO 0x0004 +#define WKUP_SYSCONFIG 0x0010 +#define PAD0_SIM_IO 0x0040 +#define PAD1_SIM_CLK 0x0042 +#define PAD0_SIM_RESET 0x0044 +#define PAD1_SIM_CD 0x0046 +#define PAD0_SIM_PWRCTRL 0x0048 +#define PAD1_SR_SCL 0x004A +#define PAD0_SR_SDA 0x004C +#define PAD1_FREF_XTAL_IN 0x004E +#define PAD0_FREF_SLICER_IN 0x0050 +#define PAD1_FREF_CLK_IOREQ 0x0052 +#define PAD0_FREF_CLK0_OUT 0x0054 +#define PAD1_FREF_CLK3_REQ 0x0056 +#define PAD0_FREF_CLK3_OUT 0x0058 +#define PAD1_FREF_CLK4_REQ 0x005A +#define PAD0_FREF_CLK4_OUT 0x005C +#define PAD1_SYS_32K 0x005E +#define PAD0_SYS_NRESPWRON 0x0060 +#define PAD1_SYS_NRESWARM 0x0062 +#define PAD0_SYS_PWR_REQ 0x0064 +#define PAD1_SYS_PWRON_RESET 0x0066 +#define PAD0_SYS_BOOT6 0x0068 +#define PAD1_SYS_BOOT7 0x006A +#define PAD0_JTAG_NTRST 0x006C +#define PAD1_JTAG_TCK 0x006D +#define PAD0_JTAG_RTCK 0x0070 +#define PAD1_JTAG_TMS_TMSC 0x0072 +#define PAD0_JTAG_TDI 0x0074 +#define PAD1_JTAG_TDO 0x0076 +#define PADCONF_WAKEUPEVENT_0 0x007C +#define CONTROL_SMART1NOPMIO_PADCONF_0 0x05A0 +#define CONTROL_SMART1NOPMIO_PADCONF_1 0x05A4 +#define PADCONF_MODE 0x05A8 +#define CONTROL_XTAL_OSCILLATOR 0x05AC +#define CONTROL_CONTROL_I2C_2 0x0604 +#define CONTROL_CONTROL_JTAG 0x0608 +#define CONTROL_CONTROL_SYS 0x060C +#define CONTROL_SPARE_RW 0x0614 +#define CONTROL_SPARE_R 0x0618 +#define CONTROL_SPARE_R_C0 0x061C + +#endif /* _MUX_OMAP4_H_ */ diff --git a/arch/arm/include/asm/arch-omap4/omap4.h b/arch/arm/include/asm/arch-omap4/omap4.h index 5243ea8..79ff22c 100644 --- a/arch/arm/include/asm/arch-omap4/omap4.h +++ b/arch/arm/include/asm/arch-omap4/omap4.h @@ -44,6 +44,8 @@ /* CONTROL */ #define CTRL_BASE (OMAP44XX_L4_CORE_BASE + 0x2000) +#define CONTROL_PADCONF_CORE (OMAP44XX_L4_CORE_BASE + 0x100000) +#define CONTROL_PADCONF_WKUP (OMAP44XX_L4_CORE_BASE + 0x31E000) /* UART */ #define UART1_BASE (OMAP44XX_L4_PER_BASE + 0x6a000) diff --git a/arch/arm/include/asm/arch-omap4/sys_proto.h b/arch/arm/include/asm/arch-omap4/sys_proto.h index c6fab00..ad0c640 100644 --- a/arch/arm/include/asm/arch-omap4/sys_proto.h +++ b/arch/arm/include/asm/arch-omap4/sys_proto.h @@ -32,6 +32,7 @@ void gpmc_init(void); void watchdog_init(void); u32 get_device_type(void); void invalidate_dcache(u32); +void set_muxconf_regs(void); extern const struct omap_sysinfo sysinfo; diff --git a/board/ti/panda/panda.c b/board/ti/panda/panda.c index 917bbec..1b8153b 100644 --- a/board/ti/panda/panda.c +++ b/board/ti/panda/panda.c @@ -24,6 +24,8 @@ #include <common.h> #include <asm/arch/sys_proto.h> +#include "panda.h" + DECLARE_GLOBAL_DATA_PTR; const struct omap_sysinfo sysinfo = { @@ -61,3 +63,27 @@ int misc_init_r(void) { return 0; } + +void do_set_mux(u32 base, struct pad_conf_entry const *array, int size) +{ + int i; + struct pad_conf_entry *pad = (struct pad_conf_entry *) array; + + for (i = 0; i < size; i++, pad++) + writew(pad->val, base + pad->offset); +} + +/** + * @brief set_muxconf_regs Setting up the configuration Mux registers + * specific to the board. + */ +void set_muxconf_regs(void) +{ + do_set_mux(CONTROL_PADCONF_CORE, core_padconf_array, + sizeof(core_padconf_array) / + sizeof(struct pad_conf_entry)); + + do_set_mux(CONTROL_PADCONF_WKUP, wkup_padconf_array, + sizeof(wkup_padconf_array) / + sizeof(struct pad_conf_entry)); +} diff --git a/board/ti/panda/panda.h b/board/ti/panda/panda.h new file mode 100644 index 0000000..8f6a6b1 --- /dev/null +++ b/board/ti/panda/panda.h @@ -0,0 +1,265 @@ +/* + * (C) Copyright 2010 + * Texas Instruments Incorporated, <www.ti.com> + * + * Balaji Krishnamoorthy <balajitk@ti.com> + * Aneesh V <aneesh@ti.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _PANDA_H_ +#define _PANDA_H_ + +#include <asm/io.h> +#include <asm/arch/mux_omap4.h> + +const struct pad_conf_entry core_padconf_array[] = { + {GPMC_AD0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat0 */ + {GPMC_AD1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat1 */ + {GPMC_AD2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat2 */ + {GPMC_AD3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat3 */ + {GPMC_AD4, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat4 */ + {GPMC_AD5, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat5 */ + {GPMC_AD6, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat6 */ + {GPMC_AD7, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat7 */ + {GPMC_AD8, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M3)}, /* gpio_32 */ + {GPMC_AD9, (PTU | IEN | M3)}, /* gpio_33 */ + {GPMC_AD10, (PTU | IEN | M3)}, /* gpio_34 */ + {GPMC_AD11, (PTU | IEN | M3)}, /* gpio_35 */ + {GPMC_AD12, (PTU | IEN | M3)}, /* gpio_36 */ + {GPMC_AD13, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)}, /* gpio_37 */ + {GPMC_AD14, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)}, /* gpio_38 */ + {GPMC_AD15, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)}, /* gpio_39 */ + {GPMC_A16, (M3)}, /* gpio_40 */ + {GPMC_A17, (PTD | M3)}, /* gpio_41 */ + {GPMC_A18, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row6 */ + {GPMC_A19, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row7 */ + {GPMC_A20, (IEN | M3)}, /* gpio_44 */ + {GPMC_A21, (M3)}, /* gpio_45 */ + {GPMC_A22, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col6 */ + {GPMC_A23, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col7 */ + {GPMC_A24, (PTD | M3)}, /* gpio_48 */ + {GPMC_A25, (PTD | M3)}, /* gpio_49 */ + {GPMC_NCS0, (M3)}, /* gpio_50 */ + {GPMC_NCS1, (IEN | M3)}, /* gpio_51 */ + {GPMC_NCS2, (IEN | M3)}, /* gpio_52 */ + {GPMC_NCS3, (IEN | M3)}, /* gpio_53 */ + {GPMC_NWP, (M3)}, /* gpio_54 */ + {GPMC_CLK, (PTD | M3)}, /* gpio_55 */ + {GPMC_NADV_ALE, (M3)}, /* gpio_56 */ + {GPMC_NOE, (PTU | IEN | OFF_EN | OFF_OUT_PTD | M1)}, /* sdmmc2_clk */ + {GPMC_NWE, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_cmd */ + {GPMC_NBE0_CLE, (M3)}, /* gpio_59 */ + {GPMC_NBE1, (PTD | M3)}, /* gpio_60 */ + {GPMC_WAIT0, (PTU | IEN | M3)}, /* gpio_61 */ + {GPMC_WAIT1, (IEN | M3)}, /* gpio_62 */ + {C2C_DATA11, (PTD | M3)}, /* gpio_100 */ + {C2C_DATA12, (M1)}, /* dsi1_te0 */ + {C2C_DATA13, (PTD | M3)}, /* gpio_102 */ + {C2C_DATA14, (M1)}, /* dsi2_te0 */ + {C2C_DATA15, (PTD | M3)}, /* gpio_104 */ + {HDMI_HPD, (M0)}, /* hdmi_hpd */ + {HDMI_CEC, (M0)}, /* hdmi_cec */ + {HDMI_DDC_SCL, (PTU | M0)}, /* hdmi_ddc_scl */ + {HDMI_DDC_SDA, (PTU | IEN | M0)}, /* hdmi_ddc_sda */ + {CSI21_DX0, (IEN | M0)}, /* csi21_dx0 */ + {CSI21_DY0, (IEN | M0)}, /* csi21_dy0 */ + {CSI21_DX1, (IEN | M0)}, /* csi21_dx1 */ + {CSI21_DY1, (IEN | M0)}, /* csi21_dy1 */ + {CSI21_DX2, (IEN | M0)}, /* csi21_dx2 */ + {CSI21_DY2, (IEN | M0)}, /* csi21_dy2 */ + {CSI21_DX3, (PTD | M7)}, /* csi21_dx3 */ + {CSI21_DY3, (PTD | M7)}, /* csi21_dy3 */ + {CSI21_DX4, (PTD | OFF_EN | OFF_PD | OFF_IN | M7)}, /* csi21_dx4 */ + {CSI21_DY4, (PTD | OFF_EN | OFF_PD | OFF_IN | M7)}, /* csi21_dy4 */ + {CSI22_DX0, (IEN | M0)}, /* csi22_dx0 */ + {CSI22_DY0, (IEN | M0)}, /* csi22_dy0 */ + {CSI22_DX1, (IEN | M0)}, /* csi22_dx1 */ + {CSI22_DY1, (IEN | M0)}, /* csi22_dy1 */ + {CAM_SHUTTER, (OFF_EN | OFF_PD | OFF_OUT_PTD | M0)}, /* cam_shutter */ + {CAM_STROBE, (OFF_EN | OFF_PD | OFF_OUT_PTD | M0)}, /* cam_strobe */ + {CAM_GLOBALRESET, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)}, /* gpio_83 */ + {USBB1_ULPITLL_CLK, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M4)},/* usbb1_ulpiphy_clk */ + {USBB1_ULPITLL_STP, (OFF_EN | OFF_OUT_PTD | M4)}, /* usbb1_ulpiphy_stp */ + {USBB1_ULPITLL_DIR, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dir */ + {USBB1_ULPITLL_NXT, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_nxt */ + {USBB1_ULPITLL_DAT0, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat0 */ + {USBB1_ULPITLL_DAT1, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat1 */ + {USBB1_ULPITLL_DAT2, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat2 */ + {USBB1_ULPITLL_DAT3, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat3 */ + {USBB1_ULPITLL_DAT4, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat4 */ + {USBB1_ULPITLL_DAT5, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat5 */ + {USBB1_ULPITLL_DAT6, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat6 */ + {USBB1_ULPITLL_DAT7, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat7 */ + {USBB1_HSIC_DATA, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usbb1_hsic_data */ + {USBB1_HSIC_STROBE, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usbb1_hsic_strobe */ + {USBC1_ICUSB_DP, (IEN | M0)}, /* usbc1_icusb_dp */ + {USBC1_ICUSB_DM, (IEN | M0)}, /* usbc1_icusb_dm */ + {SDMMC1_CLK, (PTU | OFF_EN | OFF_OUT_PTD | M0)}, /* sdmmc1_clk */ + {SDMMC1_CMD, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_cmd */ + {SDMMC1_DAT0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat0 */ + {SDMMC1_DAT1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat1 */ + {SDMMC1_DAT2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat2 */ + {SDMMC1_DAT3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat3 */ + {SDMMC1_DAT4, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat4 */ + {SDMMC1_DAT5, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat5 */ + {SDMMC1_DAT6, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat6 */ + {SDMMC1_DAT7, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat7 */ + {ABE_MCBSP2_CLKX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_mcbsp2_clkx */ + {ABE_MCBSP2_DR, (IEN | OFF_EN | OFF_OUT_PTD | M0)}, /* abe_mcbsp2_dr */ + {ABE_MCBSP2_DX, (OFF_EN | OFF_OUT_PTD | M0)}, /* abe_mcbsp2_dx */ + {ABE_MCBSP2_FSX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_mcbsp2_fsx */ + {ABE_MCBSP1_CLKX, (IEN | M1)}, /* abe_slimbus1_clock */ + {ABE_MCBSP1_DR, (IEN | M1)}, /* abe_slimbus1_data */ + {ABE_MCBSP1_DX, (OFF_EN | OFF_OUT_PTD | M0)}, /* abe_mcbsp1_dx */ + {ABE_MCBSP1_FSX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_mcbsp1_fsx */ + {ABE_PDM_UL_DATA, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_pdm_ul_data */ + {ABE_PDM_DL_DATA, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_pdm_dl_data */ + {ABE_PDM_FRAME, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_pdm_frame */ + {ABE_PDM_LB_CLK, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_pdm_lb_clk */ + {ABE_CLKS, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_clks */ + {ABE_DMIC_CLK1, (M0)}, /* abe_dmic_clk1 */ + {ABE_DMIC_DIN1, (IEN | M0)}, /* abe_dmic_din1 */ + {ABE_DMIC_DIN2, (IEN | M0)}, /* abe_dmic_din2 */ + {ABE_DMIC_DIN3, (IEN | M0)}, /* abe_dmic_din3 */ + {UART2_CTS, (PTU | IEN | M0)}, /* uart2_cts */ + {UART2_RTS, (M0)}, /* uart2_rts */ + {UART2_RX, (PTU | IEN | M0)}, /* uart2_rx */ + {UART2_TX, (M0)}, /* uart2_tx */ + {HDQ_SIO, (M3)}, /* gpio_127 */ + {I2C1_SCL, (PTU | IEN | M0)}, /* i2c1_scl */ + {I2C1_SDA, (PTU | IEN | M0)}, /* i2c1_sda */ + {I2C2_SCL, (PTU | IEN | M0)}, /* i2c2_scl */ + {I2C2_SDA, (PTU | IEN | M0)}, /* i2c2_sda */ + {I2C3_SCL, (PTU | IEN | M0)}, /* i2c3_scl */ + {I2C3_SDA, (PTU | IEN | M0)}, /* i2c3_sda */ + {I2C4_SCL, (PTU | IEN | M0)}, /* i2c4_scl */ + {I2C4_SDA, (PTU | IEN | M0)}, /* i2c4_sda */ + {MCSPI1_CLK, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_clk */ + {MCSPI1_SOMI, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_somi */ + {MCSPI1_SIMO, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_simo */ + {MCSPI1_CS0, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_cs0 */ + {MCSPI1_CS1, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M3)}, /* mcspi1_cs1 */ + {MCSPI1_CS2, (PTU | OFF_EN | OFF_OUT_PTU | M3)}, /* gpio_139 */ + {MCSPI1_CS3, (PTU | IEN | M3)}, /* gpio_140 */ + {UART3_CTS_RCTX, (PTU | IEN | M0)}, /* uart3_tx */ + {UART3_RTS_SD, (M0)}, /* uart3_rts_sd */ + {UART3_RX_IRRX, (IEN | M0)}, /* uart3_rx */ + {UART3_TX_IRTX, (M0)}, /* uart3_tx */ + {SDMMC5_CLK, (PTU | IEN | OFF_EN | OFF_OUT_PTD | M0)}, /* sdmmc5_clk */ + {SDMMC5_CMD, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc5_cmd */ + {SDMMC5_DAT0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc5_dat0 */ + {SDMMC5_DAT1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc5_dat1 */ + {SDMMC5_DAT2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc5_dat2 */ + {SDMMC5_DAT3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc5_dat3 */ + {MCSPI4_CLK, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi4_clk */ + {MCSPI4_SIMO, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi4_simo */ + {MCSPI4_SOMI, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi4_somi */ + {MCSPI4_CS0, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi4_cs0 */ + {UART4_RX, (IEN | M0)}, /* uart4_rx */ + {UART4_TX, (M0)}, /* uart4_tx */ + {USBB2_ULPITLL_CLK, (IEN | M3)}, /* gpio_157 */ + {USBB2_ULPITLL_STP, (IEN | M5)}, /* dispc2_data23 */ + {USBB2_ULPITLL_DIR, (IEN | M5)}, /* dispc2_data22 */ + {USBB2_ULPITLL_NXT, (IEN | M5)}, /* dispc2_data21 */ + {USBB2_ULPITLL_DAT0, (IEN | M5)}, /* dispc2_data20 */ + {USBB2_ULPITLL_DAT1, (IEN | M5)}, /* dispc2_data19 */ + {USBB2_ULPITLL_DAT2, (IEN | M5)}, /* dispc2_data18 */ + {USBB2_ULPITLL_DAT3, (IEN | M5)}, /* dispc2_data15 */ + {USBB2_ULPITLL_DAT4, (IEN | M5)}, /* dispc2_data14 */ + {USBB2_ULPITLL_DAT5, (IEN | M5)}, /* dispc2_data13 */ + {USBB2_ULPITLL_DAT6, (IEN | M5)}, /* dispc2_data12 */ + {USBB2_ULPITLL_DAT7, (IEN | M5)}, /* dispc2_data11 */ + {USBB2_HSIC_DATA, (PTD | OFF_EN | OFF_OUT_PTU | M3)}, /* gpio_169 */ + {USBB2_HSIC_STROBE, (PTD | OFF_EN | OFF_OUT_PTU | M3)}, /* gpio_170 */ + {UNIPRO_TX0, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col0 */ + {UNIPRO_TY0, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col1 */ + {UNIPRO_TX1, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col2 */ + {UNIPRO_TY1, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col3 */ + {UNIPRO_TX2, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M3)}, /* gpio_0 */ + {UNIPRO_TY2, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M3)}, /* gpio_1 */ + {UNIPRO_RX0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row0 */ + {UNIPRO_RY0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row1 */ + {UNIPRO_RX1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row2 */ + {UNIPRO_RY1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row3 */ + {UNIPRO_RX2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row4 */ + {UNIPRO_RY2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row5 */ + {USBA0_OTG_CE, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M0)}, /* usba0_otg_ce */ + {USBA0_OTG_DP, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usba0_otg_dp */ + {USBA0_OTG_DM, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usba0_otg_dm */ + {FREF_CLK1_OUT, (M0)}, /* fref_clk1_out */ + {FREF_CLK2_OUT, (M0)}, /* fref_clk2_out */ + {SYS_NIRQ1, (PTU | IEN | M0)}, /* sys_nirq1 */ + {SYS_NIRQ2, (PTU | IEN | M0)}, /* sys_nirq2 */ + {SYS_BOOT0, (PTU | IEN | M3)}, /* gpio_184 */ + {SYS_BOOT1, (M3)}, /* gpio_185 */ + {SYS_BOOT2, (PTD | IEN | M3)}, /* gpio_186 */ + {SYS_BOOT3, (M3)}, /* gpio_187 */ + {SYS_BOOT4, (M3)}, /* gpio_188 */ + {SYS_BOOT5, (PTD | IEN | M3)}, /* gpio_189 */ + {DPM_EMU0, (IEN | M0)}, /* dpm_emu0 */ + {DPM_EMU1, (IEN | M0)}, /* dpm_emu1 */ + {DPM_EMU2, (IEN | M0)}, /* dpm_emu2 */ + {DPM_EMU3, (IEN | M5)}, /* dispc2_data10 */ + {DPM_EMU4, (IEN | M5)}, /* dispc2_data9 */ + {DPM_EMU5, (IEN | M5)}, /* dispc2_data16 */ + {DPM_EMU6, (IEN | M5)}, /* dispc2_data17 */ + {DPM_EMU7, (IEN | M5)}, /* dispc2_hsync */ + {DPM_EMU8, (IEN | M5)}, /* dispc2_pclk */ + {DPM_EMU9, (IEN | M5)}, /* dispc2_vsync */ + {DPM_EMU10, (IEN | M5)}, /* dispc2_de */ + {DPM_EMU11, (IEN | M5)}, /* dispc2_data8 */ + {DPM_EMU12, (IEN | M5)}, /* dispc2_data7 */ + {DPM_EMU13, (IEN | M5)}, /* dispc2_data6 */ + {DPM_EMU14, (IEN | M5)}, /* dispc2_data5 */ + {DPM_EMU15, (IEN | M5)}, /* dispc2_data4 */ + {DPM_EMU16, (IEN | M5)}, /* dispc2_data3 */ + {DPM_EMU17, (IEN | M5)}, /* dispc2_data2 */ + {DPM_EMU18, (IEN | M5)}, /* dispc2_data1 */ + {DPM_EMU19, (IEN | M5)}, /* dispc2_data0 */ +}; + +const struct pad_conf_entry wkup_padconf_array[] = { + {PAD0_SIM_IO, (IEN | M0)}, /* sim_io */ + {PAD1_SIM_CLK, (M0)}, /* sim_clk */ + {PAD0_SIM_RESET, (M0)}, /* sim_reset */ + {PAD1_SIM_CD, (PTU | IEN | M0)}, /* sim_cd */ + {PAD0_SIM_PWRCTRL, (M0)}, /* sim_pwrctrl */ + {PAD1_SR_SCL, (PTU | IEN | M0)}, /* sr_scl */ + {PAD0_SR_SDA, (PTU | IEN | M0)}, /* sr_sda */ + {PAD1_FREF_XTAL_IN, (M0)}, /* # */ + {PAD0_FREF_SLICER_IN, (M0)}, /* fref_slicer_in */ + {PAD1_FREF_CLK_IOREQ, (M0)}, /* fref_clk_ioreq */ + {PAD0_FREF_CLK0_OUT, (M2)}, /* sys_drm_msecure */ + {PAD1_FREF_CLK3_REQ, (PTU | IEN | M0)}, /* # */ + {PAD0_FREF_CLK3_OUT, (M0)}, /* fref_clk3_out */ + {PAD1_FREF_CLK4_REQ, (PTU | IEN | M0)}, /* # */ + {PAD0_FREF_CLK4_OUT, (M0)}, /* # */ + {PAD1_SYS_32K, (IEN | M0)}, /* sys_32k */ + {PAD0_SYS_NRESPWRON, (M0)}, /* sys_nrespwron */ + {PAD1_SYS_NRESWARM, (M0)}, /* sys_nreswarm */ + {PAD0_SYS_PWR_REQ, (PTU | M0)}, /* sys_pwr_req */ + {PAD1_SYS_PWRON_RESET, (M3)}, /* gpio_wk29 */ + {PAD0_SYS_BOOT6, (IEN | M3)}, /* gpio_wk9 */ + {PAD1_SYS_BOOT7, (IEN | M3)}, /* gpio_wk10 */ +}; + +#endif + diff --git a/board/ti/sdp4430/sdp.c b/board/ti/sdp4430/sdp.c index 8ed7873..7039bd5 100644 --- a/board/ti/sdp4430/sdp.c +++ b/board/ti/sdp4430/sdp.c @@ -25,6 +25,8 @@ #include <common.h> #include <asm/arch/sys_proto.h> +#include "sdp.h" + DECLARE_GLOBAL_DATA_PTR; const struct omap_sysinfo sysinfo = { @@ -62,3 +64,27 @@ int misc_init_r(void) { return 0; } + +void do_set_mux(u32 base, struct pad_conf_entry const *array, int size) +{ + int i; + struct pad_conf_entry *pad = (struct pad_conf_entry *) array; + + for (i = 0; i < size; i++, pad++) + writew(pad->val, base + pad->offset); +} + +/** + * @brief set_muxconf_regs Setting up the configuration Mux registers + * specific to the board. + */ +void set_muxconf_regs(void) +{ + do_set_mux(CONTROL_PADCONF_CORE, core_padconf_array, + sizeof(core_padconf_array) / + sizeof(struct pad_conf_entry)); + + do_set_mux(CONTROL_PADCONF_WKUP, wkup_padconf_array, + sizeof(wkup_padconf_array) / + sizeof(struct pad_conf_entry)); +} diff --git a/board/ti/sdp4430/sdp.h b/board/ti/sdp4430/sdp.h new file mode 100644 index 0000000..803e3d3 --- /dev/null +++ b/board/ti/sdp4430/sdp.h @@ -0,0 +1,265 @@ +/* + * (C) Copyright 2010 + * Texas Instruments Incorporated, <www.ti.com> + * + * Balaji Krishnamoorthy <balajitk@ti.com> + * Aneesh V <aneesh@ti.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _SDP_H_ +#define _SDP_H_ + +#include <asm/io.h> +#include <asm/arch/mux_omap4.h> + +const struct pad_conf_entry core_padconf_array[] = { + {GPMC_AD0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat0 */ + {GPMC_AD1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat1 */ + {GPMC_AD2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat2 */ + {GPMC_AD3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat3 */ + {GPMC_AD4, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat4 */ + {GPMC_AD5, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat5 */ + {GPMC_AD6, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat6 */ + {GPMC_AD7, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat7 */ + {GPMC_AD8, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M3)}, /* gpio_32 */ + {GPMC_AD9, (PTU | IEN | M3)}, /* gpio_33 */ + {GPMC_AD10, (PTU | IEN | M3)}, /* gpio_34 */ + {GPMC_AD11, (PTU | IEN | M3)}, /* gpio_35 */ + {GPMC_AD12, (PTU | IEN | M3)}, /* gpio_36 */ + {GPMC_AD13, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)}, /* gpio_37 */ + {GPMC_AD14, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)}, /* gpio_38 */ + {GPMC_AD15, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)}, /* gpio_39 */ + {GPMC_A16, (M3)}, /* gpio_40 */ + {GPMC_A17, (PTD | M3)}, /* gpio_41 */ + {GPMC_A18, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row6 */ + {GPMC_A19, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row7 */ + {GPMC_A20, (IEN | M3)}, /* gpio_44 */ + {GPMC_A21, (M3)}, /* gpio_45 */ + {GPMC_A22, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col6 */ + {GPMC_A23, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col7 */ + {GPMC_A24, (PTD | M3)}, /* gpio_48 */ + {GPMC_A25, (PTD | M3)}, /* gpio_49 */ + {GPMC_NCS0, (M3)}, /* gpio_50 */ + {GPMC_NCS1, (IEN | M3)}, /* gpio_51 */ + {GPMC_NCS2, (IEN | M3)}, /* gpio_52 */ + {GPMC_NCS3, (IEN | M3)}, /* gpio_53 */ + {GPMC_NWP, (M3)}, /* gpio_54 */ + {GPMC_CLK, (PTD | M3)}, /* gpio_55 */ + {GPMC_NADV_ALE, (M3)}, /* gpio_56 */ + {GPMC_NOE, (PTU | IEN | OFF_EN | OFF_OUT_PTD | M1)}, /* sdmmc2_clk */ + {GPMC_NWE, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_cmd */ + {GPMC_NBE0_CLE, (M3)}, /* gpio_59 */ + {GPMC_NBE1, (PTD | M3)}, /* gpio_60 */ + {GPMC_WAIT0, (PTU | IEN | M3)}, /* gpio_61 */ + {GPMC_WAIT1, (IEN | M3)}, /* gpio_62 */ + {C2C_DATA11, (PTD | M3)}, /* gpio_100 */ + {C2C_DATA12, (M1)}, /* dsi1_te0 */ + {C2C_DATA13, (PTD | M3)}, /* gpio_102 */ + {C2C_DATA14, (M1)}, /* dsi2_te0 */ + {C2C_DATA15, (PTD | M3)}, /* gpio_104 */ + {HDMI_HPD, (M0)}, /* hdmi_hpd */ + {HDMI_CEC, (M0)}, /* hdmi_cec */ + {HDMI_DDC_SCL, (PTU | M0)}, /* hdmi_ddc_scl */ + {HDMI_DDC_SDA, (PTU | IEN | M0)}, /* hdmi_ddc_sda */ + {CSI21_DX0, (IEN | M0)}, /* csi21_dx0 */ + {CSI21_DY0, (IEN | M0)}, /* csi21_dy0 */ + {CSI21_DX1, (IEN | M0)}, /* csi21_dx1 */ + {CSI21_DY1, (IEN | M0)}, /* csi21_dy1 */ + {CSI21_DX2, (IEN | M0)}, /* csi21_dx2 */ + {CSI21_DY2, (IEN | M0)}, /* csi21_dy2 */ + {CSI21_DX3, (PTD | M7)}, /* csi21_dx3 */ + {CSI21_DY3, (PTD | M7)}, /* csi21_dy3 */ + {CSI21_DX4, (PTD | OFF_EN | OFF_PD | OFF_IN | M7)}, /* csi21_dx4 */ + {CSI21_DY4, (PTD | OFF_EN | OFF_PD | OFF_IN | M7)}, /* csi21_dy4 */ + {CSI22_DX0, (IEN | M0)}, /* csi22_dx0 */ + {CSI22_DY0, (IEN | M0)}, /* csi22_dy0 */ + {CSI22_DX1, (IEN | M0)}, /* csi22_dx1 */ + {CSI22_DY1, (IEN | M0)}, /* csi22_dy1 */ + {CAM_SHUTTER, (OFF_EN | OFF_PD | OFF_OUT_PTD | M0)}, /* cam_shutter */ + {CAM_STROBE, (OFF_EN | OFF_PD | OFF_OUT_PTD | M0)}, /* cam_strobe */ + {CAM_GLOBALRESET, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)}, /* gpio_83 */ + {USBB1_ULPITLL_CLK, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M4)},/* usbb1_ulpiphy_clk */ + {USBB1_ULPITLL_STP, (OFF_EN | OFF_OUT_PTD | M4)}, /* usbb1_ulpiphy_stp */ + {USBB1_ULPITLL_DIR, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dir */ + {USBB1_ULPITLL_NXT, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_nxt */ + {USBB1_ULPITLL_DAT0, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat0 */ + {USBB1_ULPITLL_DAT1, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat1 */ + {USBB1_ULPITLL_DAT2, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat2 */ + {USBB1_ULPITLL_DAT3, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat3 */ + {USBB1_ULPITLL_DAT4, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat4 */ + {USBB1_ULPITLL_DAT5, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat5 */ + {USBB1_ULPITLL_DAT6, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat6 */ + {USBB1_ULPITLL_DAT7, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat7 */ + {USBB1_HSIC_DATA, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usbb1_hsic_data */ + {USBB1_HSIC_STROBE, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usbb1_hsic_strobe */ + {USBC1_ICUSB_DP, (IEN | M0)}, /* usbc1_icusb_dp */ + {USBC1_ICUSB_DM, (IEN | M0)}, /* usbc1_icusb_dm */ + {SDMMC1_CLK, (PTU | OFF_EN | OFF_OUT_PTD | M0)}, /* sdmmc1_clk */ + {SDMMC1_CMD, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_cmd */ + {SDMMC1_DAT0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat0 */ + {SDMMC1_DAT1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat1 */ + {SDMMC1_DAT2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat2 */ + {SDMMC1_DAT3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat3 */ + {SDMMC1_DAT4, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat4 */ + {SDMMC1_DAT5, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat5 */ + {SDMMC1_DAT6, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat6 */ + {SDMMC1_DAT7, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat7 */ + {ABE_MCBSP2_CLKX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_mcbsp2_clkx */ + {ABE_MCBSP2_DR, (IEN | OFF_EN | OFF_OUT_PTD | M0)}, /* abe_mcbsp2_dr */ + {ABE_MCBSP2_DX, (OFF_EN | OFF_OUT_PTD | M0)}, /* abe_mcbsp2_dx */ + {ABE_MCBSP2_FSX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_mcbsp2_fsx */ + {ABE_MCBSP1_CLKX, (IEN | M1)}, /* abe_slimbus1_clock */ + {ABE_MCBSP1_DR, (IEN | M1)}, /* abe_slimbus1_data */ + {ABE_MCBSP1_DX, (OFF_EN | OFF_OUT_PTD | M0)}, /* abe_mcbsp1_dx */ + {ABE_MCBSP1_FSX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_mcbsp1_fsx */ + {ABE_PDM_UL_DATA, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_pdm_ul_data */ + {ABE_PDM_DL_DATA, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_pdm_dl_data */ + {ABE_PDM_FRAME, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_pdm_frame */ + {ABE_PDM_LB_CLK, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_pdm_lb_clk */ + {ABE_CLKS, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_clks */ + {ABE_DMIC_CLK1, (M0)}, /* abe_dmic_clk1 */ + {ABE_DMIC_DIN1, (IEN | M0)}, /* abe_dmic_din1 */ + {ABE_DMIC_DIN2, (IEN | M0)}, /* abe_dmic_din2 */ + {ABE_DMIC_DIN3, (IEN | M0)}, /* abe_dmic_din3 */ + {UART2_CTS, (PTU | IEN | M0)}, /* uart2_cts */ + {UART2_RTS, (M0)}, /* uart2_rts */ + {UART2_RX, (PTU | IEN | M0)}, /* uart2_rx */ + {UART2_TX, (M0)}, /* uart2_tx */ + {HDQ_SIO, (M3)}, /* gpio_127 */ + {I2C1_SCL, (PTU | IEN | M0)}, /* i2c1_scl */ + {I2C1_SDA, (PTU | IEN | M0)}, /* i2c1_sda */ + {I2C2_SCL, (PTU | IEN | M0)}, /* i2c2_scl */ + {I2C2_SDA, (PTU | IEN | M0)}, /* i2c2_sda */ + {I2C3_SCL, (PTU | IEN | M0)}, /* i2c3_scl */ + {I2C3_SDA, (PTU | IEN | M0)}, /* i2c3_sda */ + {I2C4_SCL, (PTU | IEN | M0)}, /* i2c4_scl */ + {I2C4_SDA, (PTU | IEN | M0)}, /* i2c4_sda */ + {MCSPI1_CLK, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_clk */ + {MCSPI1_SOMI, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_somi */ + {MCSPI1_SIMO, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_simo */ + {MCSPI1_CS0, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_cs0 */ + {MCSPI1_CS1, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M3)}, /* mcspi1_cs1 */ + {MCSPI1_CS2, (PTU | OFF_EN | OFF_OUT_PTU | M3)}, /* gpio_139 */ + {MCSPI1_CS3, (PTU | IEN | M3)}, /* gpio_140 */ + {UART3_CTS_RCTX, (PTU | IEN | M0)}, /* uart3_tx */ + {UART3_RTS_SD, (M0)}, /* uart3_rts_sd */ + {UART3_RX_IRRX, (IEN | M0)}, /* uart3_rx */ + {UART3_TX_IRTX, (M0)}, /* uart3_tx */ + {SDMMC5_CLK, (PTU | IEN | OFF_EN | OFF_OUT_PTD | M0)}, /* sdmmc5_clk */ + {SDMMC5_CMD, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc5_cmd */ + {SDMMC5_DAT0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc5_dat0 */ + {SDMMC5_DAT1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc5_dat1 */ + {SDMMC5_DAT2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc5_dat2 */ + {SDMMC5_DAT3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc5_dat3 */ + {MCSPI4_CLK, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi4_clk */ + {MCSPI4_SIMO, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi4_simo */ + {MCSPI4_SOMI, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi4_somi */ + {MCSPI4_CS0, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi4_cs0 */ + {UART4_RX, (IEN | M0)}, /* uart4_rx */ + {UART4_TX, (M0)}, /* uart4_tx */ + {USBB2_ULPITLL_CLK, (IEN | M3)}, /* gpio_157 */ + {USBB2_ULPITLL_STP, (IEN | M5)}, /* dispc2_data23 */ + {USBB2_ULPITLL_DIR, (IEN | M5)}, /* dispc2_data22 */ + {USBB2_ULPITLL_NXT, (IEN | M5)}, /* dispc2_data21 */ + {USBB2_ULPITLL_DAT0, (IEN | M5)}, /* dispc2_data20 */ + {USBB2_ULPITLL_DAT1, (IEN | M5)}, /* dispc2_data19 */ + {USBB2_ULPITLL_DAT2, (IEN | M5)}, /* dispc2_data18 */ + {USBB2_ULPITLL_DAT3, (IEN | M5)}, /* dispc2_data15 */ + {USBB2_ULPITLL_DAT4, (IEN | M5)}, /* dispc2_data14 */ + {USBB2_ULPITLL_DAT5, (IEN | M5)}, /* dispc2_data13 */ + {USBB2_ULPITLL_DAT6, (IEN | M5)}, /* dispc2_data12 */ + {USBB2_ULPITLL_DAT7, (IEN | M5)}, /* dispc2_data11 */ + {USBB2_HSIC_DATA, (PTD | OFF_EN | OFF_OUT_PTU | M3)}, /* gpio_169 */ + {USBB2_HSIC_STROBE, (PTD | OFF_EN | OFF_OUT_PTU | M3)}, /* gpio_170 */ + {UNIPRO_TX0, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col0 */ + {UNIPRO_TY0, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col1 */ + {UNIPRO_TX1, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col2 */ + {UNIPRO_TY1, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col3 */ + {UNIPRO_TX2, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col4 */ + {UNIPRO_TY2, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col5 */ + {UNIPRO_RX0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row0 */ + {UNIPRO_RY0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row1 */ + {UNIPRO_RX1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row2 */ + {UNIPRO_RY1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row3 */ + {UNIPRO_RX2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row4 */ + {UNIPRO_RY2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row5 */ + {USBA0_OTG_CE, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M0)}, /* usba0_otg_ce */ + {USBA0_OTG_DP, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usba0_otg_dp */ + {USBA0_OTG_DM, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usba0_otg_dm */ + {FREF_CLK1_OUT, (M0)}, /* fref_clk1_out */ + {FREF_CLK2_OUT, (M0)}, /* fref_clk2_out */ + {SYS_NIRQ1, (PTU | IEN | M0)}, /* sys_nirq1 */ + {SYS_NIRQ2, (PTU | IEN | M0)}, /* sys_nirq2 */ + {SYS_BOOT0, (PTU | IEN | M3)}, /* gpio_184 */ + {SYS_BOOT1, (M3)}, /* gpio_185 */ + {SYS_BOOT2, (PTD | IEN | M3)}, /* gpio_186 */ + {SYS_BOOT3, (M3)}, /* gpio_187 */ + {SYS_BOOT4, (M3)}, /* gpio_188 */ + {SYS_BOOT5, (PTD | IEN | M3)}, /* gpio_189 */ + {DPM_EMU0, (IEN | M0)}, /* dpm_emu0 */ + {DPM_EMU1, (IEN | M0)}, /* dpm_emu1 */ + {DPM_EMU2, (IEN | M0)}, /* dpm_emu2 */ + {DPM_EMU3, (IEN | M5)}, /* dispc2_data10 */ + {DPM_EMU4, (IEN | M5)}, /* dispc2_data9 */ + {DPM_EMU5, (IEN | M5)}, /* dispc2_data16 */ + {DPM_EMU6, (IEN | M5)}, /* dispc2_data17 */ + {DPM_EMU7, (IEN | M5)}, /* dispc2_hsync */ + {DPM_EMU8, (IEN | M5)}, /* dispc2_pclk */ + {DPM_EMU9, (IEN | M5)}, /* dispc2_vsync */ + {DPM_EMU10, (IEN | M5)}, /* dispc2_de */ + {DPM_EMU11, (IEN | M5)}, /* dispc2_data8 */ + {DPM_EMU12, (IEN | M5)}, /* dispc2_data7 */ + {DPM_EMU13, (IEN | M5)}, /* dispc2_data6 */ + {DPM_EMU14, (IEN | M5)}, /* dispc2_data5 */ + {DPM_EMU15, (IEN | M5)}, /* dispc2_data4 */ + {DPM_EMU16, (M3)}, /* gpio_27 */ + {DPM_EMU17, (IEN | M5)}, /* dispc2_data2 */ + {DPM_EMU18, (IEN | M5)}, /* dispc2_data1 */ + {DPM_EMU19, (IEN | M5)}, /* dispc2_data0 */ +}; + +const struct pad_conf_entry wkup_padconf_array[] = { + {PAD0_SIM_IO, (IEN | M0)}, /* sim_io */ + {PAD1_SIM_CLK, (M0)}, /* sim_clk */ + {PAD0_SIM_RESET, (M0)}, /* sim_reset */ + {PAD1_SIM_CD, (PTU | IEN | M0)}, /* sim_cd */ + {PAD0_SIM_PWRCTRL, (M0)}, /* sim_pwrctrl */ + {PAD1_SR_SCL, (PTU | IEN | M0)}, /* sr_scl */ + {PAD0_SR_SDA, (PTU | IEN | M0)}, /* sr_sda */ + {PAD1_FREF_XTAL_IN, (M0)}, /* # */ + {PAD0_FREF_SLICER_IN, (M0)}, /* fref_slicer_in */ + {PAD1_FREF_CLK_IOREQ, (M0)}, /* fref_clk_ioreq */ + {PAD0_FREF_CLK0_OUT, (M2)}, /* sys_drm_msecure */ + {PAD1_FREF_CLK3_REQ, (PTU | IEN | M0)}, /* # */ + {PAD0_FREF_CLK3_OUT, (M0)}, /* fref_clk3_out */ + {PAD1_FREF_CLK4_REQ, (PTU | IEN | M0)}, /* # */ + {PAD0_FREF_CLK4_OUT, (M0)}, /* # */ + {PAD1_SYS_32K, (IEN | M0)}, /* sys_32k */ + {PAD0_SYS_NRESPWRON, (M0)}, /* sys_nrespwron */ + {PAD1_SYS_NRESWARM, (M0)}, /* sys_nreswarm */ + {PAD0_SYS_PWR_REQ, (PTU | M0)}, /* sys_pwr_req */ + {PAD1_SYS_PWRON_RESET, (M3)}, /* gpio_wk29 */ + {PAD0_SYS_BOOT6, (IEN | M3)}, /* gpio_wk9 */ + {PAD1_SYS_BOOT7, (IEN | M3)}, /* gpio_wk10 */ +}; + +#endif + diff --git a/include/configs/omap4_panda.h b/include/configs/omap4_panda.h index b1e40a3..0c5ef7b 100644 --- a/include/configs/omap4_panda.h +++ b/include/configs/omap4_panda.h @@ -35,6 +35,7 @@ #define CONFIG_OMAP44XX 1 /* which is a 44XX */ #define CONFIG_OMAP4430 1 /* which is in a 4430 */ #define CONFIG_PANDA 1 /* working with Panda */ +#define CONFIG_ARCH_CPU_INIT /* Get CPU defs */ #include <asm/arch/cpu.h> diff --git a/include/configs/omap4_sdp4430.h b/include/configs/omap4_sdp4430.h index 8121554..ede7691 100644 --- a/include/configs/omap4_sdp4430.h +++ b/include/configs/omap4_sdp4430.h @@ -36,6 +36,7 @@ #define CONFIG_OMAP44XX 1 /* which is a 44XX */ #define CONFIG_OMAP4430 1 /* which is in a 4430 */ #define CONFIG_4430SDP 1 /* working with SDP */ +#define CONFIG_ARCH_CPU_INIT /* Get CPU defs */ #include <asm/arch/cpu.h> -- 1.7.0.4 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [U-Boot] [PATCH 2/8] ARMV7: Fix udelay for OMAP4 2010-07-21 19:25 [U-Boot] [PATCH 0/8] ARMV7: Enhance support for OMAP4 Steve Sakoman 2010-07-21 19:25 ` [U-Boot] [PATCH 1/8] ARMV7: Add pad mux " Steve Sakoman @ 2010-07-21 19:25 ` Steve Sakoman 2010-07-21 19:25 ` [U-Boot] [PATCH 3/8] ARMV7: Modify i2c driver for more reliable operation on OMAP4 Steve Sakoman ` (5 subsequent siblings) 7 siblings, 0 replies; 15+ messages in thread From: Steve Sakoman @ 2010-07-21 19:25 UTC (permalink / raw) To: u-boot The OMAP4 x-load code sets gptimer1 clock source to 32Khz. This isn't acceptable for udelay. This patch changes from gptimer1 to gptimer2, which uses sys_clk at 38.4 Mhz. Signed-off-by: Steve Sakoman <steve@sakoman.com> --- arch/arm/cpu/armv7/omap-common/timer.c | 9 --------- include/configs/omap4_panda.h | 2 +- include/configs/omap4_sdp4430.h | 2 +- 3 files changed, 2 insertions(+), 11 deletions(-) diff --git a/arch/arm/cpu/armv7/omap-common/timer.c b/arch/arm/cpu/armv7/omap-common/timer.c index 69e285f..6b8cf7b 100644 --- a/arch/arm/cpu/armv7/omap-common/timer.c +++ b/arch/arm/cpu/armv7/omap-common/timer.c @@ -41,12 +41,8 @@ static struct gptimer *timer_base = (struct gptimer *)CONFIG_SYS_TIMERBASE; /* * Nothing really to do with interrupts, just starts up a counter. - * We run the counter with 13MHz, divided by 8, resulting in timer - * frequency of 1.625MHz. With 32bit counter register, counter - * overflows in ~44min */ -/* 13MHz / 8 = 1.625MHz */ #define TIMER_CLOCK (V_SCLK / (2 << CONFIG_SYS_PTV)) #define TIMER_LOAD_VAL 0xffffffff @@ -84,11 +80,6 @@ void set_timer(ulong t) /* delay x useconds */ void __udelay(unsigned long usec) { -#if defined(CONFIG_OMAP44XX) - /* TODO temporary hack until OMAP4 clock setup routines are present */ - if (usec > 1000) - usec = usec/1000; -#endif long tmo = usec * (TIMER_CLOCK / 1000) / 1000; unsigned long now, last = readl(&timer_base->tcrr); diff --git a/include/configs/omap4_panda.h b/include/configs/omap4_panda.h index 0c5ef7b..0fb1ad3 100644 --- a/include/configs/omap4_panda.h +++ b/include/configs/omap4_panda.h @@ -196,7 +196,7 @@ #define CONFIG_SYS_LOAD_ADDR 0x80000000 /* Use General purpose timer 1 */ -#define CONFIG_SYS_TIMERBASE GPT1_BASE +#define CONFIG_SYS_TIMERBASE GPT2_BASE #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/omap4_sdp4430.h b/include/configs/omap4_sdp4430.h index ede7691..ef5272b 100644 --- a/include/configs/omap4_sdp4430.h +++ b/include/configs/omap4_sdp4430.h @@ -197,7 +197,7 @@ #define CONFIG_SYS_LOAD_ADDR 0x80000000 /* Use General purpose timer 1 */ -#define CONFIG_SYS_TIMERBASE GPT1_BASE +#define CONFIG_SYS_TIMERBASE GPT2_BASE #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ #define CONFIG_SYS_HZ 1000 -- 1.7.0.4 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [U-Boot] [PATCH 3/8] ARMV7: Modify i2c driver for more reliable operation on OMAP4 2010-07-21 19:25 [U-Boot] [PATCH 0/8] ARMV7: Enhance support for OMAP4 Steve Sakoman 2010-07-21 19:25 ` [U-Boot] [PATCH 1/8] ARMV7: Add pad mux " Steve Sakoman 2010-07-21 19:25 ` [U-Boot] [PATCH 2/8] ARMV7: Fix udelay " Steve Sakoman @ 2010-07-21 19:25 ` Steve Sakoman 2010-07-21 23:22 ` Nishanth Menon 2010-07-21 19:25 ` [U-Boot] [PATCH 4/8] ARMV7: Add support for the TWL6030 I2C power chip used in OMAP4 systems Steve Sakoman ` (4 subsequent siblings) 7 siblings, 1 reply; 15+ messages in thread From: Steve Sakoman @ 2010-07-21 19:25 UTC (permalink / raw) To: u-boot In addition to modifying the init routine to follow the TRM recommendations, this patch adds a retry count to two loops to avoid the possibility of infinite loops. It also corrects error message typos in the i2c_write routine. Signed-off-by: Steve Sakoman <steve@sakoman.com> --- arch/arm/include/asm/arch-omap3/i2c.h | 4 ++- drivers/i2c/omap24xx_i2c.c | 37 ++++++++++++++++++++++---------- drivers/i2c/omap24xx_i2c.h | 4 +++ 3 files changed, 32 insertions(+), 13 deletions(-) diff --git a/arch/arm/include/asm/arch-omap3/i2c.h b/arch/arm/include/asm/arch-omap3/i2c.h index 7a4a73a..d2e7488 100644 --- a/arch/arm/include/asm/arch-omap3/i2c.h +++ b/arch/arm/include/asm/arch-omap3/i2c.h @@ -34,7 +34,9 @@ struct i2c { unsigned short stat; /* 0x08 */ unsigned short res3; unsigned short iv; /* 0x0C */ - unsigned short res4[3]; + unsigned short res4; + unsigned short syss; /* 0x10 */ + unsigned short res4a; unsigned short buf; /* 0x14 */ unsigned short res5; unsigned short cnt; /* 0x18 */ diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c index 3256133..a91fe55 100644 --- a/drivers/i2c/omap24xx_i2c.c +++ b/drivers/i2c/omap24xx_i2c.c @@ -41,6 +41,7 @@ void i2c_init (int speed, int slaveadd) int psc, fsscll, fssclh; int hsscll = 0, hssclh = 0; u32 scll, sclh; + int reset_timeout = 10; /* Only handle standard, fast and high speeds */ if ((speed != OMAP_I2C_STANDARD) && @@ -102,15 +103,22 @@ void i2c_init (int speed, int slaveadd) sclh = (unsigned int)fssclh; } - writew(0x2, &i2c_base->sysc); /* for ES2 after soft reset */ - udelay(1000); - writew(0x0, &i2c_base->sysc); /* will probably self clear but */ - if (readw (&i2c_base->con) & I2C_CON_EN) { writew (0, &i2c_base->con); udelay (50000); } + writew(0x2, &i2c_base->sysc); /* for ES2 after soft reset */ + udelay(1000); + + writew(I2C_CON_EN, &i2c_base->con); + while (!(readw(&i2c_base->syss) & I2C_SYSS_RDONE) && reset_timeout--) { + if (reset_timeout <= 0) + printf("ERROR: Timeout in soft-reset\n"); + udelay(1000); + } + + writew(0, &i2c_base->con); writew(psc, &i2c_base->psc); writew(scll, &i2c_base->scll); writew(sclh, &i2c_base->sclh); @@ -134,6 +142,7 @@ static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value) { int i2c_error = 0; u16 status; + u16 retries; /* wait until bus not busy */ wait_for_bb (); @@ -159,15 +168,16 @@ static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value) } if (!i2c_error) { - /* free bus, otherwise we can't use a combined transction */ - writew (0, &i2c_base->con); - while (readw (&i2c_base->stat) || (readw (&i2c_base->con) & I2C_CON_MST)) { + retries = 10; + while ((readw(&i2c_base->stat) & 0x14) || + (readw(&i2c_base->con) & I2C_CON_MST)) { udelay (10000); /* Have to clear pending interrupt to clear I2C_STAT */ writew (0xFFFF, &i2c_base->stat); + if (!retries--) + break; } - wait_for_bb (); /* set slave address */ writew (devaddr, &i2c_base->sa); /* read one byte from slave */ @@ -190,11 +200,14 @@ static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value) } if (!i2c_error) { + retries = 10; writew (I2C_CON_EN, &i2c_base->con); while (readw (&i2c_base->stat) || (readw (&i2c_base->con) & I2C_CON_MST)) { udelay (10000); writew (0xFFFF, &i2c_base->stat); + if (!retries--) + break; } } } @@ -276,7 +289,7 @@ static void flush_fifo(void) * you get a bus error */ while(1){ - stat = readw(&i2c_base->stat); + stat = readw(&i2c_base->stat) & I2C_STAT_RRDY; if(stat == I2C_STAT_RRDY){ #if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) || \ defined(CONFIG_OMAP44XX) @@ -357,18 +370,18 @@ int i2c_write (uchar chip, uint addr, int alen, uchar * buffer, int len) int i; if (alen > 1) { - printf ("I2C read: addr len %d not supported\n", alen); + printf("I2C write: addr len %d not supported\n", alen); return 1; } if (addr + len > 256) { - printf ("I2C read: address out of range\n"); + printf("I2C write: address out of range\n"); return 1; } for (i = 0; i < len; i++) { if (i2c_write_byte (chip, addr + i, buffer[i])) { - printf ("I2C read: I/O error\n"); + printf("I2C write: I/O error\n"); i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); return 1; } diff --git a/drivers/i2c/omap24xx_i2c.h b/drivers/i2c/omap24xx_i2c.h index 92a3416..650e33a 100644 --- a/drivers/i2c/omap24xx_i2c.h +++ b/drivers/i2c/omap24xx_i2c.h @@ -85,6 +85,10 @@ #define I2C_SYSTEST_SDA_I (1 << 1) /* SDA line sense input value */ #define I2C_SYSTEST_SDA_O (1 << 0) /* SDA line drive output value */ +/* I2C System Status Register (I2C_SYSS): */ + +#define I2C_SYSS_RDONE (1 << 0) /* Internel reset monitoring */ + #define I2C_SCLL_SCLL 0 #define I2C_SCLL_SCLL_M 0xFF #define I2C_SCLL_HSSCLL 8 -- 1.7.0.4 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [U-Boot] [PATCH 3/8] ARMV7: Modify i2c driver for more reliable operation on OMAP4 2010-07-21 19:25 ` [U-Boot] [PATCH 3/8] ARMV7: Modify i2c driver for more reliable operation on OMAP4 Steve Sakoman @ 2010-07-21 23:22 ` Nishanth Menon 2010-07-21 23:41 ` Steve Sakoman 0 siblings, 1 reply; 15+ messages in thread From: Nishanth Menon @ 2010-07-21 23:22 UTC (permalink / raw) To: u-boot Steve, just minor nitpick below: On 07/21/2010 02:25 PM, Steve Sakoman wrote: > In addition to modifying the init routine to follow the TRM > recommendations, this patch adds a retry count to two loops > to avoid the possibility of infinite loops. It also corrects > error message typos in the i2c_write routine. > > Signed-off-by: Steve Sakoman<steve@sakoman.com> > --- > arch/arm/include/asm/arch-omap3/i2c.h | 4 ++- > drivers/i2c/omap24xx_i2c.c | 37 ++++++++++++++++++++++---------- > drivers/i2c/omap24xx_i2c.h | 4 +++ > 3 files changed, 32 insertions(+), 13 deletions(-) > > diff --git a/arch/arm/include/asm/arch-omap3/i2c.h b/arch/arm/include/asm/arch-omap3/i2c.h > index 7a4a73a..d2e7488 100644 > --- a/arch/arm/include/asm/arch-omap3/i2c.h > +++ b/arch/arm/include/asm/arch-omap3/i2c.h > @@ -34,7 +34,9 @@ struct i2c { > unsigned short stat; /* 0x08 */ > unsigned short res3; > unsigned short iv; /* 0x0C */ > - unsigned short res4[3]; > + unsigned short res4; > + unsigned short syss; /* 0x10 */ > + unsigned short res4a; > unsigned short buf; /* 0x14 */ > unsigned short res5; > unsigned short cnt; /* 0x18 */ > diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c > index 3256133..a91fe55 100644 > --- a/drivers/i2c/omap24xx_i2c.c > +++ b/drivers/i2c/omap24xx_i2c.c > @@ -41,6 +41,7 @@ void i2c_init (int speed, int slaveadd) > int psc, fsscll, fssclh; > int hsscll = 0, hssclh = 0; > u32 scll, sclh; > + int reset_timeout = 10; I am guessing we can life with a u8, we timeout in 10ms.. would asking for a #define I2C_TIMEOUT_RESET is too much here? > > /* Only handle standard, fast and high speeds */ > if ((speed != OMAP_I2C_STANDARD)&& > @@ -102,15 +103,22 @@ void i2c_init (int speed, int slaveadd) > sclh = (unsigned int)fssclh; > } > > - writew(0x2,&i2c_base->sysc); /* for ES2 after soft reset */ > - udelay(1000); > - writew(0x0,&i2c_base->sysc); /* will probably self clear but */ > - > if (readw (&i2c_base->con)& I2C_CON_EN) { > writew (0,&i2c_base->con); > udelay (50000); > } > > + writew(0x2,&i2c_base->sysc); /* for ES2 after soft reset */ > + udelay(1000); > + > + writew(I2C_CON_EN,&i2c_base->con); > + while (!(readw(&i2c_base->syss)& I2C_SYSS_RDONE)&& reset_timeout--) { > + if (reset_timeout<= 0) > + printf("ERROR: Timeout in soft-reset\n"); > + udelay(1000); > + } > + > + writew(0,&i2c_base->con); > writew(psc,&i2c_base->psc); > writew(scll,&i2c_base->scll); > writew(sclh,&i2c_base->sclh); > @@ -134,6 +142,7 @@ static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value) > { > int i2c_error = 0; > u16 status; > + u16 retries; u8 sounds good here - this does not seem to take more than 10.. > > /* wait until bus not busy */ > wait_for_bb (); > @@ -159,15 +168,16 @@ static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value) > } > > if (!i2c_error) { > - /* free bus, otherwise we can't use a combined transction */ > - writew (0,&i2c_base->con); > - while (readw (&i2c_base->stat) || (readw (&i2c_base->con)& I2C_CON_MST)) { > + retries = 10; #define sounds nice here.. > + while ((readw(&i2c_base->stat)& 0x14) || > + (readw(&i2c_base->con)& I2C_CON_MST)) { > udelay (10000); > /* Have to clear pending interrupt to clear I2C_STAT */ > writew (0xFFFF,&i2c_base->stat); > + if (!retries--) > + break; > } do we just proceed in case of retry timeout? > > - wait_for_bb (); > /* set slave address */ > writew (devaddr,&i2c_base->sa); > /* read one byte from slave */ > @@ -190,11 +200,14 @@ static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value) > } > > if (!i2c_error) { > + retries = 10; > writew (I2C_CON_EN,&i2c_base->con); > while (readw (&i2c_base->stat) > || (readw (&i2c_base->con)& I2C_CON_MST)) { > udelay (10000); > writew (0xFFFF,&i2c_base->stat); > + if (!retries--) > + break; > } same comment on retry failure here.. > } > } > @@ -276,7 +289,7 @@ static void flush_fifo(void) > * you get a bus error > */ > while(1){ > - stat = readw(&i2c_base->stat); > + stat = readw(&i2c_base->stat)& I2C_STAT_RRDY; > if(stat == I2C_STAT_RRDY){ > #if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) || \ > defined(CONFIG_OMAP44XX) > @@ -357,18 +370,18 @@ int i2c_write (uchar chip, uint addr, int alen, uchar * buffer, int len) > int i; > > if (alen> 1) { > - printf ("I2C read: addr len %d not supported\n", alen); > + printf("I2C write: addr len %d not supported\n", alen); err.. do we need this change? > return 1; > } > > if (addr + len> 256) { > - printf ("I2C read: address out of range\n"); > + printf("I2C write: address out of range\n"); err.. do we need this change? > return 1; > } > > for (i = 0; i< len; i++) { > if (i2c_write_byte (chip, addr + i, buffer[i])) { > - printf ("I2C read: I/O error\n"); > + printf("I2C write: I/O error\n"); err.. do we need this change? > i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); > return 1; > } > diff --git a/drivers/i2c/omap24xx_i2c.h b/drivers/i2c/omap24xx_i2c.h > index 92a3416..650e33a 100644 > --- a/drivers/i2c/omap24xx_i2c.h > +++ b/drivers/i2c/omap24xx_i2c.h > @@ -85,6 +85,10 @@ > #define I2C_SYSTEST_SDA_I (1<< 1) /* SDA line sense input value */ > #define I2C_SYSTEST_SDA_O (1<< 0) /* SDA line drive output value */ > > +/* I2C System Status Register (I2C_SYSS): */ > + > +#define I2C_SYSS_RDONE (1<< 0) /* Internel reset monitoring */ > + > #define I2C_SCLL_SCLL 0 > #define I2C_SCLL_SCLL_M 0xFF > #define I2C_SCLL_HSSCLL 8 Regards, Nishanth Menon ^ permalink raw reply [flat|nested] 15+ messages in thread
* [U-Boot] [PATCH 3/8] ARMV7: Modify i2c driver for more reliable operation on OMAP4 2010-07-21 23:22 ` Nishanth Menon @ 2010-07-21 23:41 ` Steve Sakoman 2010-07-21 23:53 ` Nishanth Menon 0 siblings, 1 reply; 15+ messages in thread From: Steve Sakoman @ 2010-07-21 23:41 UTC (permalink / raw) To: u-boot On Wed, Jul 21, 2010 at 4:22 PM, Nishanth Menon <menon.nishanth@gmail.com> wrote: > Steve, > just minor nitpick below: > > On 07/21/2010 02:25 PM, Steve Sakoman wrote: >> In addition to modifying the init routine to follow the TRM >> recommendations, this patch adds a retry count to two loops >> to avoid the possibility of infinite loops. ?It also corrects >> error message typos in the i2c_write routine. >> >> Signed-off-by: ?Steve Sakoman<steve@sakoman.com> >> --- >> ? arch/arm/include/asm/arch-omap3/i2c.h | ? ?4 ++- >> ? drivers/i2c/omap24xx_i2c.c ? ? ? ? ? ?| ? 37 ++++++++++++++++++++++---------- >> ? drivers/i2c/omap24xx_i2c.h ? ? ? ? ? ?| ? ?4 +++ >> ? 3 files changed, 32 insertions(+), 13 deletions(-) >> >> diff --git a/arch/arm/include/asm/arch-omap3/i2c.h b/arch/arm/include/asm/arch-omap3/i2c.h >> index 7a4a73a..d2e7488 100644 >> --- a/arch/arm/include/asm/arch-omap3/i2c.h >> +++ b/arch/arm/include/asm/arch-omap3/i2c.h >> @@ -34,7 +34,9 @@ struct i2c { >> ? ? ? unsigned short stat; ? ?/* 0x08 */ >> ? ? ? unsigned short res3; >> ? ? ? unsigned short iv; ? ? ?/* 0x0C */ >> - ? ? unsigned short res4[3]; >> + ? ? unsigned short res4; >> + ? ? unsigned short syss; ? ?/* 0x10 */ >> + ? ? unsigned short res4a; >> ? ? ? unsigned short buf; ? ? /* 0x14 */ >> ? ? ? unsigned short res5; >> ? ? ? unsigned short cnt; ? ? /* 0x18 */ >> diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c >> index 3256133..a91fe55 100644 >> --- a/drivers/i2c/omap24xx_i2c.c >> +++ b/drivers/i2c/omap24xx_i2c.c >> @@ -41,6 +41,7 @@ void i2c_init (int speed, int slaveadd) >> ? ? ? int psc, fsscll, fssclh; >> ? ? ? int hsscll = 0, hssclh = 0; >> ? ? ? u32 scll, sclh; >> + ? ? int reset_timeout = 10; > I am guessing we ?can life with a u8, we timeout in 10ms.. would asking > for a #define I2C_TIMEOUT_RESET is too much here? I can't imagine why we would ever want to make this a config option! In normal operation the loop is only traversed one time. I only added the timeout to prevent the possibility of an infinite loop. >> >> ? ? ? /* Only handle standard, fast and high speeds */ >> ? ? ? if ((speed != OMAP_I2C_STANDARD)&& >> @@ -102,15 +103,22 @@ void i2c_init (int speed, int slaveadd) >> ? ? ? ? ? ? ? sclh = (unsigned int)fssclh; >> ? ? ? } >> >> - ? ? writew(0x2,&i2c_base->sysc); /* for ES2 after soft reset */ >> - ? ? udelay(1000); >> - ? ? writew(0x0,&i2c_base->sysc); /* will probably self clear but */ >> - >> ? ? ? if (readw (&i2c_base->con)& ?I2C_CON_EN) { >> ? ? ? ? ? ? ? writew (0,&i2c_base->con); >> ? ? ? ? ? ? ? udelay (50000); >> ? ? ? } >> >> + ? ? writew(0x2,&i2c_base->sysc); /* for ES2 after soft reset */ >> + ? ? udelay(1000); >> + >> + ? ? writew(I2C_CON_EN,&i2c_base->con); >> + ? ? while (!(readw(&i2c_base->syss)& ?I2C_SYSS_RDONE)&& ?reset_timeout--) { >> + ? ? ? ? ? ? if (reset_timeout<= 0) >> + ? ? ? ? ? ? ? ? ? ? printf("ERROR: Timeout in soft-reset\n"); >> + ? ? ? ? ? ? udelay(1000); >> + ? ? } >> + >> + ? ? writew(0,&i2c_base->con); >> ? ? ? writew(psc,&i2c_base->psc); >> ? ? ? writew(scll,&i2c_base->scll); >> ? ? ? writew(sclh,&i2c_base->sclh); >> @@ -134,6 +142,7 @@ static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value) >> ? { >> ? ? ? int i2c_error = 0; >> ? ? ? u16 status; >> + ? ? u16 retries; > u8 sounds good here - this does not seem to take more than 10.. >> >> ? ? ? /* wait until bus not busy */ >> ? ? ? wait_for_bb (); >> @@ -159,15 +168,16 @@ static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value) >> ? ? ? } >> >> ? ? ? if (!i2c_error) { >> - ? ? ? ? ? ? /* free bus, otherwise we can't use a combined transction */ >> - ? ? ? ? ? ? writew (0,&i2c_base->con); >> - ? ? ? ? ? ? while (readw (&i2c_base->stat) || (readw (&i2c_base->con)& ?I2C_CON_MST)) { >> + ? ? ? ? ? ? retries = 10; > #define sounds nice here.. >> + ? ? ? ? ? ? while ((readw(&i2c_base->stat)& ?0x14) || >> + ? ? ? ? ? ? ? ? ? ? (readw(&i2c_base->con)& ?I2C_CON_MST)) { >> ? ? ? ? ? ? ? ? ? ? ? udelay (10000); >> ? ? ? ? ? ? ? ? ? ? ? /* Have to clear pending interrupt to clear I2C_STAT */ >> ? ? ? ? ? ? ? ? ? ? ? writew (0xFFFF,&i2c_base->stat); >> + ? ? ? ? ? ? ? ? ? ? if (!retries--) >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? break; >> ? ? ? ? ? ? ? } > do we just proceed in case of retry timeout? Yes. Again this timeout was added to prevent an infinite loop hang. Perhaps an error message if the timeout is triggered? >> >> - ? ? ? ? ? ? wait_for_bb (); >> ? ? ? ? ? ? ? /* set slave address */ >> ? ? ? ? ? ? ? writew (devaddr,&i2c_base->sa); >> ? ? ? ? ? ? ? /* read one byte from slave */ >> @@ -190,11 +200,14 @@ static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value) >> ? ? ? ? ? ? ? } >> >> ? ? ? ? ? ? ? if (!i2c_error) { >> + ? ? ? ? ? ? ? ? ? ? retries = 10; >> ? ? ? ? ? ? ? ? ? ? ? writew (I2C_CON_EN,&i2c_base->con); >> ? ? ? ? ? ? ? ? ? ? ? while (readw (&i2c_base->stat) >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?|| (readw (&i2c_base->con)& ?I2C_CON_MST)) { >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? udelay (10000); >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? writew (0xFFFF,&i2c_base->stat); >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? if (!retries--) >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? break; >> ? ? ? ? ? ? ? ? ? ? ? } > same comment on retry failure here.. Same response -- would you like to see an error message if the timeout is triggered? > >> ? ? ? ? ? ? ? } >> ? ? ? } >> @@ -276,7 +289,7 @@ static void flush_fifo(void) >> ? ? ? ?* you get a bus error >> ? ? ? ?*/ >> ? ? ? while(1){ >> - ? ? ? ? ? ? stat = readw(&i2c_base->stat); >> + ? ? ? ? ? ? stat = readw(&i2c_base->stat)& ?I2C_STAT_RRDY; >> ? ? ? ? ? ? ? if(stat == I2C_STAT_RRDY){ >> ? #if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) || \ >> ? ? ? defined(CONFIG_OMAP44XX) >> @@ -357,18 +370,18 @@ int i2c_write (uchar chip, uint addr, int alen, uchar * buffer, int len) >> ? ? ? int i; >> >> ? ? ? if (alen> ?1) { >> - ? ? ? ? ? ? printf ("I2C read: addr len %d not supported\n", alen); >> + ? ? ? ? ? ? printf("I2C write: addr len %d not supported\n", alen); > err.. do we need this change? I think so -- otherwise the i2c_write function is printing messages claiming to come from i2c_read! Same for the other messages you flagged. Regards, Steve ^ permalink raw reply [flat|nested] 15+ messages in thread
* [U-Boot] [PATCH 3/8] ARMV7: Modify i2c driver for more reliable operation on OMAP4 2010-07-21 23:41 ` Steve Sakoman @ 2010-07-21 23:53 ` Nishanth Menon 2010-07-23 16:33 ` Steve Sakoman 0 siblings, 1 reply; 15+ messages in thread From: Nishanth Menon @ 2010-07-21 23:53 UTC (permalink / raw) To: u-boot On 07/21/2010 06:41 PM, Steve Sakoman wrote: > On Wed, Jul 21, 2010 at 4:22 PM, Nishanth Menon > <menon.nishanth@gmail.com> wrote: >> Steve, >> just minor nitpick below: >> >> On 07/21/2010 02:25 PM, Steve Sakoman wrote: >>> In addition to modifying the init routine to follow the TRM >>> recommendations, this patch adds a retry count to two loops >>> to avoid the possibility of infinite loops. It also corrects >>> error message typos in the i2c_write routine. >>> >>> Signed-off-by: Steve Sakoman<steve@sakoman.com> >>> --- >>> arch/arm/include/asm/arch-omap3/i2c.h | 4 ++- >>> drivers/i2c/omap24xx_i2c.c | 37 ++++++++++++++++++++++---------- >>> drivers/i2c/omap24xx_i2c.h | 4 +++ >>> 3 files changed, 32 insertions(+), 13 deletions(-) >>> >>> diff --git a/arch/arm/include/asm/arch-omap3/i2c.h b/arch/arm/include/asm/arch-omap3/i2c.h >>> index 7a4a73a..d2e7488 100644 >>> --- a/arch/arm/include/asm/arch-omap3/i2c.h >>> +++ b/arch/arm/include/asm/arch-omap3/i2c.h >>> @@ -34,7 +34,9 @@ struct i2c { >>> unsigned short stat; /* 0x08 */ >>> unsigned short res3; >>> unsigned short iv; /* 0x0C */ >>> - unsigned short res4[3]; >>> + unsigned short res4; >>> + unsigned short syss; /* 0x10 */ >>> + unsigned short res4a; >>> unsigned short buf; /* 0x14 */ >>> unsigned short res5; >>> unsigned short cnt; /* 0x18 */ >>> diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c >>> index 3256133..a91fe55 100644 >>> --- a/drivers/i2c/omap24xx_i2c.c >>> +++ b/drivers/i2c/omap24xx_i2c.c >>> @@ -41,6 +41,7 @@ void i2c_init (int speed, int slaveadd) >>> int psc, fsscll, fssclh; >>> int hsscll = 0, hssclh = 0; >>> u32 scll, sclh; >>> + int reset_timeout = 10; >> I am guessing we can life with a u8, we timeout in 10ms.. would asking >> for a #define I2C_TIMEOUT_RESET is too much here? > > I can't imagine why we would ever want to make this a config option! > > In normal operation the loop is only traversed one time. I only added > the timeout to prevent the possibility of an infinite loop. not as a config option, but a #define in the C file so that it is readable, the 10 makes not much sense at a glance.. but as I mentioned, it is just a nitpick.. it just helps to quickly figure out which are the timeouts used in the driver.. I mean we cant proceed with i2c_init or use it as i2c master (aka no point in using the driver) if that happens in the system rt? > >>> >>> /* Only handle standard, fast and high speeds */ >>> if ((speed != OMAP_I2C_STANDARD)&& >>> @@ -102,15 +103,22 @@ void i2c_init (int speed, int slaveadd) >>> sclh = (unsigned int)fssclh; >>> } >>> >>> - writew(0x2,&i2c_base->sysc); /* for ES2 after soft reset */ >>> - udelay(1000); >>> - writew(0x0,&i2c_base->sysc); /* will probably self clear but */ >>> - >>> if (readw (&i2c_base->con)& I2C_CON_EN) { >>> writew (0,&i2c_base->con); >>> udelay (50000); >>> } >>> >>> + writew(0x2,&i2c_base->sysc); /* for ES2 after soft reset */ >>> + udelay(1000); >>> + >>> + writew(I2C_CON_EN,&i2c_base->con); >>> + while (!(readw(&i2c_base->syss)& I2C_SYSS_RDONE)&& reset_timeout--) { >>> + if (reset_timeout<= 0) >>> + printf("ERROR: Timeout in soft-reset\n"); >>> + udelay(1000); >>> + } >>> + >>> + writew(0,&i2c_base->con); >>> writew(psc,&i2c_base->psc); >>> writew(scll,&i2c_base->scll); >>> writew(sclh,&i2c_base->sclh); >>> @@ -134,6 +142,7 @@ static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value) >>> { >>> int i2c_error = 0; >>> u16 status; >>> + u16 retries; >> u8 sounds good here - this does not seem to take more than 10.. >>> >>> /* wait until bus not busy */ >>> wait_for_bb (); >>> @@ -159,15 +168,16 @@ static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value) >>> } >>> >>> if (!i2c_error) { >>> - /* free bus, otherwise we can't use a combined transction */ >>> - writew (0,&i2c_base->con); >>> - while (readw (&i2c_base->stat) || (readw (&i2c_base->con)& I2C_CON_MST)) { >>> + retries = 10; >> #define sounds nice here.. >>> + while ((readw(&i2c_base->stat)& 0x14) || >>> + (readw(&i2c_base->con)& I2C_CON_MST)) { >>> udelay (10000); >>> /* Have to clear pending interrupt to clear I2C_STAT */ >>> writew (0xFFFF,&i2c_base->stat); >>> + if (!retries--) >>> + break; >>> } >> do we just proceed in case of retry timeout? > > Yes. Again this timeout was added to prevent an infinite loop hang. > > Perhaps an error message if the timeout is triggered? print might e ok here, but at this point, we are looking to check what state we are in - master/slave if the state did not change aka controller is in slave mode, makes no sense in trying to dump data out.. it is doomed to failure :(.. quitting with an appropriate message? > >>> >>> - wait_for_bb (); >>> /* set slave address */ >>> writew (devaddr,&i2c_base->sa); >>> /* read one byte from slave */ >>> @@ -190,11 +200,14 @@ static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value) >>> } >>> >>> if (!i2c_error) { >>> + retries = 10; >>> writew (I2C_CON_EN,&i2c_base->con); >>> while (readw (&i2c_base->stat) >>> || (readw (&i2c_base->con)& I2C_CON_MST)) { >>> udelay (10000); >>> writew (0xFFFF,&i2c_base->stat); >>> + if (!retries--) >>> + break; >>> } >> same comment on retry failure here.. > > Same response -- would you like to see an error message if the timeout > is triggered? lets see here -> interrupt status never gets cleared OR we are in slave mode.. my argument still stands in the case of master mode.. we can return error value for the caller of read_byte to handle, maybe we should be using that along with a print to scare the user ;) ? > >> >>> } >>> } >>> @@ -276,7 +289,7 @@ static void flush_fifo(void) >>> * you get a bus error >>> */ >>> while(1){ >>> - stat = readw(&i2c_base->stat); >>> + stat = readw(&i2c_base->stat)& I2C_STAT_RRDY; >>> if(stat == I2C_STAT_RRDY){ >>> #if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) || \ >>> defined(CONFIG_OMAP44XX) >>> @@ -357,18 +370,18 @@ int i2c_write (uchar chip, uint addr, int alen, uchar * buffer, int len) >>> int i; >>> >>> if (alen> 1) { >>> - printf ("I2C read: addr len %d not supported\n", alen); >>> + printf("I2C write: addr len %d not supported\n", alen); >> err.. do we need this change? > > I think so -- otherwise the i2c_write function is printing messages > claiming to come from i2c_read! Same for the other messages you > flagged. > Apologies on not being clear - I dont have a problem with the print as such, BUT, do we need a diff here which changes printf ("... to printf("... ? makes no reason why I need that for reliable OMAP4 operation :D.. > Regards, > > Steve > ^ permalink raw reply [flat|nested] 15+ messages in thread
* [U-Boot] [PATCH 3/8] ARMV7: Modify i2c driver for more reliable operation on OMAP4 2010-07-21 23:53 ` Nishanth Menon @ 2010-07-23 16:33 ` Steve Sakoman 2010-07-23 16:36 ` Nishanth Menon 0 siblings, 1 reply; 15+ messages in thread From: Steve Sakoman @ 2010-07-23 16:33 UTC (permalink / raw) To: u-boot On Wed, Jul 21, 2010 at 4:53 PM, Nishanth Menon <menon.nishanth@gmail.com> wrote: >>>> diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c >>>> index 3256133..a91fe55 100644 >>>> --- a/drivers/i2c/omap24xx_i2c.c >>>> +++ b/drivers/i2c/omap24xx_i2c.c >>>> @@ -41,6 +41,7 @@ void i2c_init (int speed, int slaveadd) >>>> ? ? ? int psc, fsscll, fssclh; >>>> ? ? ? int hsscll = 0, hssclh = 0; >>>> ? ? ? u32 scll, sclh; >>>> + ? ? int reset_timeout = 10; >>> >>> I am guessing we ?can life with a u8, we timeout in 10ms.. would asking >>> for a #define I2C_TIMEOUT_RESET is too much here? >> >> I can't imagine why we would ever want to make this a config option! >> >> In normal operation the loop is only traversed one time. ?I only added >> the timeout to prevent the possibility of an infinite loop. > > not as a config option, but a #define in the C file so that it is readable, > the 10 makes not much sense at a glance.. but as I mentioned, it is just a > nitpick.. it just helps to quickly figure out which are the timeouts used in > the driver.. I mean we cant proceed with i2c_init or use it as i2c master > (aka no point in using the driver) if that happens in the system rt? OK, I will submit a version 2 with a #define for the timeout/retry count. >>>> - ? ? ? ? ? ? printf ("I2C read: addr len %d not supported\n", alen); >>>> + ? ? ? ? ? ? printf("I2C write: addr len %d not supported\n", alen); >>> >>> err.. do we need this change? >> >> I think so -- otherwise the i2c_write function is printing messages >> claiming to come from i2c_read! ?Same for the other messages you >> flagged. >> > > Apologies on not being clear - I dont have a problem with the print as such, > BUT, do we need a diff here which changes printf ("... to printf("... ? > makes no reason why I need that for reliable OMAP4 operation :D.. The message is clearly wrong, but your point is well taken: an erroneous error message fix doesn't really belong in a patch for reliable operation on OMAP4. Version 2 of this patch will address only the reliability issues and your request for a timeout #define. I will then do a subsequent patch (not part of this series) to fix erroneous error messages, potential infinite loops, and a variety of whitespace and style issues. Regards, Steve ^ permalink raw reply [flat|nested] 15+ messages in thread
* [U-Boot] [PATCH 3/8] ARMV7: Modify i2c driver for more reliable operation on OMAP4 2010-07-23 16:33 ` Steve Sakoman @ 2010-07-23 16:36 ` Nishanth Menon 0 siblings, 0 replies; 15+ messages in thread From: Nishanth Menon @ 2010-07-23 16:36 UTC (permalink / raw) To: u-boot On Fri, Jul 23, 2010 at 11:33 AM, Steve Sakoman <sakoman@gmail.com> wrote: > On Wed, Jul 21, 2010 at 4:53 PM, Nishanth Menon > <menon.nishanth@gmail.com> wrote: > >>>>> diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c >>>>> index 3256133..a91fe55 100644 >>>>> --- a/drivers/i2c/omap24xx_i2c.c >>>>> +++ b/drivers/i2c/omap24xx_i2c.c >>>>> @@ -41,6 +41,7 @@ void i2c_init (int speed, int slaveadd) >>>>> ? ? ? int psc, fsscll, fssclh; >>>>> ? ? ? int hsscll = 0, hssclh = 0; >>>>> ? ? ? u32 scll, sclh; >>>>> + ? ? int reset_timeout = 10; >>>> >>>> I am guessing we ?can life with a u8, we timeout in 10ms.. would asking >>>> for a #define I2C_TIMEOUT_RESET is too much here? >>> >>> I can't imagine why we would ever want to make this a config option! >>> >>> In normal operation the loop is only traversed one time. ?I only added >>> the timeout to prevent the possibility of an infinite loop. >> >> not as a config option, but a #define in the C file so that it is readable, >> the 10 makes not much sense at a glance.. but as I mentioned, it is just a >> nitpick.. it just helps to quickly figure out which are the timeouts used in >> the driver.. I mean we cant proceed with i2c_init or use it as i2c master >> (aka no point in using the driver) if that happens in the system rt? > > OK, I will submit a version 2 with a #define for the timeout/retry count. > >>>>> - ? ? ? ? ? ? printf ("I2C read: addr len %d not supported\n", alen); >>>>> + ? ? ? ? ? ? printf("I2C write: addr len %d not supported\n", alen); >>>> >>>> err.. do we need this change? >>> >>> I think so -- otherwise the i2c_write function is printing messages >>> claiming to come from i2c_read! ?Same for the other messages you >>> flagged. >>> >> >> Apologies on not being clear - I dont have a problem with the print as such, >> BUT, do we need a diff here which changes printf ("... to printf("... ? >> makes no reason why I need that for reliable OMAP4 operation :D.. > > The message is clearly wrong, but your point is well taken: ?an > erroneous error message fix doesn't really belong in a patch for > reliable operation on OMAP4. > > Version 2 of this patch will address only the reliability issues and > your request for a timeout #define. > > I will then do a subsequent patch (not part of this series) to fix > erroneous error messages, potential infinite loops, and a variety of > whitespace and style issues. alright.. thanks. looking for the v2 of this patch.. > > Regards, > > Steve > ^ permalink raw reply [flat|nested] 15+ messages in thread
* [U-Boot] [PATCH 4/8] ARMV7: Add support for the TWL6030 I2C power chip used in OMAP4 systems 2010-07-21 19:25 [U-Boot] [PATCH 0/8] ARMV7: Enhance support for OMAP4 Steve Sakoman ` (2 preceding siblings ...) 2010-07-21 19:25 ` [U-Boot] [PATCH 3/8] ARMV7: Modify i2c driver for more reliable operation on OMAP4 Steve Sakoman @ 2010-07-21 19:25 ` Steve Sakoman 2010-07-21 19:25 ` [U-Boot] [PATCH 5/8] ARMV7: Restructure omap3 musb driver to allow code sharing between OMAP3 and OMAP4 Steve Sakoman ` (3 subsequent siblings) 7 siblings, 0 replies; 15+ messages in thread From: Steve Sakoman @ 2010-07-21 19:25 UTC (permalink / raw) To: u-boot This patch add the basic infrastructure for the TWL6030 driver and enables support in the two existing OMAP4 boards, Panda and OMAP4430 SDP Signed-off-by: Steve Sakoman <steve@sakoman.com> --- drivers/power/Makefile | 1 + drivers/power/twl6030.c | 77 +++++++++++++++++++++++++++++++++ include/configs/omap4_panda.h | 3 + include/configs/omap4_sdp4430.h | 3 + include/twl6030.h | 90 +++++++++++++++++++++++++++++++++++++++ 5 files changed, 174 insertions(+), 0 deletions(-) create mode 100644 drivers/power/twl6030.c create mode 100644 include/twl6030.h diff --git a/drivers/power/Makefile b/drivers/power/Makefile index dd06514..db53173 100644 --- a/drivers/power/Makefile +++ b/drivers/power/Makefile @@ -26,6 +26,7 @@ include $(TOPDIR)/config.mk LIB := $(obj)libpower.a COBJS-$(CONFIG_TWL4030_POWER) += twl4030.o +COBJS-$(CONFIG_TWL6030_POWER) += twl6030.o COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/power/twl6030.c b/drivers/power/twl6030.c new file mode 100644 index 0000000..b47992b --- /dev/null +++ b/drivers/power/twl6030.c @@ -0,0 +1,77 @@ +/* + * (C) Copyright 2010 + * Texas Instruments, <www.ti.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#include <config.h> +#ifdef CONFIG_TWL6030_POWER + +#include <twl6030.h> + +/* Functions to read and write from TWL6030 */ +static inline int twl6030_i2c_write_u8(u8 chip_no, u8 val, u8 reg) +{ + return i2c_write(chip_no, reg, 1, &val, 1); +} + +static inline int twl6030_i2c_read_u8(u8 chip_no, u8 *val, u8 reg) +{ + return i2c_read(chip_no, reg, 1, val, 1); +} + +void twl6030_start_usb_charging(void) +{ + twl6030_i2c_write_u8(TWL6030_CHIP_CHARGER, CHARGERUSB_VICHRG_1500, + CHARGERUSB_VICHRG); + twl6030_i2c_write_u8(TWL6030_CHIP_CHARGER, CHARGERUSB_CIN_LIMIT_NONE, + CHARGERUSB_CINLIMIT); + twl6030_i2c_write_u8(TWL6030_CHIP_CHARGER, MBAT_TEMP, + CONTROLLER_INT_MASK); + twl6030_i2c_write_u8(TWL6030_CHIP_CHARGER, MASK_MCHARGERUSB_THMREG, + CHARGERUSB_INT_MASK); + twl6030_i2c_write_u8(TWL6030_CHIP_CHARGER, CHARGERUSB_VOREG_4P0, + CHARGERUSB_VOREG); + twl6030_i2c_write_u8(TWL6030_CHIP_CHARGER, CHARGERUSB_CTRL2_VITERM_100, + CHARGERUSB_CTRL2); + /* Enable USB charging */ + twl6030_i2c_write_u8(TWL6030_CHIP_CHARGER, CONTROLLER_CTRL1_EN_CHARGER, + CONTROLLER_CTRL1); + return; +} + +void twl6030_init_battery_charging(void) +{ + twl6030_start_usb_charging(); + return; +} + +void twl6030_usb_device_settings() +{ + u8 data = 0; + + /* Select APP Group and set state to ON */ + twl6030_i2c_write_u8(TWL6030_CHIP_PM, 0x21, VUSB_CFG_STATE); + + twl6030_i2c_read_u8(TWL6030_CHIP_PM, &data, MISC2); + data |= 0x10; + + /* Select the input supply for VBUS regulator */ + twl6030_i2c_write_u8(TWL6030_CHIP_PM, data, MISC2); +} +#endif diff --git a/include/configs/omap4_panda.h b/include/configs/omap4_panda.h index 0fb1ad3..4bec00b 100644 --- a/include/configs/omap4_panda.h +++ b/include/configs/omap4_panda.h @@ -103,6 +103,9 @@ #define CONFIG_DRIVER_OMAP34XX_I2C 1 #define CONFIG_I2C_MULTI_BUS 1 +/* TWL6030 */ +#define CONFIG_TWL6030_POWER 1 + /* MMC */ #define CONFIG_MMC 1 #define CONFIG_OMAP3_MMC 1 diff --git a/include/configs/omap4_sdp4430.h b/include/configs/omap4_sdp4430.h index ef5272b..c18e71a 100644 --- a/include/configs/omap4_sdp4430.h +++ b/include/configs/omap4_sdp4430.h @@ -104,6 +104,9 @@ #define CONFIG_DRIVER_OMAP34XX_I2C 1 #define CONFIG_I2C_MULTI_BUS 1 +/* TWL6030 */ +#define CONFIG_TWL6030_POWER 1 + /* MMC */ #define CONFIG_MMC 1 #define CONFIG_OMAP3_MMC 1 diff --git a/include/twl6030.h b/include/twl6030.h new file mode 100644 index 0000000..479dbf0 --- /dev/null +++ b/include/twl6030.h @@ -0,0 +1,90 @@ +/* + * (C) Copyright 2010 + * Texas Instruments, <www.ti.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <i2c.h> + +/* I2C chip addresses */ +#define TWL6030_CHIP_PM 0x48 + +#define TWL6030_CHIP_USB 0x49 +#define TWL6030_CHIP_ADC 0x49 +#define TWL6030_CHIP_CHARGER 0x49 +#define TWL6030_CHIP_PWM 0x49 + +/* Battery CHARGER REGISTERS */ +#define CONTROLLER_INT_MASK 0xE0 +#define CONTROLLER_CTRL1 0xE1 +#define CONTROLLER_WDG 0xE2 +#define CONTROLLER_STAT1 0xE3 +#define CHARGERUSB_INT_STATUS 0xE4 +#define CHARGERUSB_INT_MASK 0xE5 +#define CHARGERUSB_STATUS_INT1 0xE6 +#define CHARGERUSB_STATUS_INT2 0xE7 +#define CHARGERUSB_CTRL1 0xE8 +#define CHARGERUSB_CTRL2 0xE9 +#define CHARGERUSB_CTRL3 0xEA +#define CHARGERUSB_STAT1 0xEB +#define CHARGERUSB_VOREG 0xEC +#define CHARGERUSB_VICHRG 0xED +#define CHARGERUSB_CINLIMIT 0xEE +#define CHARGERUSB_CTRLLIMIT1 0xEF + +/* CHARGERUSB_VICHRG */ +#define CHARGERUSB_VICHRG_500 0x4 +#define CHARGERUSB_VICHRG_1500 0xE +/* CHARGERUSB_CINLIMIT */ +#define CHARGERUSB_CIN_LIMIT_100 0x1 +#define CHARGERUSB_CIN_LIMIT_300 0x5 +#define CHARGERUSB_CIN_LIMIT_500 0x9 +#define CHARGERUSB_CIN_LIMIT_NONE 0xF +/* CONTROLLER_INT_MASK */ +#define MVAC_FAULT (1 << 6) +#define MAC_EOC (1 << 5) +#define MBAT_REMOVED (1 << 4) +#define MFAULT_WDG (1 << 3) +#define MBAT_TEMP (1 << 2) +#define MVBUS_DET (1 << 1) +#define MVAC_DET (1 << 0) +/* CHARGERUSB_INT_MASK */ +#define MASK_MCURRENT_TERM (1 << 3) +#define MASK_MCHARGERUSB_STAT (1 << 2) +#define MASK_MCHARGERUSB_THMREG (1 << 1) +#define MASK_MCHARGERUSB_FAULT (1 << 0) +/* CHARGERUSB_VOREG */ +#define CHARGERUSB_VOREG_3P52 0x01 +#define CHARGERUSB_VOREG_4P0 0x19 +#define CHARGERUSB_VOREG_4P2 0x23 +#define CHARGERUSB_VOREG_4P76 0x3F +/* CHARGERUSB_CTRL2 */ +#define CHARGERUSB_CTRL2_VITERM_50 (0 << 5) +#define CHARGERUSB_CTRL2_VITERM_100 (1 << 5) +#define CHARGERUSB_CTRL2_VITERM_150 (2 << 5) +/* CONTROLLER_CTRL1 */ +#define CONTROLLER_CTRL1_EN_CHARGER (1 << 4) +#define CONTROLLER_CTRL1_SEL_CHARGER (1 << 3) + +#define VUSB_CFG_STATE 0xA2 +#define MISC2 0xE5 + +void twl6030_init_battery_charging(void); +void twl6030_usb_device_settings(void); -- 1.7.0.4 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [U-Boot] [PATCH 5/8] ARMV7: Restructure omap3 musb driver to allow code sharing between OMAP3 and OMAP4 2010-07-21 19:25 [U-Boot] [PATCH 0/8] ARMV7: Enhance support for OMAP4 Steve Sakoman ` (3 preceding siblings ...) 2010-07-21 19:25 ` [U-Boot] [PATCH 4/8] ARMV7: Add support for the TWL6030 I2C power chip used in OMAP4 systems Steve Sakoman @ 2010-07-21 19:25 ` Steve Sakoman 2010-07-21 19:25 ` [U-Boot] [PATCH 6/8] ARMV7: Enable musb driver and usbtty on OMAP4430 SDP Steve Sakoman ` (2 subsequent siblings) 7 siblings, 0 replies; 15+ messages in thread From: Steve Sakoman @ 2010-07-21 19:25 UTC (permalink / raw) To: u-boot Signed-off-by: Steve Sakoman <steve@sakoman.com> --- arch/arm/include/asm/arch-omap3/cpu.h | 3 +++ arch/arm/include/asm/arch-omap4/cpu.h | 3 +++ drivers/usb/musb/omap3.c | 16 ++++++++++++++++ drivers/usb/musb/omap3.h | 3 ++- 4 files changed, 24 insertions(+), 1 deletions(-) diff --git a/arch/arm/include/asm/arch-omap3/cpu.h b/arch/arm/include/asm/arch-omap3/cpu.h index c072c27..390b007 100644 --- a/arch/arm/include/asm/arch-omap3/cpu.h +++ b/arch/arm/include/asm/arch-omap3/cpu.h @@ -483,4 +483,7 @@ struct pm { #define I2C_BASE2 (OMAP34XX_CORE_L4_IO_BASE + 0x72000) #define I2C_BASE3 (OMAP34XX_CORE_L4_IO_BASE + 0x60000) +/* MUSB base */ +#define MUSB_BASE (OMAP34XX_CORE_L4_IO_BASE + 0xAB000) + #endif /* _CPU_H */ diff --git a/arch/arm/include/asm/arch-omap4/cpu.h b/arch/arm/include/asm/arch-omap4/cpu.h index c056b95..7d5748a 100644 --- a/arch/arm/include/asm/arch-omap4/cpu.h +++ b/arch/arm/include/asm/arch-omap4/cpu.h @@ -139,4 +139,7 @@ struct watchdog { #define I2C_BASE2 (OMAP44XX_L4_PER_BASE + 0x72000) #define I2C_BASE3 (OMAP44XX_L4_PER_BASE + 0x60000) +/* MUSB base */ +#define MUSB_BASE (OMAP44XX_L4_CORE_BASE + 0xAB000) + #endif /* _CPU_H */ diff --git a/drivers/usb/musb/omap3.c b/drivers/usb/musb/omap3.c index a983552..c7876ed 100644 --- a/drivers/usb/musb/omap3.c +++ b/drivers/usb/musb/omap3.c @@ -31,6 +31,7 @@ */ #include <twl4030.h> +#include <twl6030.h> #include "omap3.h" static int platform_needs_initialization = 1; @@ -65,7 +66,12 @@ static struct omap3_otg_regs *otg; #define OMAP3_OTG_SYSSTATUS_RESETDONE 0x0001 +/* OMAP4430 has an internal PHY, use it */ +#ifdef CONFIG_OMAP4430 +#define OMAP3_OTG_INTERFSEL_OMAP 0x0000 +#else #define OMAP3_OTG_INTERFSEL_OMAP 0x0001 +#endif #define OMAP3_OTG_FORCESTDBY_STANDBY 0x0001 @@ -105,6 +111,11 @@ int musb_platform_init(void) goto end; } #endif + +#ifdef CONFIG_TWL6030_POWER + twl6030_usb_device_settings(); +#endif + otg = (struct omap3_otg_regs *)OMAP3_OTG_BASE; /* Set OTG to always be on */ @@ -122,6 +133,11 @@ int musb_platform_init(void) #ifdef CONFIG_OMAP3_EVM musb_cfg.extvbus = omap3_evm_need_extvbus(); #endif + +#ifdef CONFIG_OMAP4430 + u32 *usbotghs_control = (u32 *)(CTRL_BASE + 0x33C); + *usbotghs_control = 0x15; +#endif platform_needs_initialization = 0; } diff --git a/drivers/usb/musb/omap3.h b/drivers/usb/musb/omap3.h index c934e0c..ea00fed 100644 --- a/drivers/usb/musb/omap3.h +++ b/drivers/usb/musb/omap3.h @@ -31,10 +31,11 @@ #ifndef _MUSB_OMAP3_H_ #define _MUSB_OMAP3_H_ +#include <asm/arch/cpu.h> #include "musb_core.h" /* Base address of MUSB registers */ -#define MENTOR_USB0_BASE (OMAP34XX_CORE_L4_IO_BASE + 0xAB000) +#define MENTOR_USB0_BASE MUSB_BASE /* Base address of OTG registers */ #define OMAP3_OTG_BASE (MENTOR_USB0_BASE + 0x400) -- 1.7.0.4 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [U-Boot] [PATCH 6/8] ARMV7: Enable musb driver and usbtty on OMAP4430 SDP 2010-07-21 19:25 [U-Boot] [PATCH 0/8] ARMV7: Enhance support for OMAP4 Steve Sakoman ` (4 preceding siblings ...) 2010-07-21 19:25 ` [U-Boot] [PATCH 5/8] ARMV7: Restructure omap3 musb driver to allow code sharing between OMAP3 and OMAP4 Steve Sakoman @ 2010-07-21 19:25 ` Steve Sakoman 2010-07-21 19:25 ` [U-Boot] [PATCH 7/8] ARMV7: Enable musb driver and usbtty on OMAP4 Panda Steve Sakoman 2010-07-21 19:25 ` [U-Boot] [PATCH 8/8] ARMV7: Update default environment for OMAP4 boards Steve Sakoman 7 siblings, 0 replies; 15+ messages in thread From: Steve Sakoman @ 2010-07-21 19:25 UTC (permalink / raw) To: u-boot Signed-off-by: Steve Sakoman <steve@sakoman.com> --- include/configs/omap4_sdp4430.h | 15 +++++++++++++++ 1 files changed, 15 insertions(+), 0 deletions(-) diff --git a/include/configs/omap4_sdp4430.h b/include/configs/omap4_sdp4430.h index c18e71a..e9909f9 100644 --- a/include/configs/omap4_sdp4430.h +++ b/include/configs/omap4_sdp4430.h @@ -113,6 +113,20 @@ #define CONFIG_SYS_MMC_SET_DEV 1 #define CONFIG_DOS_PARTITION 1 +/* USB */ +#define CONFIG_MUSB_UDC 1 +#define CONFIG_USB_OMAP3 1 + +/* USB device configuration */ +#define CONFIG_USB_DEVICE 1 +#define CONFIG_USB_TTY 1 +#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 +/* Change these to suit your needs */ +#define CONFIG_USBD_VENDORID 0x0451 +#define CONFIG_USBD_PRODUCTID 0x5678 +#define CONFIG_USBD_MANUFACTURER "Texas Instruments" +#define CONFIG_USBD_PRODUCT_NAME "SDP4430" + /* Flash */ #define CONFIG_SYS_NO_FLASH 1 @@ -146,6 +160,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "loadaddr=0x82000000\0" \ "console=ttyS2,115200n8\0" \ + "usbtty=cdc_acm\0" \ "mmcdev=1\0" \ "mmcroot=/dev/mmcblk0p2 rw\0" \ "mmcrootfstype=ext3 rootwait\0" \ -- 1.7.0.4 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [U-Boot] [PATCH 7/8] ARMV7: Enable musb driver and usbtty on OMAP4 Panda 2010-07-21 19:25 [U-Boot] [PATCH 0/8] ARMV7: Enhance support for OMAP4 Steve Sakoman ` (5 preceding siblings ...) 2010-07-21 19:25 ` [U-Boot] [PATCH 6/8] ARMV7: Enable musb driver and usbtty on OMAP4430 SDP Steve Sakoman @ 2010-07-21 19:25 ` Steve Sakoman 2010-07-21 19:25 ` [U-Boot] [PATCH 8/8] ARMV7: Update default environment for OMAP4 boards Steve Sakoman 7 siblings, 0 replies; 15+ messages in thread From: Steve Sakoman @ 2010-07-21 19:25 UTC (permalink / raw) To: u-boot Signed-off-by: Steve Sakoman <steve@sakoman.com> --- include/configs/omap4_panda.h | 15 +++++++++++++++ 1 files changed, 15 insertions(+), 0 deletions(-) diff --git a/include/configs/omap4_panda.h b/include/configs/omap4_panda.h index 4bec00b..1d76467 100644 --- a/include/configs/omap4_panda.h +++ b/include/configs/omap4_panda.h @@ -112,6 +112,20 @@ #define CONFIG_SYS_MMC_SET_DEV 1 #define CONFIG_DOS_PARTITION 1 +/* USB */ +#define CONFIG_MUSB_UDC 1 +#define CONFIG_USB_OMAP3 1 + +/* USB device configuration */ +#define CONFIG_USB_DEVICE 1 +#define CONFIG_USB_TTY 1 +#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 +/* Change these to suit your needs */ +#define CONFIG_USBD_VENDORID 0x0451 +#define CONFIG_USBD_PRODUCTID 0x5678 +#define CONFIG_USBD_MANUFACTURER "Texas Instruments" +#define CONFIG_USBD_PRODUCT_NAME "OMAP4 Panda" + /* Flash */ #define CONFIG_SYS_NO_FLASH 1 @@ -145,6 +159,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "loadaddr=0x82000000\0" \ "console=ttyS2,115200n8\0" \ + "usbtty=cdc_acm\0" \ "mmcdev=1\0" \ "mmcroot=/dev/mmcblk0p2 rw\0" \ "mmcrootfstype=ext3 rootwait\0" \ -- 1.7.0.4 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [U-Boot] [PATCH 8/8] ARMV7: Update default environment for OMAP4 boards 2010-07-21 19:25 [U-Boot] [PATCH 0/8] ARMV7: Enhance support for OMAP4 Steve Sakoman ` (6 preceding siblings ...) 2010-07-21 19:25 ` [U-Boot] [PATCH 7/8] ARMV7: Enable musb driver and usbtty on OMAP4 Panda Steve Sakoman @ 2010-07-21 19:25 ` Steve Sakoman 2010-07-21 23:25 ` Nishanth Menon 7 siblings, 1 reply; 15+ messages in thread From: Steve Sakoman @ 2010-07-21 19:25 UTC (permalink / raw) To: u-boot Specify vram on command line, remove erroneous call to nandboot in the boot script, add CONFIG_BOOTDELAY Signed-off-by: Steve Sakoman <steve@sakoman.com> --- include/configs/omap4_panda.h | 5 ++++- include/configs/omap4_sdp4430.h | 5 ++++- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/include/configs/omap4_panda.h b/include/configs/omap4_panda.h index 1d76467..51c3b44 100644 --- a/include/configs/omap4_panda.h +++ b/include/configs/omap4_panda.h @@ -153,6 +153,8 @@ * Environment setup */ +#define CONFIG_BOOTDELAY 5 + /* allow overwriting serial config and ethaddr */ #define CONFIG_ENV_OVERWRITE @@ -160,10 +162,12 @@ "loadaddr=0x82000000\0" \ "console=ttyS2,115200n8\0" \ "usbtty=cdc_acm\0" \ + "vram=16M\0" \ "mmcdev=1\0" \ "mmcroot=/dev/mmcblk0p2 rw\0" \ "mmcrootfstype=ext3 rootwait\0" \ "mmcargs=setenv bootargs console=${console} " \ + "vram=${vram} " \ "root=${mmcroot} " \ "rootfstype=${mmcrootfstype}\0" \ "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ @@ -181,7 +185,6 @@ "else " \ "if run loaduimage; then " \ "run mmcboot; " \ - "else run nandboot; " \ "fi; " \ "fi; " \ "fi" diff --git a/include/configs/omap4_sdp4430.h b/include/configs/omap4_sdp4430.h index e9909f9..2643e43 100644 --- a/include/configs/omap4_sdp4430.h +++ b/include/configs/omap4_sdp4430.h @@ -154,6 +154,8 @@ * Environment setup */ +#define CONFIG_BOOTDELAY 5 + /* allow overwriting serial config and ethaddr */ #define CONFIG_ENV_OVERWRITE @@ -161,10 +163,12 @@ "loadaddr=0x82000000\0" \ "console=ttyS2,115200n8\0" \ "usbtty=cdc_acm\0" \ + "vram=16M\0" \ "mmcdev=1\0" \ "mmcroot=/dev/mmcblk0p2 rw\0" \ "mmcrootfstype=ext3 rootwait\0" \ "mmcargs=setenv bootargs console=${console} " \ + "vram=${vram} " \ "root=${mmcroot} " \ "rootfstype=${mmcrootfstype}\0" \ "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ @@ -182,7 +186,6 @@ "else " \ "if run loaduimage; then " \ "run mmcboot; " \ - "else run nandboot; " \ "fi; " \ "fi; " \ "fi" -- 1.7.0.4 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [U-Boot] [PATCH 8/8] ARMV7: Update default environment for OMAP4 boards 2010-07-21 19:25 ` [U-Boot] [PATCH 8/8] ARMV7: Update default environment for OMAP4 boards Steve Sakoman @ 2010-07-21 23:25 ` Nishanth Menon 0 siblings, 0 replies; 15+ messages in thread From: Nishanth Menon @ 2010-07-21 23:25 UTC (permalink / raw) To: u-boot On 07/21/2010 02:25 PM, Steve Sakoman wrote: > Specify vram on command line, remove erroneous call to nandboot > in the boot script, add CONFIG_BOOTDELAY > > Signed-off-by: Steve Sakoman<steve@sakoman.com> > --- > include/configs/omap4_panda.h | 5 ++++- > include/configs/omap4_sdp4430.h | 5 ++++- > 2 files changed, 8 insertions(+), 2 deletions(-) > > diff --git a/include/configs/omap4_panda.h b/include/configs/omap4_panda.h > index 1d76467..51c3b44 100644 > --- a/include/configs/omap4_panda.h > +++ b/include/configs/omap4_panda.h > @@ -153,6 +153,8 @@ > * Environment setup > */ > > +#define CONFIG_BOOTDELAY 5 > + why? default 3 is good rt? ;) > /* allow overwriting serial config and ethaddr */ > #define CONFIG_ENV_OVERWRITE > > @@ -160,10 +162,12 @@ > "loadaddr=0x82000000\0" \ > "console=ttyS2,115200n8\0" \ > "usbtty=cdc_acm\0" \ > + "vram=16M\0" \ > "mmcdev=1\0" \ > "mmcroot=/dev/mmcblk0p2 rw\0" \ > "mmcrootfstype=ext3 rootwait\0" \ > "mmcargs=setenv bootargs console=${console} " \ > + "vram=${vram} " \ > "root=${mmcroot} " \ > "rootfstype=${mmcrootfstype}\0" \ > "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ > @@ -181,7 +185,6 @@ > "else " \ > "if run loaduimage; then " \ > "run mmcboot; " \ > - "else run nandboot; " \ ack > "fi; " \ > "fi; " \ > "fi" > diff --git a/include/configs/omap4_sdp4430.h b/include/configs/omap4_sdp4430.h > index e9909f9..2643e43 100644 > --- a/include/configs/omap4_sdp4430.h > +++ b/include/configs/omap4_sdp4430.h > @@ -154,6 +154,8 @@ > * Environment setup > */ > > +#define CONFIG_BOOTDELAY 5 > + > /* allow overwriting serial config and ethaddr */ > #define CONFIG_ENV_OVERWRITE > > @@ -161,10 +163,12 @@ > "loadaddr=0x82000000\0" \ > "console=ttyS2,115200n8\0" \ > "usbtty=cdc_acm\0" \ > + "vram=16M\0" \ > "mmcdev=1\0" \ > "mmcroot=/dev/mmcblk0p2 rw\0" \ > "mmcrootfstype=ext3 rootwait\0" \ > "mmcargs=setenv bootargs console=${console} " \ > + "vram=${vram} " \ > "root=${mmcroot} " \ > "rootfstype=${mmcrootfstype}\0" \ > "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ > @@ -182,7 +186,6 @@ > "else " \ > "if run loaduimage; then " \ > "run mmcboot; " \ > - "else run nandboot; " \ > "fi; " \ > "fi; " \ > "fi" ^ permalink raw reply [flat|nested] 15+ messages in thread
end of thread, other threads:[~2010-07-23 16:36 UTC | newest] Thread overview: 15+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2010-07-21 19:25 [U-Boot] [PATCH 0/8] ARMV7: Enhance support for OMAP4 Steve Sakoman 2010-07-21 19:25 ` [U-Boot] [PATCH 1/8] ARMV7: Add pad mux " Steve Sakoman 2010-07-21 19:25 ` [U-Boot] [PATCH 2/8] ARMV7: Fix udelay " Steve Sakoman 2010-07-21 19:25 ` [U-Boot] [PATCH 3/8] ARMV7: Modify i2c driver for more reliable operation on OMAP4 Steve Sakoman 2010-07-21 23:22 ` Nishanth Menon 2010-07-21 23:41 ` Steve Sakoman 2010-07-21 23:53 ` Nishanth Menon 2010-07-23 16:33 ` Steve Sakoman 2010-07-23 16:36 ` Nishanth Menon 2010-07-21 19:25 ` [U-Boot] [PATCH 4/8] ARMV7: Add support for the TWL6030 I2C power chip used in OMAP4 systems Steve Sakoman 2010-07-21 19:25 ` [U-Boot] [PATCH 5/8] ARMV7: Restructure omap3 musb driver to allow code sharing between OMAP3 and OMAP4 Steve Sakoman 2010-07-21 19:25 ` [U-Boot] [PATCH 6/8] ARMV7: Enable musb driver and usbtty on OMAP4430 SDP Steve Sakoman 2010-07-21 19:25 ` [U-Boot] [PATCH 7/8] ARMV7: Enable musb driver and usbtty on OMAP4 Panda Steve Sakoman 2010-07-21 19:25 ` [U-Boot] [PATCH 8/8] ARMV7: Update default environment for OMAP4 boards Steve Sakoman 2010-07-21 23:25 ` Nishanth Menon
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