[U-Boot] [PATCH] Add mvsata support for the Sheevaplug devices

[U-Boot] [PATCH] Add mvsata support for the Sheevaplug devices

[GEAK]

    Add mvsata support to SHEEVAPLUG

Signed-off-by: G?rald Kerma <geraker@gmail.com>
---
 include/configs/sheevaplug.h |   29 +++++++++++++++++++++++++++++
 1 files changed, 29 insertions(+), 0 deletions(-)

diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h
index c5de86e..6a80c15 100644
--- a/include/configs/sheevaplug.h
+++ b/include/configs/sheevaplug.h
@@ -98,6 +98,7 @@
 #define CONFIG_CMD_NAND
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_USB
+#define CONFIG_CMD_IDE

 /*
  * NAND configuration
@@ -196,6 +197,34 @@
 #endif /* CONFIG_CMD_USB */

 /*
+ * IDe Support on SATA port0
+ */
+#ifdef CONFIG_CMD_IDE
+#define __io
+#define CONFIG_CMD_EXT2
+#define CONFIG_MVSATA_IDE
+#define CONFIG_IDE_PREINIT
+#define CONFIG_MVSATA_IDE_USE_PORT0
+/* Needs byte-swapping for ATA data register */
+#define CONFIG_IDE_SWAP_IO
+/* Data, registers and alternate blocks are at the same offset */
+#define CONFIG_SYS_ATA_DATA_OFFSET	(0x0100)
+#define CONFIG_SYS_ATA_REG_OFFSET	(0x0100)
+#define CONFIG_SYS_ATA_ALT_OFFSET	(0x0100)
+/* Each 8-bit ATA register is aligned to a 4-bytes address */
+#define CONFIG_SYS_ATA_STRIDE		4
+/* Controller supports 48-bits LBA addressing */
+#define CONFIG_LBA48
+/* CONFIG_CMD_IDE requires some #defines for ATA registers */
+#define CONFIG_SYS_IDE_MAXBUS		1
+#define CONFIG_SYS_IDE_MAXDEVICE	1
+/* ATA registers base is at SATA controller base */
+#define CONFIG_SYS_ATA_BASE_ADDR	KW_SATA_BASE
+/* ATA bus 0 is Kirkwood port 1 on sheevaplug */
+#define CONFIG_SYS_ATA_IDE0_OFFSET	KW_SATA_PORT1_OFFSET
+#endif /* CONFIG_CMD_IDE */
+
+/*
  * File system
  */
 #define CONFIG_CMD_EXT2
-- 

[U-Boot] [PATCH] Add mvsata support for the Sheevaplug devices

[Wolfgang Denk]

Dear GEAK,

In message <4C6635C1.2080507@gmail.com> you wrote:
>    Add mvsata support to SHEEVAPLUG
...
> --- a/include/configs/sheevaplug.h
> +++ b/include/configs/sheevaplug.h
> @@ -98,6 +98,7 @@
>  #define CONFIG_CMD_NAND
>  #define CONFIG_CMD_PING
>  #define CONFIG_CMD_USB
> +#define CONFIG_CMD_IDE

Please keep list sorted.

>  /*
> + * IDe Support on SATA port0
> + */

Please fix typo.


Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Technology is dominated by those who manage what they do  not  under-
stand.

[U-Boot] [PATCH v2] Add mvsata support for the Sheevaplug devices

[Gérald Kerma]

    Add mvsata support to SHEEVAPLUG

Signed-off-by: G?rald Kerma <geraker@gmail.com>
---
Changes in v2:
 * typo fixed
 * list reordered

 include/configs/sheevaplug.h |   29 +++++++++++++++++++++++++++++
 1 files changed, 29 insertions(+), 0 deletions(-)

diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h
index c5de86e..dc803e1 100644
--- a/include/configs/sheevaplug.h
+++ b/include/configs/sheevaplug.h
@@ -94,6 +94,7 @@
 #define CONFIG_CMD_AUTOSCRIPT
 #define CONFIG_CMD_DHCP
 #define CONFIG_CMD_ENV
+#define CONFIG_CMD_IDE
 #define CONFIG_CMD_MII
 #define CONFIG_CMD_NAND
 #define CONFIG_CMD_PING
@@ -196,6 +197,34 @@
 #endif /* CONFIG_CMD_USB */

 /*
+ * IDE Support on SATA port0
+ */
+#ifdef CONFIG_CMD_IDE
+#define __io
+#define CONFIG_CMD_EXT2
+#define CONFIG_MVSATA_IDE
+#define CONFIG_IDE_PREINIT
+#define CONFIG_MVSATA_IDE_USE_PORT0
+/* Needs byte-swapping for ATA data register */
+#define CONFIG_IDE_SWAP_IO
+/* Data, registers and alternate blocks are at the same offset */
+#define CONFIG_SYS_ATA_DATA_OFFSET	(0x0100)
+#define CONFIG_SYS_ATA_REG_OFFSET	(0x0100)
+#define CONFIG_SYS_ATA_ALT_OFFSET	(0x0100)
+/* Each 8-bit ATA register is aligned to a 4-bytes address */
+#define CONFIG_SYS_ATA_STRIDE		4
+/* Controller supports 48-bits LBA addressing */
+#define CONFIG_LBA48
+/* CONFIG_CMD_IDE requires some #defines for ATA registers */
+#define CONFIG_SYS_IDE_MAXBUS		1
+#define CONFIG_SYS_IDE_MAXDEVICE	1
+/* ATA registers base is at SATA controller base */
+#define CONFIG_SYS_ATA_BASE_ADDR	KW_SATA_BASE
+/* ATA bus 0 is Kirkwood port 1 on sheevaplug */
+#define CONFIG_SYS_ATA_IDE0_OFFSET	KW_SATA_PORT1_OFFSET
+#endif /* CONFIG_CMD_IDE */
+
+/*
  * File system
  */
 #define CONFIG_CMD_EXT2

[U-Boot] [PATCH] Add mvsata support for the Sheevaplug devices

[Sergei Shtylyov]

Hello.

GEAK wrote:

>     Add mvsata support to SHEEVAPLUG

> Signed-off-by: G?rald Kerma <geraker@gmail.com>
> ---
>  include/configs/sheevaplug.h |   29 +++++++++++++++++++++++++++++
>  1 files changed, 29 insertions(+), 0 deletions(-)

> diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h
> index c5de86e..6a80c15 100644
> --- a/include/configs/sheevaplug.h
> +++ b/include/configs/sheevaplug.h
[...]
> @@ -196,6 +197,34 @@
>  #endif /* CONFIG_CMD_USB */
> 
>  /*
> + * IDe Support on SATA port0
> + */
> +#ifdef CONFIG_CMD_IDE
> +#define __io
> +#define CONFIG_CMD_EXT2
> +#define CONFIG_MVSATA_IDE
> +#define CONFIG_IDE_PREINIT
> +#define CONFIG_MVSATA_IDE_USE_PORT0
> +/* Needs byte-swapping for ATA data register */
> +#define CONFIG_IDE_SWAP_IO
> +/* Data, registers and alternate blocks are at the same offset */
> +#define CONFIG_SYS_ATA_DATA_OFFSET	(0x0100)
> +#define CONFIG_SYS_ATA_REG_OFFSET	(0x0100)
> +#define CONFIG_SYS_ATA_ALT_OFFSET	(0x0100)

    The parens are useless here.

WBR, Sergei

[U-Boot] [PATCH] Add mvsata support for the Sheevaplug devices

[Albert ARIBAUD]

Le 14/08/2010 14:19, Sergei Shtylyov a ?crit :

>> +#define CONFIG_SYS_ATA_DATA_OFFSET	(0x0100)
>> +#define CONFIG_SYS_ATA_REG_OFFSET	(0x0100)
>> +#define CONFIG_SYS_ATA_ALT_OFFSET	(0x0100)
>
>      The parens are useless here.

As this code comes from the mvsata_ide driver introduction, Sergei's 
comment also applies to edminiv2, openrd_base and the upcoming dns323 
configs.

However, the fix is not necessarily an urgent one; and I think it could 
be handled only once for all orion5x boards including edminv2 and dns323 
if it is done within the SoC-specific configuration header file we've 
already discussed.

The fix could even apply to kirkwood too, if there was a good way of 
defining a driver-specific configuration file and then have it included 
from SoC-specific config files for orion5x and kirkwood. Where could 
such a driver-specifc config file live?

Amicalement,
-- 
Albert.