[U-Boot] [PATCH v3 2/2] TI: DaVinci DA850 EVM: support passing maximum allowed cpu clock rate information to kernel

[Stefano Babic <sbabic@denx.de>]

Sekhar Nori wrote:
> The TI DA850/OMAP-L138/AM18x EVM can be populated with devices
> having different maximum allowed CPU clock rating.
> 
> The maximum clock the chip can support can only be determined from
> the label on the package (not software readable).
> 
> Introduce a method to pass the maximum allowed clock rate information
> to kernel using ATAG_REVISION. The kernel uses this information to
> determine the maximum cpu clock rate reachable using cpufreq.
> 
> Note that U-Boot itself does not set the CPU clock rate. The CPU
> clock is setup by a primary bootloader ("UBL"). The rate setup by
> UBL could be different from the maximum clock rate supported by the
> device.
> 
> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
> ---
> Changes in v3:
> a) renamed maxspeed to maxcpuclk
> b) add information regarding the new environment variable in README.davinci
> c) use if-else instead of switch to check for value range rather than specific
>    values of maxcpuclk
> d) change comment to document values returned in bit[0-3] by get_board_rev() in
>    binary
> 
>  board/davinci/da8xxevm/da850evm.c |   33 +++++++++++++++++++++++++++++++++
>  doc/README.davinci                |   13 +++++++++++++
>  include/configs/da850evm.h        |    1 +
>  3 files changed, 47 insertions(+), 0 deletions(-)

Hi,

sorry if I come only late in the discussion, I have a general question.
As I see, the UBL does not take care at all of the possibility to have
different frequencies, and sets the PLL with a fix value (300 Mhz, as I
read in sources). From my point of view, it makes sense to use the
maximum allowed cpu clock if we then set the CPU to increase the
performances.
If you set the value in a u-boot environment, the value could be easy
overwritten and a wrong value could be displayed. So I have doubt on
using an environment to get a so hardware-related value..

Do you plan to use the maximum cpu clock to set the PLL ? Or is it only
for info purposes ?

Best regards,
Stefano Babic


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