From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefano Babic Date: Wed, 13 Oct 2010 10:53:04 +0200 Subject: [U-Boot] [PATCH 3/4] MX51: Add video support In-Reply-To: <20101012151254.C4EDE14F310@gemini.denx.de> References: <1286875504-9058-1-git-send-email-sbabic@denx.de> <1286875504-9058-2-git-send-email-sbabic@denx.de> <1286875504-9058-3-git-send-email-sbabic@denx.de> <1286875504-9058-4-git-send-email-sbabic@denx.de> <20101012113409.5B97214F310@gemini.denx.de> <4CB4776D.8050905@denx.de> <20101012151254.C4EDE14F310@gemini.denx.de> Message-ID: <4CB57370.1040502@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 10/12/2010 05:12 PM, Wolfgang Denk wrote: > Dear stefano babic, > > In message <4CB4776D.8050905@denx.de> you wrote: >> >>> Does it work with both "dcache on" and "dcache off" settings? >> >> Well, as there is not yet support for L2-Cache on the MX51, we can say >> yes ;-). However, this range of memory is used directly from the IPU >> processor and not by the CPU, as well as in Linux without calling any >> function to invalidate the cache. But I agree, it should be tested again >> when support for L2-cache will be integrated. > > What about L1 cache? Have Heiko's chache patches been adapted for MX5 > yet? No, they are not - however, probably the cache functions in arch/arm/cpu/omap3 can be reused for the i.MX51, too. Stefano -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de =====================================================================