* [U-Boot] [PATCH 1/2] Blackfin: update anomaly lists to latest sheets
@ 2010-10-15 0:23 Mike Frysinger
2010-10-15 0:23 ` [U-Boot] [PATCH 2/2] Blackfin: workaround anomaly 05000440 Mike Frysinger
0 siblings, 1 reply; 3+ messages in thread
From: Mike Frysinger @ 2010-10-15 0:23 UTC (permalink / raw)
To: u-boot
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
---
arch/blackfin/include/asm/mach-bf518/anomaly.h | 2 ++
arch/blackfin/include/asm/mach-bf527/anomaly.h | 4 +++-
arch/blackfin/include/asm/mach-bf533/anomaly.h | 7 ++++++-
arch/blackfin/include/asm/mach-bf537/anomaly.h | 7 ++++++-
arch/blackfin/include/asm/mach-bf538/anomaly.h | 7 +++++--
arch/blackfin/include/asm/mach-bf548/anomaly.h | 7 ++++---
arch/blackfin/include/asm/mach-bf561/anomaly.h | 11 +++++++++--
7 files changed, 35 insertions(+), 10 deletions(-)
diff --git a/arch/blackfin/include/asm/mach-bf518/anomaly.h b/arch/blackfin/include/asm/mach-bf518/anomaly.h
index d808b45..24918c5 100644
--- a/arch/blackfin/include/asm/mach-bf518/anomaly.h
+++ b/arch/blackfin/include/asm/mach-bf518/anomaly.h
@@ -88,6 +88,8 @@
#define ANOMALY_05000477 (1)
/* Reads of ITEST_COMMAND and ITEST_DATA Registers Cause Cache Corruption */
#define ANOMALY_05000481 (1)
+/* IFLUSH sucks at life */
+#define ANOMALY_05000491 (1)
/* Anomalies that don't exist on this proc */
#define ANOMALY_05000099 (0)
diff --git a/arch/blackfin/include/asm/mach-bf527/anomaly.h b/arch/blackfin/include/asm/mach-bf527/anomaly.h
index 9358afa..72a6369 100644
--- a/arch/blackfin/include/asm/mach-bf527/anomaly.h
+++ b/arch/blackfin/include/asm/mach-bf527/anomaly.h
@@ -12,7 +12,7 @@
/* This file should be up to date with:
* - Revision E, 03/15/2010; ADSP-BF526 Blackfin Processor Anomaly List
- * - Revision G, 08/25/2009; ADSP-BF527 Blackfin Processor Anomaly List
+ * - Revision H, 04/29/2010; ADSP-BF527 Blackfin Processor Anomaly List
*/
#ifndef _MACH_ANOMALY_H_
@@ -220,6 +220,8 @@
#define ANOMALY_05000483 (1)
/* PLL_CTL Change Using bfrom_SysControl() Can Result in Processor Overclocking */
#define ANOMALY_05000485 (_ANOMALY_BF526_BF527(< 2, < 3))
+/* The CODEC Zero-Cross Detect Feature is not Functional */
+#define ANOMALY_05000487 (1)
/* IFLUSH sucks at life */
#define ANOMALY_05000491 (1)
diff --git a/arch/blackfin/include/asm/mach-bf533/anomaly.h b/arch/blackfin/include/asm/mach-bf533/anomaly.h
index 78f8721..30e0eba 100644
--- a/arch/blackfin/include/asm/mach-bf533/anomaly.h
+++ b/arch/blackfin/include/asm/mach-bf533/anomaly.h
@@ -11,7 +11,7 @@
*/
/* This file should be up to date with:
- * - Revision E, 09/18/2008; ADSP-BF531/BF532/BF533 Blackfin Processor Anomaly List
+ * - Revision F, 05/25/2010; ADSP-BF531/BF532/BF533 Blackfin Processor Anomaly List
*/
#ifndef _MACH_ANOMALY_H_
@@ -206,6 +206,10 @@
#define ANOMALY_05000443 (1)
/* False Hardware Error when RETI Points to Invalid Memory */
#define ANOMALY_05000461 (1)
+/* Synchronization Problem at Startup May Cause SPORT Transmit Channels to Misalign */
+#define ANOMALY_05000462 (1)
+/* Boot Failure When SDRAM Control Signals Toggle Coming Out Of Reset */
+#define ANOMALY_05000471 (1)
/* Interrupted 32-Bit SPORT Data Register Access Results In Underflow */
#define ANOMALY_05000473 (1)
/* Possible Lockup Condition whem Modifying PLL from External Memory */
@@ -357,6 +361,7 @@
#define ANOMALY_05000430 (0)
#define ANOMALY_05000432 (0)
#define ANOMALY_05000435 (0)
+#define ANOMALY_05000440 (0)
#define ANOMALY_05000447 (0)
#define ANOMALY_05000448 (0)
#define ANOMALY_05000456 (0)
diff --git a/arch/blackfin/include/asm/mach-bf537/anomaly.h b/arch/blackfin/include/asm/mach-bf537/anomaly.h
index 43df6af..d3a2966 100644
--- a/arch/blackfin/include/asm/mach-bf537/anomaly.h
+++ b/arch/blackfin/include/asm/mach-bf537/anomaly.h
@@ -11,7 +11,7 @@
*/
/* This file should be up to date with:
- * - Revision D, 09/18/2008; ADSP-BF534/ADSP-BF536/ADSP-BF537 Blackfin Processor Anomaly List
+ * - Revision E, 05/25/2010; ADSP-BF534/ADSP-BF536/ADSP-BF537 Blackfin Processor Anomaly List
*/
#ifndef _MACH_ANOMALY_H_
@@ -160,12 +160,16 @@
#define ANOMALY_05000443 (1)
/* False Hardware Error when RETI Points to Invalid Memory */
#define ANOMALY_05000461 (1)
+/* Synchronization Problem at Startup May Cause SPORT Transmit Channels to Misalign */
+#define ANOMALY_05000462 (1)
/* Interrupted 32-Bit SPORT Data Register Access Results In Underflow */
#define ANOMALY_05000473 (1)
/* Possible Lockup Condition whem Modifying PLL from External Memory */
#define ANOMALY_05000475 (1)
/* TESTSET Instruction Cannot Be Interrupted */
#define ANOMALY_05000477 (1)
+/* Multiple Simultaneous Urgent DMA Requests May Cause DMA System Instability */
+#define ANOMALY_05000480 (__SILICON_REVISION__ < 3)
/* Reads of ITEST_COMMAND and ITEST_DATA Registers Cause Cache Corruption */
#define ANOMALY_05000481 (1)
/* IFLUSH sucks at life */
@@ -211,6 +215,7 @@
#define ANOMALY_05000430 (0)
#define ANOMALY_05000432 (0)
#define ANOMALY_05000435 (0)
+#define ANOMALY_05000440 (0)
#define ANOMALY_05000447 (0)
#define ANOMALY_05000448 (0)
#define ANOMALY_05000456 (0)
diff --git a/arch/blackfin/include/asm/mach-bf538/anomaly.h b/arch/blackfin/include/asm/mach-bf538/anomaly.h
index e22d23c..4bc1f4a 100644
--- a/arch/blackfin/include/asm/mach-bf538/anomaly.h
+++ b/arch/blackfin/include/asm/mach-bf538/anomaly.h
@@ -11,8 +11,8 @@
*/
/* This file should be up to date with:
- * - Revision H, 07/10/2009; ADSP-BF538/BF538F Blackfin Processor Anomaly List
- * - Revision M, 07/10/2009; ADSP-BF539/BF539F Blackfin Processor Anomaly List
+ * - Revision I, 05/25/2010; ADSP-BF538/BF538F Blackfin Processor Anomaly List
+ * - Revision N, 05/25/2010; ADSP-BF539/BF539F Blackfin Processor Anomaly List
*/
#ifndef _MACH_ANOMALY_H_
@@ -142,6 +142,8 @@
#define ANOMALY_05000477 (1)
/* Reads of ITEST_COMMAND and ITEST_DATA Registers Cause Cache Corruption */
#define ANOMALY_05000481 (1)
+/* IFLUSH sucks@life */
+#define ANOMALY_05000491 (1)
/* Anomalies that don't exist on this proc */
#define ANOMALY_05000099 (0)
@@ -184,6 +186,7 @@
#define ANOMALY_05000430 (0)
#define ANOMALY_05000432 (0)
#define ANOMALY_05000435 (0)
+#define ANOMALY_05000440 (0)
#define ANOMALY_05000447 (0)
#define ANOMALY_05000448 (0)
#define ANOMALY_05000456 (0)
diff --git a/arch/blackfin/include/asm/mach-bf548/anomaly.h b/arch/blackfin/include/asm/mach-bf548/anomaly.h
index 7bda09c..b9f4ecc 100644
--- a/arch/blackfin/include/asm/mach-bf548/anomaly.h
+++ b/arch/blackfin/include/asm/mach-bf548/anomaly.h
@@ -11,7 +11,7 @@
*/
/* This file should be up to date with:
- * - Revision I, 07/23/2009; ADSP-BF542/BF544/BF547/BF548/BF549 Blackfin Processor Anomaly List
+ * - Revision J, 06/03/2010; ADSP-BF542/BF544/BF547/BF548/BF549 Blackfin Processor Anomaly List
*/
#ifndef _MACH_ANOMALY_H_
@@ -110,8 +110,6 @@
#define ANOMALY_05000379 (1)
/* 8-Bit NAND Flash Boot Mode Not Functional */
#define ANOMALY_05000382 (__SILICON_REVISION__ < 1)
-/* Some ATAPI Modes Are Not Functional */
-#define ANOMALY_05000383 (1)
/* Boot from OTP Memory Not Functional */
#define ANOMALY_05000385 (__SILICON_REVISION__ < 1)
/* bfrom_SysControl() Firmware Routine Not Functional */
@@ -218,6 +216,8 @@
#define ANOMALY_05000481 (1)
/* Possible USB Data Corruption When Multiple Endpoints Are Accessed by the Core */
#define ANOMALY_05000483 (1)
+/* DDR Trim May Not Be Performed for Certain VLEV Values in OTP Page PBS00L */
+#define ANOMALY_05000484 (__SILICON_REVISION__ < 3)
/* PLL_CTL Change Using bfrom_SysControl() Can Result in Processor Overclocking */
#define ANOMALY_05000485 (__SILICON_REVISION__ >= 2)
/* IFLUSH sucks at life */
@@ -272,6 +272,7 @@
#define ANOMALY_05000412 (0)
#define ANOMALY_05000432 (0)
#define ANOMALY_05000435 (0)
+#define ANOMALY_05000440 (0)
#define ANOMALY_05000475 (0)
#endif
diff --git a/arch/blackfin/include/asm/mach-bf561/anomaly.h b/arch/blackfin/include/asm/mach-bf561/anomaly.h
index 4c108c9..9313c27 100644
--- a/arch/blackfin/include/asm/mach-bf561/anomaly.h
+++ b/arch/blackfin/include/asm/mach-bf561/anomaly.h
@@ -11,7 +11,7 @@
*/
/* This file should be up to date with:
- * - Revision Q, 11/07/2008; ADSP-BF561 Blackfin Processor Anomaly List
+ * - Revision R, 05/25/2010; ADSP-BF561 Blackfin Processor Anomaly List
*/
#ifndef _MACH_ANOMALY_H_
@@ -286,12 +286,18 @@
#define ANOMALY_05000428 (__SILICON_REVISION__ > 3)
/* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */
#define ANOMALY_05000443 (1)
+/* SCKELOW Feature Is Not Functional */
+#define ANOMALY_05000458 (1)
/* False Hardware Error when RETI Points to Invalid Memory */
#define ANOMALY_05000461 (1)
+/* Synchronization Problem at Startup May Cause SPORT Transmit Channels to Misalign */
+#define ANOMALY_05000462 (1)
+/* Boot Failure When SDRAM Control Signals Toggle Coming Out Of Reset */
+#define ANOMALY_05000471 (1)
/* Interrupted 32-Bit SPORT Data Register Access Results In Underflow */
#define ANOMALY_05000473 (1)
/* Possible Lockup Condition whem Modifying PLL from External Memory */
-#define ANOMALY_05000475 (__SILICON_REVISION__ < 4)
+#define ANOMALY_05000475 (1)
/* TESTSET Instruction Cannot Be Interrupted */
#define ANOMALY_05000477 (1)
/* Reads of ITEST_COMMAND and ITEST_DATA Registers Cause Cache Corruption */
@@ -316,6 +322,7 @@
#define ANOMALY_05000430 (0)
#define ANOMALY_05000432 (0)
#define ANOMALY_05000435 (0)
+#define ANOMALY_05000440 (0)
#define ANOMALY_05000447 (0)
#define ANOMALY_05000448 (0)
#define ANOMALY_05000456 (0)
--
1.7.3.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [U-Boot] [PATCH 2/2] Blackfin: workaround anomaly 05000440
2010-10-15 0:23 [U-Boot] [PATCH 1/2] Blackfin: update anomaly lists to latest sheets Mike Frysinger
@ 2010-10-15 0:23 ` Mike Frysinger
2010-10-17 20:10 ` Sergei Shtylyov
0 siblings, 1 reply; 3+ messages in thread
From: Mike Frysinger @ 2010-10-15 0:23 UTC (permalink / raw)
To: u-boot
We cannot rely on the syscontrol rom func to program PLL_DIV with anomaly
05000440 is in effect, so manually program the MMR when necessary.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
---
arch/blackfin/cpu/initcode.c | 6 +++++-
1 files changed, 5 insertions(+), 1 deletions(-)
diff --git a/arch/blackfin/cpu/initcode.c b/arch/blackfin/cpu/initcode.c
index 007f5ce..433d477 100644
--- a/arch/blackfin/cpu/initcode.c
+++ b/arch/blackfin/cpu/initcode.c
@@ -391,7 +391,9 @@ program_clocks(ADI_BOOT_DATA *bs, bool put_into_srfs)
/* Always programming PLL_LOCKCNT avoids Anomaly 05000430 */
ADI_SYSCTRL_VALUES memory_settings;
- uint32_t actions = SYSCTRL_WRITE | SYSCTRL_PLLCTL | SYSCTRL_PLLDIV | SYSCTRL_LOCKCNT;
+ uint32_t actions = SYSCTRL_WRITE | SYSCTRL_PLLCTL | SYSCTRL_LOCKCNT;
+ if (!ANOMALY_05000440)
+ actions |= SYSCTRL_PLLDIV;
if (CONFIG_HAS_VR) {
actions |= SYSCTRL_VRCTL;
if (CONFIG_VR_CTL_VAL & FREQ_MASK)
@@ -410,6 +412,8 @@ program_clocks(ADI_BOOT_DATA *bs, bool put_into_srfs)
serial_putc('e');
bfrom_SysControl(actions, &memory_settings, NULL);
serial_putc('f');
+ if (ANOMALY_05000440)
+ bfin_write_PLL_DIV(CONFIG_PLL_DIV_VAL);
#if ANOMALY_05000432
bfin_write_SIC_IWR1(-1);
#endif
--
1.7.3.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [U-Boot] [PATCH 2/2] Blackfin: workaround anomaly 05000440
2010-10-15 0:23 ` [U-Boot] [PATCH 2/2] Blackfin: workaround anomaly 05000440 Mike Frysinger
@ 2010-10-17 20:10 ` Sergei Shtylyov
0 siblings, 0 replies; 3+ messages in thread
From: Sergei Shtylyov @ 2010-10-17 20:10 UTC (permalink / raw)
To: u-boot
Hello.
On 15-10-2010 04:23, Mike Frysinger wrote:
> We cannot rely on the syscontrol rom func to program PLL_DIV with anomaly
> 05000440 is in effect, so manually program the MMR when necessary.
> Signed-off-by: Mike Frysinger<vapier@gentoo.org>
[...]
> diff --git a/arch/blackfin/cpu/initcode.c b/arch/blackfin/cpu/initcode.c
> index 007f5ce..433d477 100644
> --- a/arch/blackfin/cpu/initcode.c
> +++ b/arch/blackfin/cpu/initcode.c
> @@ -391,7 +391,9 @@ program_clocks(ADI_BOOT_DATA *bs, bool put_into_srfs)
>
> /* Always programming PLL_LOCKCNT avoids Anomaly 05000430 */
> ADI_SYSCTRL_VALUES memory_settings;
> - uint32_t actions = SYSCTRL_WRITE | SYSCTRL_PLLCTL | SYSCTRL_PLLDIV | SYSCTRL_LOCKCNT;
> + uint32_t actions = SYSCTRL_WRITE | SYSCTRL_PLLCTL | SYSCTRL_LOCKCNT;
An empty line is needed here...
> + if (!ANOMALY_05000440)
> + actions |= SYSCTRL_PLLDIV;
> if (CONFIG_HAS_VR) {
> actions |= SYSCTRL_VRCTL;
> if (CONFIG_VR_CTL_VAL& FREQ_MASK)
WBR, Sergei
^ permalink raw reply [flat|nested] 3+ messages in thread
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2010-10-15 0:23 [U-Boot] [PATCH 1/2] Blackfin: update anomaly lists to latest sheets Mike Frysinger
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2010-10-17 20:10 ` Sergei Shtylyov
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