From mboxrd@z Thu Jan 1 00:00:00 1970 From: Graeme Russ Date: Sun, 14 Nov 2010 16:48:17 +1100 Subject: [U-Boot] RFC: Aligning arch initialisation sequences In-Reply-To: <4CDF6F2E.9040900@gmail.com> References: <4CD67A22.9040802@gmail.com> <201011091835.38581.vapier@gentoo.org> <4CDE1107.80108@gmail.com> <4CDE4A53.4070106@free.fr> <4CDE741C.1020507@gmail.com> <4CDF6F2E.9040900@gmail.com> Message-ID: <4CDF7821.4080300@gmail.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 14/11/10 16:10, Graeme Russ wrote: > On 13/11/10 22:18, Graeme Russ wrote: >> On 13/11/10 19:20, Albert ARIBAUD wrote: >>> Le 13/11/2010 05:16, Graeme Russ a ?crit : >>> > static inline void *get_gd_ptr(void) > { > void *gd_ptr; > > asm volatile("gs mov 0, %0\n" : "=r" (gd_ptr)); > return gd_ptr; > } > static inline gd_t *get_gd_ptr(void) { gd_t *gd_ptr; asm volatile("fs mov 0, %0\n" : "=r" (gd_ptr)); return gd_ptr; } works a treat :) Is there any reason the other arches could not implement an inline function as well? ARM for example: -#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r8") +static inline gd_t *gd(void) +{ + gd_t *gd_ptr; + + asm volatile("mov r8, %0\n" : "=r" (gd_ptr)); + return gd_ptr; +} Is the compiler smart enough to optimise out and not increase code size? If so, all the arches can have identical implementations for using global data Regards, Graeme