From mboxrd@z Thu Jan 1 00:00:00 1970 From: Timur Tabi Date: Wed, 1 Dec 2010 17:28:28 -0600 Subject: [U-Boot] [PATCH] p1022ds: fix switching of DIU/LBC signals In-Reply-To: <20101201170018.62ab7921@udp111988uds.am.freescale.net> References: <1291163785-24443-1-git-send-email-timur@freescale.com> <20101130195010.4fbdd9c6@udp111988uds.am.freescale.net> <4CF6D025.4010802@freescale.com> <20101201170018.62ab7921@udp111988uds.am.freescale.net> Message-ID: <4CF6DA1C.3080004@freescale.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Scott Wood wrote: >> You told me that since I'm doing a read following a write to uncached memory, >> > that I don't need a sync. > No, I was talking about a write followed by a read, to the same location. That's what I said. Read following write == write followed by read. > out_8 should be fixed to behave like the other accessors. Ok, but I'm not using any of the I/O accessors, so this doesn't affect me. I just need to make sure that the read is executed after the write, and that the read completes before I continue. So I should I put an isync between the write and the read, and a sync after the read? -- Timur Tabi Linux kernel developer at Freescale