From mboxrd@z Thu Jan  1 00:00:00 1970
From: Reinhard Meyer <u-boot@emk-elektronik.de>
Date: Sun, 05 Dec 2010 10:51:27 +0100
Subject: [U-Boot] [PATCH] AT91RM9200: fix AT91_PMC_MCKR_MDIV_* defines
 for	this CPU
In-Reply-To: <4CE5D0EA.8070306@gmail.com>
References: <4CE5D0EA.8070306@gmail.com>
Message-ID: <4CFB609F.9030307@emk-elektronik.de>
List-Id: <u-boot.lists.denx.de>
MIME-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
To: u-boot@lists.denx.de

Dear clagix at gmail.com,
> The AT91RM9200 has a different bit assignment in PMC MCKR register than
> it's successors (verified by Atmel's manuals on AT91RM9200 and AT91SAM926).
> AT91RM9200 supports the additional divider of 3.
> 
> Signed-off-by: Guido Classen <clagix@gmail.com>
> 
> --- u-boot-git/arch/arm/include/asm/arch-at91/at91_pmc.h	2010-11-12 18:30:31.000000000 +0100
> +++ u-boot-ccm2200/arch/arm/include/asm/arch-at91/at91_pmc.h	2010-11-16 22:00:56.000000000 +0100
> @@ -91,10 +91,19 @@
>   #define AT91_PMC_MCKR_PRES_64		0x00000018
>   #define AT91_PMC_MCKR_PRES_MASK		0x0000001C
> 
> +#ifdef CONFIG_AT91RM9200
> +#define AT91_PMC_MCKR_MDIV_1		0x00000000
> +#define AT91_PMC_MCKR_MDIV_2		0x00000100
> +#define AT91_PMC_MCKR_MDIV_3		0x00000200
> +#define AT91_PMC_MCKR_MDIV_4		0x00000300
> +#define AT91_PMC_MCKR_MDIV_MASK		0x00000300
> +#else
>   #define AT91_PMC_MCKR_MDIV_1		0x00000000
>   #define AT91_PMC_MCKR_MDIV_2		0x00000100
>   #define AT91_PMC_MCKR_MDIV_4		0x00000200
>   #define AT91_PMC_MCKR_MDIV_MASK		0x00000300
> +#endif
> 
>   #define AT91_PMC_MCKR_PLLADIV_1		0x00001000
>   #define AT91_PMC_MCKR_PLLADIV_2		0x00002000

This patch is not in git-format-patch format.
You hijacked another thread to post this message.

Please resubmit!

Best Regards,
Reinhard