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From: Felix Radensky <felix@embedded-sol.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] Multiple chip support in ndfc driver
Date: Sun, 05 Dec 2010 16:27:02 +0200	[thread overview]
Message-ID: <4CFBA136.9030808@embedded-sol.com> (raw)

Hi,

On a custom 460EX board I have a 2Gbyte NAND device, 1Gbyte per chip select.
I'm trying to enable support for the second NAND CS, so far without 
success.

U-Boot properly detects both devices, (manufacturer, size, bus width). 
First device
works as expected, on second device bad blocks are reported correctly, 
but attempt
to erase the device results in I/O errors on every block. The bank 
settings are identical
for both chips.

What am I missing ?

BTW, I was wandering why NAND TLB window size on Canyonlands is 16Mbytes.
Also, why NAND start address for TLB mapping is calculated as
CONFIG_SYS_NAND_ADDR + CONFIG_SYS_NAND_CS

Thanks in advance.

Felix.

             reply	other threads:[~2010-12-05 14:27 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-12-05 14:27 Felix Radensky [this message]
2010-12-06 10:09 ` [U-Boot] Multiple chip support in ndfc driver Stefan Roese
2010-12-07 10:50   ` Felix Radensky

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