[U-Boot] [PATCH 0/3] fsl_esdhc fixes

[U-Boot] [PATCH 0/3] fsl_esdhc fixes

[Kumar Gala]

These are some various fsl_esdhc fixes that we've had around for some
time to get SDHC/MMC working on various boards.

- k

[U-Boot] [PATCH 1/3] fsl_esdhc: Use mmc_set_clock to set initial speed

[Kumar Gala]

From: Jerry Huang <Chang-Ming.Huang@freescale.com>

After booting the u-boot, and first using some SD card (such as Sandisk 2G SD
card), because the field 'clock' of struct mmc is zero, this will cause
the read transfer is always active and SDHC DATA line is always active,
therefore, driver can't handle the next command.

Therefore, we use mmc_set_clock to setup both the data structure and HW
to the initial clock speed of 400000Hz.

Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
 drivers/mmc/fsl_esdhc.c |    2 +-
 include/mmc.h           |    1 +
 2 files changed, 2 insertions(+), 1 deletions(-)

diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 57cd4ee..73d5cd3 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -398,7 +398,7 @@ static int esdhc_init(struct mmc *mmc)
 	esdhc_write32(&regs->sysctl, SYSCTL_HCKEN | SYSCTL_IPGEN);
 
 	/* Set the initial clock speed */
-	set_sysctl(mmc, 400000);
+	mmc_set_clock(mmc, 400000);
 
 	/* Disable the BRR and BWR bits in IRQSTAT */
 	esdhc_clrbits32(&regs->irqstaten, IRQSTATEN_BRR | IRQSTATEN_BWR);
diff --git a/include/mmc.h b/include/mmc.h
index 9f94f42..cc4aa36 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -280,6 +280,7 @@ int mmc_register(struct mmc *mmc);
 int mmc_initialize(bd_t *bis);
 int mmc_init(struct mmc *mmc);
 int mmc_read(struct mmc *mmc, u64 src, uchar *dst, int size);
+void mmc_set_clock(struct mmc *mmc, uint clock);
 struct mmc *find_mmc_device(int dev_num);
 int mmc_set_dev(int dev_num);
 void print_mmc_devices(char separator);
-- 
1.7.2.3

[U-Boot] [PATCH 2/3] fsl_esdhc: Fix max clock frequency

[Kumar Gala]

From: Jerry Huang <Changm-Ming.Huang@freescale.com>

The max clock of MMC is 52MHz

Signed-off-by: Jerry Huang <Changm-Ming.Huang@freescale.com>
---
 drivers/mmc/fsl_esdhc.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 73d5cd3..7bab2f6 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -477,7 +477,7 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
 		mmc->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
 
 	mmc->f_min = 400000;
-	mmc->f_max = MIN(gd->sdhc_clk, 50000000);
+	mmc->f_max = MIN(gd->sdhc_clk, 52000000);
 
 	mmc_register(mmc);
 
-- 
1.7.2.3

[U-Boot] [PATCH 3/3] fsl_esdhc: Fix the voltage validation process

[Kumar Gala]

From: Li Yang <leoli@freescale.com>

The current code use all the voltage range support by the host
controller to do the validation.  This will cause problem when
the host supports Low Voltage Range.  Change the validation
voltage to be based on board setup.

Signed-off-by: Li Yang <leoli@freescale.com>
---
 drivers/mmc/fsl_esdhc.c |   20 +++++++++++++++-----
 1 files changed, 15 insertions(+), 5 deletions(-)

diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 7bab2f6..40b136c 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -444,7 +444,7 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
 {
 	struct fsl_esdhc *regs;
 	struct mmc *mmc;
-	u32 caps;
+	u32 caps, voltage_caps;
 
 	if (!cfg)
 		return -1;
@@ -462,14 +462,24 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
 	mmc->set_ios = esdhc_set_ios;
 	mmc->init = esdhc_init;
 
+	voltage_caps = 0;
 	caps = regs->hostcapblt;
-
 	if (caps & ESDHC_HOSTCAPBLT_VS18)
-		mmc->voltages |= MMC_VDD_165_195;
+		voltage_caps |= MMC_VDD_165_195;
 	if (caps & ESDHC_HOSTCAPBLT_VS30)
-		mmc->voltages |= MMC_VDD_29_30 | MMC_VDD_30_31;
+		voltage_caps |= MMC_VDD_29_30 | MMC_VDD_30_31;
 	if (caps & ESDHC_HOSTCAPBLT_VS33)
-		mmc->voltages |= MMC_VDD_32_33 | MMC_VDD_33_34;
+		voltage_caps |= MMC_VDD_32_33 | MMC_VDD_33_34;
+
+#ifdef CONFIG_SYS_SD_VOLTAGE
+	mmc->voltages = CONFIG_SYS_SD_VOLTAGE;
+#else
+	mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
+#endif
+	if ((mmc->voltages & voltage_caps) == 0) {
+		printf("voltage not supported by controller\n");
+		return -1;
+	}
 
 	mmc->host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT;
 
-- 
1.7.2.3

[U-Boot] [PATCH 3/3] fsl_esdhc: Fix the voltage validation process

[Stefano Babic]

On 12/15/2010 09:20 AM, Kumar Gala wrote:
> From: Li Yang <leoli@freescale.com>
> 
> The current code use all the voltage range support by the host
> controller to do the validation.  This will cause problem when
> the host supports Low Voltage Range.  Change the validation
> voltage to be based on board setup.
> 
> Signed-off-by: Li Yang <leoli@freescale.com>
> ---

Tested-by: Stefano Babic <sbabic@denx.de>

Regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: office at denx.de
=====================================================================

[U-Boot] [PATCH 2/3] fsl_esdhc: Fix max clock frequency

[Stefano Babic]

On 12/15/2010 09:20 AM, Kumar Gala wrote:
> From: Jerry Huang <Changm-Ming.Huang@freescale.com>
> 
> The max clock of MMC is 52MHz
> 
> Signed-off-by: Jerry Huang <Changm-Ming.Huang@freescale.com>
> ---

It runs successfully on i.MX51.

Tested-by: Stefano Babic <sbabic@denx.de>

Regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: office at denx.de
=====================================================================

[U-Boot] [PATCH 1/3] fsl_esdhc: Use mmc_set_clock to set initial speed

[Stefano Babic]

On 12/15/2010 09:20 AM, Kumar Gala wrote:
> From: Jerry Huang <Chang-Ming.Huang@freescale.com>
> 
> After booting the u-boot, and first using some SD card (such as Sandisk 2G SD
> card), because the field 'clock' of struct mmc is zero, this will cause
> the read transfer is always active and SDHC DATA line is always active,
> therefore, driver can't handle the next command.
> 
> Therefore, we use mmc_set_clock to setup both the data structure and HW
> to the initial clock speed of 400000Hz.
> 
> Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
> ---

Tested on i.MX51, too.

Tested-by: Stefano Babic <sbabic@denx.de>

Regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: office at denx.de
=====================================================================

[U-Boot] [PATCH 0/3] fsl_esdhc fixes

[Kumar Gala]

On Dec 15, 2010, at 2:20 AM, Kumar Gala wrote:

> These are some various fsl_esdhc fixes that we've had around for some
> time to get SDHC/MMC working on various boards.

Stefano,

Can you take a look at what if any impact these have on the imx side.

thanks

- k

[U-Boot] [PATCH 0/3] fsl_esdhc fixes

[Stefano Babic]

On 12/15/2010 02:59 PM, Kumar Gala wrote:
> 
> On Dec 15, 2010, at 2:20 AM, Kumar Gala wrote:
> 
>> These are some various fsl_esdhc fixes that we've had around for some
>> time to get SDHC/MMC working on various boards.
> 
> Stefano,
> 
> Can you take a look at what if any impact these have on the imx side.
> 

Hi Kumar,

I have tested successfully your patches on a i.MX51 target. I will send
now my tested-by.

Stefano

-- 
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: office at denx.de
=====================================================================