From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jens Scharsig Date: Sat, 18 Dec 2010 13:30:04 +0100 Subject: [U-Boot] [PATCH alternate V3] at91rm9200: fix lowlevel_init() SMRDATA size In-Reply-To: <1291361167-9880-1-git-send-email-biessmann@corscience.de> References: <1291361167-9880-1-git-send-email-biessmann@corscience.de> Message-ID: <4D0CA94C.2080405@scharsoft.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de * use start/end label for initialization tables instead of fix values Signed-off-by: Jens Scharsig --- I have trace through the code with JTAG. It should be work with CONFIG_TEXT_BASE = 0x0 and CONFIG_TEXT_BASE=0x10000000. Changes since first version: * fix: remove on line to much (thanks Andreas Biessmann) * fix: add _MTEXT_BASE instead of sub from table end Changes since 2nd version: * remove trailing whitespace arch/arm/cpu/arm920t/at91/lowlevel_init.S | 8 ++++++-- 1 files changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/arm920t/at91/lowlevel_init.S b/arch/arm/cpu/arm920t/at91/lowlevel_init.S index eaea9d2..8b58ba9 100644 --- a/arch/arm/cpu/arm920t/at91/lowlevel_init.S +++ b/arch/arm/cpu/arm920t/at91/lowlevel_init.S @@ -65,7 +65,8 @@ LoopOsc: ldr r0, =SMRDATA ldr r1, _MTEXT_BASE sub r0, r0, r1 - add r2, r0, #80 + ldr r2, =SMRDATAE + sub r2, r2, r1 pllloop: /* the address */ ldr r1, [r0], #4 @@ -83,7 +84,8 @@ lock: ldr r0, =SMRDATA1 ldr r1, _MTEXT_BASE sub r0, r0, r1 - add r2, r0, #176 + ldr r2, =SMRDATA1E + sub r2, r2, r1 sdinit: /* the address */ ldr r1, [r0], #4 @@ -114,6 +116,7 @@ SMRDATA: .word CONFIG_SYS_PLLBR_VAL .word AT91_ASM_PMC_MCKR .word CONFIG_SYS_MCKR_VAL +SMRDATAE: /* here there's a delay */ SMRDATA1: .word AT91_ASM_PIOC_ASR @@ -160,5 +163,6 @@ SMRDATA1: .word CONFIG_SYS_SDRC_MR_VAL3 .word CONFIG_SYS_SDRAM .word CONFIG_SYS_SDRAM_VAL +SMRDATA1E: /* SMRDATA1 is 176 bytes long */ #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ -- 1.7.1