[U-Boot] [PATCH 8/8] armv7: adapt s5pc1xx to the new cache maintenance framework

Minkyu Kang
2010-12-27T07:25:55Z

Dear Aneesh V,

On 22 December 2010 20:54, Aneesh V <aneesh@ti.com> wrote:
> adapt s5pc1xx to the new layered cache maintenance framework
>
> Signed-off-by: Aneesh V <aneesh@ti.com>
> ---
> ?arch/arm/cpu/armv7/s5pc1xx/cache.S ? ? ? ? ? ?| ? 86 +-----------------------
> ?arch/arm/cpu/armv7/s5pc1xx/clock.c ? ? ? ? ? ?| ? 12 ++++
> ?arch/arm/include/asm/arch-s5pc1xx/sys_proto.h | ? ?4 +-
> ?3 files changed, 18 insertions(+), 84 deletions(-)
>
> diff --git a/arch/arm/cpu/armv7/s5pc1xx/clock.c b/arch/arm/cpu/armv7/s5pc1xx/clock.c
> index 98a27e5..da8b2d7 100644
> --- a/arch/arm/cpu/armv7/s5pc1xx/clock.c
> +++ b/arch/arm/cpu/armv7/s5pc1xx/clock.c
> @@ -26,6 +26,8 @@
> ?#include <asm/io.h>
> ?#include <asm/arch/clock.h>
> ?#include <asm/arch/clk.h>
> +#include <asm/arch/sys_proto.h>
> +#include <asm/armv7.h>
>
> ?#define CLK_M ?0
> ?#define CLK_D ?1
> @@ -328,3 +330,13 @@ void s5p_clock_init(void)
> ? ? ? ?get_uart_clk = s5pc1xx_get_uart_clk;
> ? ? ? ?get_pwm_clk = s5pc1xx_get_pwm_clk;
> ?}
> +
> +#ifndef CONFIG_SYS_NO_DCACHE
> +void v7_setup_outer_cache_ops(void)
> +{
> +#ifndef CONFIG_L2_OFF
> + ? ? ? v7_outer_cache.enable = ca8_l2_cache_enable;
> + ? ? ? v7_outer_cache.disable = ca8_l2_cache_disable;
> +#endif
> +}
> +#endif

I don't agree with add this function at clock.c.
If need we can make new file as omap3/4 case.

Thanks
Minkyu Kang
--
from. prom.