From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sergei Shtylyov Date: Sun, 09 Jan 2011 15:49:20 +0300 Subject: [U-Boot] [PATCH] mpc83xx: fix pcie configuration space read/write In-Reply-To: <007e01cbae66$ae7017b0$6401a8c0@LENOVOE5CA6843> References: <007e01cbae66$ae7017b0$6401a8c0@LENOVOE5CA6843> Message-ID: <4D29AED0.1080706@mvista.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hello. On 07-01-2011 15:29, Baidu Boy wrote: > This patch fix a problem for the pcie enumeration when the mpc83xx pcie > controller > is connected with switch or we use both of the two pcie controller. > Signed-off-by: Baidu Boy > --- > arch/powerpc/cpu/mpc83xx/pcie.c | 8 ++++++-- > 1 files changed, 6 insertions(+), 2 deletions(-) > diff --git a/arch/powerpc/cpu/mpc83xx/pcie.c > b/arch/powerpc/cpu/mpc83xx/pcie.c > index 46a706d..2a200b8 100644 > --- a/arch/powerpc/cpu/mpc83xx/pcie.c > +++ b/arch/powerpc/cpu/mpc83xx/pcie.c [...] > @@ -324,6 +326,8 @@ void mpc83xx_pcie_init(int num_buses, struct pci_region > **reg) > num_buses = ARRAY_SIZE(mpc83xx_pcie_cfg_space); > } > > - for (i = 0; i< num_buses; i++) > + for (i = 0; i< num_buses; i++){ There should be space between ) and { > + pcie_index = i; > mpc83xx_pcie_init_bus(i, reg[i]); > + } > } WBR, Sergei