[U-Boot] Cannot access memory at address 0xd8013fa8 when using gdb/BDI3000 to debug u-boot

[davis mcpherson <davis.mcpherson@gmail.com>]

I'm trying to get u-boot version 1.3.4 working a custom MPC8548 based 
board (version 1.1.4 currently works fine on this board so the hardware 
is known to be good).  I'm encountering the following problem during the 
early stages of the u-boot initialization and any insights as to what 
the problem may be would be greatly appreciated:

I have a BDI3000 and i'm using gdb for debug sessions.  I started with 
the MPC8548CDS.h as my template for the build configuration file for 
this board.

1) in the start.S file the L1 DCache is configured to be used for 
initial RAM, this occurs in the code at the 'switch_as:' label.  I set 
the CFG_INIT_RAM_ADDR to the value 0xd8010000 and this value is used to 
configure the L1CFG0 register.
2) execution soon jumps to the '_start_cont:' label and the stack is set 
up in this initial RAM area
3) I set a breakpoint at '_start_cont' and tried to examine the initial 
RAM memory with the gdb 'x' command:
(gdb) x/16x 0xd8010000
0xd8010000:    Cannot access memory at address 0xd8010000

So at this point should gdb be able to examine this memory area?

I compared the code in start.S for 1.3.4 with the code from 1.1.4 and 
although not identical the instructions to setup the L1 cache and use it 
for initial RAM end up using the same values and doing the same 
operations...

I can continue to execute code and soon we jump into the c routines 
where the global data pointer is initialized,  attempts to display this 
gd_t structure give the same error message (no surprise there), so I'm 
guessing this structure does not get initialized properly and function 
using it read bogus values...

but I can continue stepping thru the initialzation functions, and for 
example when the console is initialized a long string of garbage shows 
up in the console terminal window, the baudrate comes from the gd_t 
struct so its not what I configured...

so i think this is close to working but something seems broken with 
using the L1 Dcache for initial ram...

thanks in advance for any ideas and suggestion and please let me know if 
there is additional info that might be useful for you to understand the 
problem...

davis mcpherson