[U-Boot] spi subystem maintainer?

[Reinhard Meyer <u-boot@emk-elektronik.de>]

Dear Stefano Babic:
> On 02/02/2011 08:23 AM, Kumar Gala wrote:
>> Wanted to see if anyone had input on how to deal with the SPI
>> controller on some of our newer parts.  It expects command & data
>> xfer's to happen together.  However our current code does not call
>> spi_xfer() that way.
> 
> Which is your concrete case ? spi_xfer is responsible to setup the
> controller and to start the transfer, and everything could be done
> inside this function. What do you mean exactly with command and data ?
> 
> Regards,
> Stefano
> 

I think he refers to the common "problem" that many SPI devices
require CS to stay low during both "phases" of issuing the
read/write command and transfering the actual data.

Current u-boot code calls spi_xfer() two times.

Hardware controlled CS often go high between both calls, which
requires you to (at least) use GPIO controlled CS, or, even worse,
use bitbang SPI (in cases where the SPI pin assignment is in groups,
not individually).

Best Regards,
Reinhard