[U-Boot] [PATCH 0/15] ATMEL rework

[U-Boot] [PATCH 0/15] ATMEL rework

[Reinhard Meyer]

These are all the reworks on the ATMEL parts done by me so far.
They are now officially posted as patches for commenting.
They are the patches found in u-boot-atmel so far, with minor
whitespace and long line fixes complained about by checkpatch.

The following files are affected:

(Output of git-diff-tree --stat HEAD~15 HEAD~0)

 arch/arm/cpu/arm926ejs/at91/Makefile               |    1 +
 arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c  |   47 +---
 arch/arm/cpu/arm926ejs/at91/clock.c                |    8 +-
 arch/arm/cpu/arm926ejs/at91/cpu.c                  |   11 +-
 arch/arm/cpu/arm926ejs/at91/eflash.c               |   16 +-
 arch/arm/cpu/arm926ejs/at91/led.c                  |    2 +-
 arch/arm/cpu/arm926ejs/at91/reset.c                |    4 +-
 arch/arm/cpu/arm926ejs/at91/timer.c                |   37 ++--
 arch/arm/include/asm/arch-at91/at91_common.h       |    3 +-
 arch/arm/include/asm/arch-at91/at91_pio.h          |   19 +--
 arch/arm/include/asm/arch-at91/at91_rstc.h         |   25 --
 arch/arm/include/asm/arch-at91/at91sam9260.h       |  252 ++++++++++----------
 .../arm/include/asm/arch-at91/at91sam9260_matrix.h |  102 ++++-----
 arch/arm/include/asm/arch-at91/at91sam9261.h       |  187 ++++++++-------
 arch/arm/include/asm/arch-at91/at91sam9263.h       |  218 ++++++++---------
 arch/arm/include/asm/arch-at91/at91sam9g45.h       |  225 +++++++++---------
 arch/arm/include/asm/arch-at91/gpio.h              |   18 +-
 arch/arm/include/asm/arch-at91/hardware.h          |   96 +++-----
 arch/arm/include/asm/arch-at91/io.h                |   43 ----
 arch/arm/include/asm/arch-at91/memory-map.h        |   36 ---
 drivers/gpio/at91_gpio.c                           |   54 +++--
 drivers/mmc/gen_atmel_mci.c                        |    2 +-
 drivers/net/macb.c                                 |   14 +-
 drivers/rtc/at91sam9_rtt.c                         |   14 +-
 drivers/serial/atmel_usart.c                       |   28 +--
 drivers/spi/atmel_dataflash_spi.c                  |   94 +++++---
 drivers/spi/atmel_spi.c                            |   16 +-
 drivers/usb/host/ohci-at91.c                       |   18 +-
 drivers/watchdog/at91sam9_wdt.c                    |    6 +-
 include/dataflash.h                                |    1 -
 30 files changed, 714 insertions(+), 883 deletions(-)

If no complaints are received, they will be formally accepted and a git-pull
request will be issued to Albert.

Best Regards
Reinhard

[U-Boot] [PATCH 01/15] AT91: rework at91sam9260.h

[Reinhard Meyer]

Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
---
 arch/arm/include/asm/arch-at91/at91sam9260.h |  252 ++++++++++++++------------
 1 files changed, 132 insertions(+), 120 deletions(-)

diff --git a/arch/arm/include/asm/arch-at91/at91sam9260.h b/arch/arm/include/asm/arch-at91/at91sam9260.h
index 7fd60b7..dd68485 100644
--- a/arch/arm/include/asm/arch-at91/at91sam9260.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9260.h
@@ -2,9 +2,15 @@
  * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9260.h]
  *
  * (C) 2006 Andrew Victor
+ * (C) Copyright 2010
+ * Reinhard Meyer, EMK Elektronik, reinhard.meyer at emk-elektronik.de
  *
- * Common definitions.
- * Based on AT91SAM9260 datasheet revision A (Preliminary).
+ * Definitions for the SoCs:
+ * AT91SAM9260, AT91SAM9G20, AT91SAM9XE
+ *
+ * Note that those SoCs are mostly software and pin compatible,
+ * therefore this file applies to all of them. Differences between
+ * those SoCs are concentrated at the end of this file.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -16,145 +22,151 @@
 #define AT91SAM9260_H
 
 /*
- * Peripheral identifiers/interrupts.
+ * defines to be used in other places
  */
-#define AT91_ID_FIQ		0	/* Advanced Interrupt Controller (FIQ) */
-#define AT91_ID_SYS		1	/* System Peripherals */
-#define AT91SAM9260_ID_PIOA	2	/* Parallel IO Controller A */
-#define AT91SAM9260_ID_PIOB	3	/* Parallel IO Controller B */
-#define AT91SAM9260_ID_PIOC	4	/* Parallel IO Controller C */
-#define AT91SAM9260_ID_ADC	5	/* Analog-to-Digital Converter */
-#define AT91SAM9260_ID_US0	6	/* USART 0 */
-#define AT91SAM9260_ID_US1	7	/* USART 1 */
-#define AT91SAM9260_ID_US2	8	/* USART 2 */
-#define AT91SAM9260_ID_MCI	9	/* Multimedia Card Interface */
-#define AT91SAM9260_ID_UDP	10	/* USB Device Port */
-#define AT91SAM9260_ID_TWI	11	/* Two-Wire Interface */
-#define AT91SAM9260_ID_SPI0	12	/* Serial Peripheral Interface 0 */
-#define AT91SAM9260_ID_SPI1	13	/* Serial Peripheral Interface 1 */
-#define AT91SAM9260_ID_SSC	14	/* Serial Synchronous Controller */
-#define AT91SAM9260_ID_TC0	17	/* Timer Counter 0 */
-#define AT91SAM9260_ID_TC1	18	/* Timer Counter 1 */
-#define AT91SAM9260_ID_TC2	19	/* Timer Counter 2 */
-#define AT91SAM9260_ID_UHP	20	/* USB Host port */
-#define AT91SAM9260_ID_EMAC	21	/* Ethernet */
-#define AT91SAM9260_ID_ISI	22	/* Image Sensor Interface */
-#define AT91SAM9260_ID_US3	23	/* USART 3 */
-#define AT91SAM9260_ID_US4	24	/* USART 4 */
-#define AT91SAM9260_ID_US5	25	/* USART 5 */
-#define AT91SAM9260_ID_TC3	26	/* Timer Counter 3 */
-#define AT91SAM9260_ID_TC4	27	/* Timer Counter 4 */
-#define AT91SAM9260_ID_TC5	28	/* Timer Counter 5 */
-#define AT91SAM9260_ID_IRQ0	29	/* Advanced Interrupt Controller (IRQ0) */
-#define AT91SAM9260_ID_IRQ1	30	/* Advanced Interrupt Controller (IRQ1) */
-#define AT91SAM9260_ID_IRQ2	31	/* Advanced Interrupt Controller (IRQ2) */
+#define CONFIG_ARM926EJS	/* ARM926EJS Core */
+#define CONFIG_AT91FAMILY	/* it's a member of AT91 */
 
-#define AT91_EMAC_BASE		0xfffc4000
-#define AT91_SDRAMC_BASE	0xffffea00
-#define AT91_SMC_BASE		0xffffec00
-#define AT91_MATRIX_BASE	0xffffee00
-#define AT91_PIO_BASE		0xfffff400
-#define AT91_PMC_BASE		0xfffffc00
-#define AT91_RSTC_BASE		0xfffffd00
-#define AT91_SHDWN_BASE		0xfffffd10
-#define AT91_RTT_BASE		0xfffffd20
-#define AT91_PIT_BASE		0xfffffd30
-#define AT91_WDT_BASE		0xfffffd40
 /*
- * The AT91SAM9XE has the GPBRs at a different address than
- * the AT91SAM9260/9G20.
+ * Peripheral identifiers/interrupts.
  */
-#ifdef CONFIG_AT91SAM9XE
-# define AT91_GPR_BASE		0xfffffd60
-#else
-# define AT91_GPR_BASE		0xfffffd50
-#endif
-
-#ifdef CONFIG_AT91_LEGACY
+#define ATMEL_ID_FIQ	0	/* Advanced Interrupt Controller (FIQ) */
+#define ATMEL_ID_SYS	1	/* System Peripherals */
+#define ATMEL_ID_PIOA	2	/* Parallel IO Controller A */
+#define ATMEL_ID_PIOB	3	/* Parallel IO Controller B */
+#define ATMEL_ID_PIOC	4	/* Parallel IO Controller C */
+#define ATMEL_ID_ADC	5	/* Analog-to-Digital Converter */
+#define ATMEL_ID_USART0	6	/* USART 0 */
+#define ATMEL_ID_USART1	7	/* USART 1 */
+#define ATMEL_ID_USART2	8	/* USART 2 */
+#define ATMEL_ID_MCI	9	/* Multimedia Card Interface */
+#define ATMEL_ID_UDP	10	/* USB Device Port */
+#define ATMEL_ID_TWI0	11	/* Two-Wire Interface 0 */
+#define ATMEL_ID_SPI0	12	/* Serial Peripheral Interface 0 */
+#define ATMEL_ID_SPI1	13	/* Serial Peripheral Interface 1 */
+#define ATMEL_ID_SSC0	14	/* Serial Synchronous Controller 0 */
+/* Reserved:		15 */
+/* Reserved:		16 */
+#define ATMEL_ID_TC0	17	/* Timer Counter 0 */
+#define ATMEL_ID_TC1	18	/* Timer Counter 1 */
+#define ATMEL_ID_TC2	19	/* Timer Counter 2 */
+#define ATMEL_ID_UHP	20	/* USB Host port */
+#define ATMEL_ID_EMAC0	21	/* Ethernet 0 */
+#define ATMEL_ID_ISI	22	/* Image Sensor Interface */
+#define ATMEL_ID_USART3	23	/* USART 3 */
+#define ATMEL_ID_USART4	24	/* USART 4 */
+/* USART5 or TWI1:	25 */
+#define ATMEL_ID_TC3	26	/* Timer Counter 3 */
+#define ATMEL_ID_TC4	27	/* Timer Counter 4 */
+#define ATMEL_ID_TC5	28	/* Timer Counter 5 */
+#define ATMEL_ID_IRQ0	29	/* Advanced Interrupt Controller (IRQ0) */
+#define ATMEL_ID_IRQ1	30	/* Advanced Interrupt Controller (IRQ1) */
+#define ATMEL_ID_IRQ2	31	/* Advanced Interrupt Controller (IRQ2) */
 
 /*
- * User Peripheral physical base addresses.
+ * User Peripherals physical base addresses.
  */
-#define AT91SAM9260_BASE_TCB0		0xfffa0000
-#define AT91SAM9260_BASE_TC0		0xfffa0000
-#define AT91SAM9260_BASE_TC1		0xfffa0040
-#define AT91SAM9260_BASE_TC2		0xfffa0080
-#define AT91SAM9260_BASE_UDP		0xfffa4000
-#define AT91SAM9260_BASE_MCI		0xfffa8000
-#define AT91SAM9260_BASE_TWI		0xfffac000
-#define AT91SAM9260_BASE_US0		0xfffb0000
-#define AT91SAM9260_BASE_US1		0xfffb4000
-#define AT91SAM9260_BASE_US2		0xfffb8000
-#define AT91SAM9260_BASE_SSC		0xfffbc000
-#define AT91SAM9260_BASE_ISI		0xfffc0000
-#define AT91SAM9260_BASE_EMAC		0xfffc4000
-#define AT91SAM9260_BASE_SPI0		0xfffc8000
-#define AT91SAM9260_BASE_SPI1		0xfffcc000
-#define AT91SAM9260_BASE_US3		0xfffd0000
-#define AT91SAM9260_BASE_US4		0xfffd4000
-#define AT91SAM9260_BASE_US5		0xfffd8000
-#define AT91SAM9260_BASE_TCB1		0xfffdc000
-#define AT91SAM9260_BASE_TC3		0xfffdc000
-#define AT91SAM9260_BASE_TC4		0xfffdc040
-#define AT91SAM9260_BASE_TC5		0xfffdc080
-#define AT91SAM9260_BASE_ADC		0xfffe0000
-#define AT91_BASE_SYS			0xffffe800
+#define ATMEL_BASE_TCB0		0xfffa0000
+#define ATMEL_BASE_TC0		0xfffa0000
+#define ATMEL_BASE_TC1		0xfffa0040
+#define ATMEL_BASE_TC2		0xfffa0080
+#define ATMEL_BASE_UDP0		0xfffa4000
+#define ATMEL_BASE_MCI		0xfffa8000
+#define ATMEL_BASE_TWI0		0xfffac000
+#define ATMEL_BASE_USART0	0xfffb0000
+#define ATMEL_BASE_USART1	0xfffb4000
+#define ATMEL_BASE_USART2	0xfffb8000
+#define ATMEL_BASE_SSC0		0xfffbc000
+#define ATMEL_BASE_ISI0		0xfffc0000
+#define ATMEL_BASE_EMAC0	0xfffc4000
+#define ATMEL_BASE_SPI0		0xfffc8000
+#define ATMEL_BASE_SPI1		0xfffcc000
+#define ATMEL_BASE_USART3	0xfffd0000
+#define ATMEL_BASE_USART4	0xfffd4000
+/* USART5 or TWI1:		0xfffd8000 */
+#define ATMEL_BASE_TCB1		0xfffdc000
+#define ATMEL_BASE_TC3		0xfffdc000
+#define ATMEL_BASE_TC4		0xfffdc040
+#define ATMEL_BASE_TC5		0xfffdc080
+#define ATMEL_BASE_ADC		0xfffe0000
+/* Reserved:	0xfffe4000 - 0xffffe7ff */
 
 /*
- * System Peripherals (offset from AT91_BASE_SYS)
+ * System Peripherals physical base addresses.
  */
-#define AT91_ECC	(0xffffe800 - AT91_BASE_SYS)
-#define AT91_SDRAMC	(0xffffea00 - AT91_BASE_SYS)
-#define AT91_SMC	(0xffffec00 - AT91_BASE_SYS)
-#define AT91_MATRIX	(0xffffee00 - AT91_BASE_SYS)
-#define AT91_CCFG	(0xffffef10 - AT91_BASE_SYS)
-#define AT91_AIC	(0xfffff000 - AT91_BASE_SYS)
-#define AT91_DBGU	(0xfffff200 - AT91_BASE_SYS)
-#define AT91_PIOA	(0xfffff400 - AT91_BASE_SYS)
-#define AT91_PIOB	(0xfffff600 - AT91_BASE_SYS)
-#define AT91_PIOC	(0xfffff800 - AT91_BASE_SYS)
-#define AT91_PMC	(0xfffffc00 - AT91_BASE_SYS)
-#define AT91_RSTC	(0xfffffd00 - AT91_BASE_SYS)
-#define AT91_SHDWC	(0xfffffd10 - AT91_BASE_SYS)
-#define AT91_RTT	(0xfffffd20 - AT91_BASE_SYS)
-#define AT91_PIT	(0xfffffd30 - AT91_BASE_SYS)
-#define AT91_WDT	(0xfffffd40 - AT91_BASE_SYS)
-#define AT91_GPBR	(0xfffffd50 - AT91_BASE_SYS)
-
-#define AT91_USART0	AT91SAM9260_BASE_US0
-#define AT91_USART1	AT91SAM9260_BASE_US1
-#define AT91_USART2	AT91SAM9260_BASE_US2
-#define AT91_USART3	AT91SAM9260_BASE_US3
-#define AT91_USART4	AT91SAM9260_BASE_US4
-#define AT91_USART5	AT91SAM9260_BASE_US5
-
-#endif /* CONFIG_AT91_LEGACY */
+#define ATMEL_BASE_SYS		0xffffe800
+#define ATMEL_BASE_SDRAMC	0xffffea00
+#define ATMEL_BASE_SMC		0xffffec00
+#define ATMEL_BASE_MATRIX	0xffffee00
+#define ATMEL_BASE_AIC		0xfffff000
+#define ATMEL_BASE_DBGU		0xfffff200
+#define ATMEL_BASE_PIOA		0xfffff400
+#define ATMEL_BASE_PIOB		0xfffff600
+#define ATMEL_BASE_PIOC		0xfffff800
+/* EEFC:			0xfffffa00 */
+#define ATMEL_BASE_PMC		0xfffffc00
+#define ATMEL_BASE_RSTC		0xfffffd00
+#define ATMEL_BASE_SHDWN	0xfffffd10
+#define ATMEL_BASE_RTT		0xfffffd20
+#define ATMEL_BASE_PIT		0xfffffd30
+#define ATMEL_BASE_WDT		0xfffffd40
+/* GPBR(non-XE SoCs):		0xfffffd50 */
+/* GPBR(XE SoCs):		0xfffffd60 */
+/* Reserved:	0xfffffd70 - 0xffffffff */
 
 /*
- * Internal Memory.
+ * Internal Memory common on all these SoCs
  */
-#define AT91SAM9260_ROM_BASE	0x00100000	/* Internal ROM base address */
-#define AT91SAM9260_ROM_SIZE	SZ_32K		/* Internal ROM size (32Kb) */
-
-#define AT91SAM9260_SRAM0_BASE	0x00200000	/* Internal SRAM 0 base address */
-#define AT91SAM9260_SRAM0_SIZE	SZ_4K		/* Internal SRAM 0 size (4Kb) */
-#define AT91SAM9260_SRAM1_BASE	0x00300000	/* Internal SRAM 1 base address */
-#define AT91SAM9260_SRAM1_SIZE	SZ_4K		/* Internal SRAM 1 size (4Kb) */
+#define ATMEL_BASE_BOOT		0x00000000	/* Boot mapped area */
+#define ATMEL_BASE_ROM		0x00100000	/* Internal ROM base address */
+/* SRAM or FLASH:		0x00200000 */
+/* SRAM:			0x00300000 */
+/* Reserved:			0x00400000 */
+#define ATMEL_UHP_BASE		0x00500000	/* USB Host controller */
 
-#define AT91SAM9260_UHP_BASE	0x00500000	/* USB Host controller */
+/*
+ * External memory
+ */
+#define ATMEL_BASE_CS0		0x10000000	/* typically NOR */
+#define ATMEL_BASE_CS1		0x20000000	/* SDRAM */
+#define ATMEL_BASE_CS2		0x30000000
+#define ATMEL_BASE_CS3		0x40000000	/* typically NAND */
+#define ATMEL_BASE_CS4		0x50000000
+#define ATMEL_BASE_CS5		0x60000000
+#define ATMEL_BASE_CS6		0x70000000
+#define ATMEL_BASE_CS7		0x80000000
 
-#define AT91SAM9XE_FLASH_BASE	0x00200000	/* Internal FLASH base address */
-#define AT91SAM9XE_SRAM_BASE	0x00300000	/* Internal SRAM base address */
+/*
+ * Other misc defines
+ */
+#define ATMEL_PIO_PORTS		3		/* these SoCs have 3 PIO */
+#define ATMEL_PMC_UHP		AT91SAM926x_PMC_UHP
 
 /*
- * Cpu Name
+ * SoC specific defines
  */
 #if defined(CONFIG_AT91SAM9XE)
-# define CONFIG_SYS_AT91_CPU_NAME	"AT91SAM9XE"
+# define ATMEL_CPU_NAME		"AT91SAM9XE"
+# define ATMEL_ID_TWI1		25	/* TWI 1 */
+# define ATMEL_BASE_FLASH	0x00200000	/* Internal FLASH */
+# define ATMEL_BASE_SRAM	0x00300000	/* Internal SRAM */
+# define ATMEL_BASE_TWI1	0xfffd8000
+# define ATMEL_BASE_EEFC	0xfffffa00
+# define ATMEL_BASE_GPBR	0xfffffd60
 #elif defined(CONFIG_AT91SAM9260)
-# define CONFIG_SYS_AT91_CPU_NAME	"AT91SAM9260"
+# define ATMEL_CPU_NAME		"AT91SAM9260"
+# define ATMEL_ID_USART5	25	/* USART 5 */
+# define ATMEL_BASE_SRAM0	0x00200000	/* Internal SRAM 0 */
+# define ATMEL_BASE_SRAM1	0x00300000	/* Internal SRAM 1 */
+# define ATMEL_BASE_USART5	0xfffd8000
+# define ATMEL_BASE_GPBR	0xfffffd50
 #elif defined(CONFIG_AT91SAM9G20)
-# define CONFIG_SYS_AT91_CPU_NAME	"AT91SAM9G20"
+# define ATMEL_CPU_NAME		"AT91SAM9G20"
+# define ATMEL_ID_USART5	25	/* USART 5 */
+# define ATMEL_BASE_SRAM0	0x00200000	/* Internal SRAM 0 */
+# define ATMEL_BASE_SRAM1	0x00300000	/* Internal SRAM 1 */
+# define ATMEL_BASE_USART5	0xfffd8000
+# define ATMEL_BASE_GPBR	0xfffffd50
 #endif
 
 #endif
-- 
1.5.6.5

[U-Boot] [PATCH 02/15] AT91: rework at91sam9261.h

[Reinhard Meyer]

Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
---
 arch/arm/include/asm/arch-at91/at91sam9261.h |  187 ++++++++++++++------------
 1 files changed, 102 insertions(+), 85 deletions(-)

diff --git a/arch/arm/include/asm/arch-at91/at91sam9261.h b/arch/arm/include/asm/arch-at91/at91sam9261.h
index 7ca0283..f8048d5 100644
--- a/arch/arm/include/asm/arch-at91/at91sam9261.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9261.h
@@ -2,9 +2,15 @@
  * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9261.h]
  *
  * Copyright (C) SAN People
+ * (C) Copyright 2010
+ * Reinhard Meyer, EMK Elektronik, reinhard.meyer at emk-elektronik.de
  *
- * Common definitions.
- * Based on AT91SAM9261 datasheet revision E. (Preliminary)
+ * Definitions for the SoCs:
+ * AT91SAM9261, AT91SAM9G10
+ *
+ * Note that those SoCs are mostly software and pin compatible,
+ * therefore this file applies to all of them. Differences between
+ * those SoCs are concentrated at the end of this file.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -16,106 +22,117 @@
 #define AT91SAM9261_H
 
 /*
- * Peripheral identifiers/interrupts.
+ * defines to be used in other places
  */
-#define AT91_ID_FIQ		0	/* Advanced Interrupt Controller (FIQ) */
-#define AT91_ID_SYS		1	/* System Peripherals */
-#define AT91SAM9261_ID_PIOA	2	/* Parallel IO Controller A */
-#define AT91SAM9261_ID_PIOB	3	/* Parallel IO Controller B */
-#define AT91SAM9261_ID_PIOC	4	/* Parallel IO Controller C */
-#define AT91SAM9261_ID_US0	6	/* USART 0 */
-#define AT91SAM9261_ID_US1	7	/* USART 1 */
-#define AT91SAM9261_ID_US2	8	/* USART 2 */
-#define AT91SAM9261_ID_MCI	9	/* Multimedia Card Interface */
-#define AT91SAM9261_ID_UDP	10	/* USB Device Port */
-#define AT91SAM9261_ID_TWI	11	/* Two-Wire Interface */
-#define AT91SAM9261_ID_SPI0	12	/* Serial Peripheral Interface 0 */
-#define AT91SAM9261_ID_SPI1	13	/* Serial Peripheral Interface 1 */
-#define AT91SAM9261_ID_SSC0	14	/* Serial Synchronous Controller 0 */
-#define AT91SAM9261_ID_SSC1	15	/* Serial Synchronous Controller 1 */
-#define AT91SAM9261_ID_SSC2	16	/* Serial Synchronous Controller 2 */
-#define AT91SAM9261_ID_TC0	17	/* Timer Counter 0 */
-#define AT91SAM9261_ID_TC1	18	/* Timer Counter 1 */
-#define AT91SAM9261_ID_TC2	19	/* Timer Counter 2 */
-#define AT91SAM9261_ID_UHP	20	/* USB Host port */
-#define AT91SAM9261_ID_LCDC	21	/* LDC Controller */
-#define AT91SAM9261_ID_IRQ0	29	/* Advanced Interrupt Controller (IRQ0) */
-#define AT91SAM9261_ID_IRQ1	30	/* Advanced Interrupt Controller (IRQ1) */
-#define AT91SAM9261_ID_IRQ2	31	/* Advanced Interrupt Controller (IRQ2) */
+#define CONFIG_ARM926EJS	/* ARM926EJS Core */
+#define CONFIG_AT91FAMILY	/* it's a member of AT91 */
 
-#define AT91_SDRAMC_BASE	0xffffea00
-#define AT91_SMC_BASE		0xffffec00
-#define AT91_MATRIX_BASE	0xffffee00
-#define AT91_PIO_BASE		0xfffff400
-#define AT91_PMC_BASE		0xfffffc00
-#define AT91_RSTC_BASE		0xfffffd00
-#define AT91_RTT_BASE		0xfffffd20
-#define AT91_PIT_BASE		0xfffffd30
-#define AT91_WDT_BASE		0xfffffd40
-#define AT91_GPBR_BASE		0xfffffd50
+/*
+ * Peripheral identifiers/interrupts.
+ */
+#define ATMEL_ID_FIQ	0	/* Advanced Interrupt Controller (FIQ) */
+#define ATMEL_ID_SYS	1	/* System Peripherals */
+#define ATMEL_ID_PIOA	2	/* Parallel IO Controller A */
+#define ATMEL_ID_PIOB	3	/* Parallel IO Controller B */
+#define ATMEL_ID_PIOC	4	/* Parallel IO Controller C */
+/* Reserved:		5 */
+#define ATMEL_ID_USART0	6	/* USART 0 */
+#define ATMEL_ID_USART1	7	/* USART 1 */
+#define ATMEL_ID_USART2	8	/* USART 2 */
+#define ATMEL_ID_MCI	9	/* Multimedia Card Interface */
+#define ATMEL_ID_UDP	10	/* USB Device Port */
+#define ATMEL_ID_TWI0	11	/* Two-Wire Interface 0 */
+#define ATMEL_ID_SPI0	12	/* Serial Peripheral Interface 0 */
+#define ATMEL_ID_SPI1	13	/* Serial Peripheral Interface 1 */
+#define ATMEL_ID_SSC0	14	/* Serial Synchronous Controller 0 */
+#define ATMEL_ID_SSC1	15	/* Serial Synchronous Controller 1 */
+#define ATMEL_ID_SSC2	16	/* Serial Synchronous Controller 2 */
+#define ATMEL_ID_TC0	17	/* Timer Counter 0 */
+#define ATMEL_ID_TC1	18	/* Timer Counter 1 */
+#define ATMEL_ID_TC2	19	/* Timer Counter 2 */
+#define ATMEL_ID_UHP	20	/* USB Host port */
+#define ATMEL_ID_LCDC	21	/* LDC Controller */
+/* Reserved:		22-28 */
+#define ATMEL_ID_IRQ0	29	/* Advanced Interrupt Controller (IRQ0) */
+#define ATMEL_ID_IRQ1	30	/* Advanced Interrupt Controller (IRQ1) */
+#define ATMEL_ID_IRQ2	31	/* Advanced Interrupt Controller (IRQ2) */
 
-#ifdef CONFIG_AT91_LEGACY
+/*
+ * User Peripherals physical base addresses.
+ */
+#define ATMEL_BASE_TCB0		0xfffa0000
+#define ATMEL_BASE_TC0		0xfffa0000
+#define ATMEL_BASE_TC1		0xfffa0040
+#define ATMEL_BASE_TC2		0xfffa0080
+#define ATMEL_BASE_UDP0		0xfffa4000
+#define ATMEL_BASE_MCI		0xfffa8000
+#define ATMEL_BASE_TWI0		0xfffac000
+#define ATMEL_BASE_USART0	0xfffb0000
+#define ATMEL_BASE_USART1	0xfffb4000
+#define ATMEL_BASE_USART2	0xfffb8000
+#define ATMEL_BASE_SSC0		0xfffbc000
+#define ATMEL_BASE_SSC1		0xfffc0000
+#define ATMEL_BASE_SSC2		0xfffc4000
+#define ATMEL_BASE_SPI0		0xfffc8000
+#define ATMEL_BASE_SPI1		0xfffcc000
+/* Reserved:	0xfffc4000 - 0xffffe9ff */
 
 /*
- * User Peripheral physical base addresses.
+ * System Peripherals physical base addresses.
  */
-#define AT91SAM9261_BASE_TCB0		0xfffa0000
-#define AT91SAM9261_BASE_TC0		0xfffa0000
-#define AT91SAM9261_BASE_TC1		0xfffa0040
-#define AT91SAM9261_BASE_TC2		0xfffa0080
-#define AT91SAM9261_BASE_UDP		0xfffa4000
-#define AT91SAM9261_BASE_MCI		0xfffa8000
-#define AT91SAM9261_BASE_TWI		0xfffac000
-#define AT91SAM9261_BASE_US0		0xfffb0000
-#define AT91SAM9261_BASE_US1		0xfffb4000
-#define AT91SAM9261_BASE_US2		0xfffb8000
-#define AT91SAM9261_BASE_SSC0		0xfffbc000
-#define AT91SAM9261_BASE_SSC1		0xfffc0000
-#define AT91SAM9261_BASE_SSC2		0xfffc4000
-#define AT91SAM9261_BASE_SPI0		0xfffc8000
-#define AT91SAM9261_BASE_SPI1		0xfffcc000
-#define AT91_BASE_SYS			0xffffea00
+#define ATMEL_BASE_SYS		0xffffea00
+#define ATMEL_BASE_SDRAMC	0xffffea00
+#define ATMEL_BASE_SMC		0xffffec00
+#define ATMEL_BASE_MATRIX	0xffffee00
+#define ATMEL_BASE_AIC		0xfffff000
+#define ATMEL_BASE_DBGU		0xfffff200
+#define ATMEL_BASE_PIOA		0xfffff400
+#define ATMEL_BASE_PIOB		0xfffff600
+#define ATMEL_BASE_PIOC		0xfffff800
+#define ATMEL_BASE_PMC		0xfffffc00
+#define ATMEL_BASE_RSTC		0xfffffd00
+#define ATMEL_BASE_SHDWN	0xfffffd10
+#define ATMEL_BASE_RTT		0xfffffd20
+#define ATMEL_BASE_PIT		0xfffffd30
+#define ATMEL_BASE_WDT		0xfffffd40
+#define ATMEL_BASE_GPBR		0xfffffd50
 
 /*
- * System Peripherals (offset from AT91_BASE_SYS)
+ * Internal Memory common on all these SoCs
  */
-#define AT91_SDRAMC	(0xffffea00 - AT91_BASE_SYS)
-#define AT91_SMC	(0xffffec00 - AT91_BASE_SYS)
-#define AT91_MATRIX	(0xffffee00 - AT91_BASE_SYS)
-#define AT91_AIC	(0xfffff000 - AT91_BASE_SYS)
-#define AT91_DBGU	(0xfffff200 - AT91_BASE_SYS)
-#define AT91_PIOA	(0xfffff400 - AT91_BASE_SYS)
-#define AT91_PIOB	(0xfffff600 - AT91_BASE_SYS)
-#define AT91_PIOC	(0xfffff800 - AT91_BASE_SYS)
-#define AT91_PMC	(0xfffffc00 - AT91_BASE_SYS)
-#define AT91_RSTC	(0xfffffd00 - AT91_BASE_SYS)
-#define AT91_SHDWC	(0xfffffd10 - AT91_BASE_SYS)
-#define AT91_RTT	(0xfffffd20 - AT91_BASE_SYS)
-#define AT91_PIT	(0xfffffd30 - AT91_BASE_SYS)
-#define AT91_WDT	(0xfffffd40 - AT91_BASE_SYS)
-#define AT91_GPBR	(0xfffffd50 - AT91_BASE_SYS)
+#define ATMEL_BASE_SRAM		0x00300000	/* Internal SRAM base address */
+#define ATMEL_SIZE_SRAM		0x00028000	/* Internal SRAM size (160Kb) */
 
-#define AT91_USART0	AT91SAM9261_BASE_US0
-#define AT91_USART1	AT91SAM9261_BASE_US1
-#define AT91_USART2	AT91SAM9261_BASE_US2
+#define ATMEL_BASE_ROM		0x00400000	/* Internal ROM base address */
+#define ATMEL_SIZE_ROM		SZ_32K		/* Internal ROM size (32Kb) */
 
-#endif /* CONFIG_AT91_LEGACY */
+#define ATMEL_BASE_UHP		0x00500000	/* USB Host controller */
+#define ATMEL_BASE_LCDC		0x00600000	/* LDC controller */
 
 /*
- * Internal Memory.
+ * External memory
  */
-#define AT91SAM9261_SRAM_BASE	0x00300000	/* Internal SRAM base address */
-#define AT91SAM9261_SRAM_SIZE	0x00028000	/* Internal SRAM size (160Kb) */
-
-#define AT91SAM9261_ROM_BASE	0x00400000	/* Internal ROM base address */
-#define AT91SAM9261_ROM_SIZE	SZ_32K		/* Internal ROM size (32Kb) */
+#define ATMEL_BASE_CS0		0x10000000	/* typically NOR */
+#define ATMEL_BASE_CS1		0x20000000	/* SDRAM */
+#define ATMEL_BASE_CS2		0x30000000
+#define ATMEL_BASE_CS3		0x40000000	/* typically NAND */
+#define ATMEL_BASE_CS4		0x50000000
+#define ATMEL_BASE_CS5		0x60000000
+#define ATMEL_BASE_CS6		0x70000000
+#define ATMEL_BASE_CS7		0x80000000
 
-#define AT91SAM9261_UHP_BASE	0x00500000	/* USB Host controller */
-#define AT91SAM9261_LCDC_BASE	0x00600000	/* LDC controller */
+/*
+ * Other misc defines
+ */
+#define ATMEL_PIO_PORTS		3		/* theese SoCs have 3 PIO */
 
 /*
- * Cpu Name
+ * SoC specific defines
  */
-#define CONFIG_SYS_AT91_CPU_NAME	"AT91SAM9261"
+#if defined(CONFIG_AT91SAM9261)
+# define ATMEL_CPU_NAME		"AT91SAM9261"
+#elif defined(CONFIG_AT91SAM9G10)
+# define ATMEL_CPU_NAME		"AT91SAM9G10"
+#endif
 
 #endif
-- 
1.5.6.5

[U-Boot] [PATCH 03/15] AT91: rework at91sam9263.h

[Reinhard Meyer]

Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
---
 arch/arm/include/asm/arch-at91/at91sam9263.h |  218 ++++++++++++--------------
 1 files changed, 100 insertions(+), 118 deletions(-)

diff --git a/arch/arm/include/asm/arch-at91/at91sam9263.h b/arch/arm/include/asm/arch-at91/at91sam9263.h
index 4ada1ce..bfd408b 100644
--- a/arch/arm/include/asm/arch-at91/at91sam9263.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9263.h
@@ -2,9 +2,11 @@
  * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9263.h]
  *
  * (C) 2007 Atmel Corporation.
+ * (C) Copyright 2010
+ * Reinhard Meyer, EMK Elektronik, reinhard.meyer at emk-elektronik.de
  *
- * Common definitions.
- * Based on AT91SAM9263 datasheet revision B (Preliminary).
+ * Definitions for the SoC:
+ * AT91SAM9263
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -16,140 +18,120 @@
 #define AT91SAM9263_H
 
 /*
- * Peripheral identifiers/interrupts.
+ * defines to be used in other places
  */
-#define AT91_ID_FIQ		0	/* Advanced Interrupt Controller (FIQ) */
-#define AT91_ID_SYS		1	/* System Peripherals */
-#define AT91SAM9263_ID_PIOA	2	/* Parallel IO Controller A */
-#define AT91SAM9263_ID_PIOB	3	/* Parallel IO Controller B */
-#define AT91SAM9263_ID_PIOCDE	4	/* Parallel IO Controller C, D and E */
-#define AT91SAM9263_ID_US0	7	/* USART 0 */
-#define AT91SAM9263_ID_US1	8	/* USART 1 */
-#define AT91SAM9263_ID_US2	9	/* USART 2 */
-#define AT91SAM9263_ID_MCI0	10	/* Multimedia Card Interface 0 */
-#define AT91SAM9263_ID_MCI1	11	/* Multimedia Card Interface 1 */
-#define AT91SAM9263_ID_CAN	12	/* CAN */
-#define AT91SAM9263_ID_TWI	13	/* Two-Wire Interface */
-#define AT91SAM9263_ID_SPI0	14	/* Serial Peripheral Interface 0 */
-#define AT91SAM9263_ID_SPI1	15	/* Serial Peripheral Interface 1 */
-#define AT91SAM9263_ID_SSC0	16	/* Serial Synchronous Controller 0 */
-#define AT91SAM9263_ID_SSC1	17	/* Serial Synchronous Controller 1 */
-#define AT91SAM9263_ID_AC97C	18	/* AC97 Controller */
-#define AT91SAM9263_ID_TCB	19	/* Timer Counter 0, 1 and 2 */
-#define AT91SAM9263_ID_PWMC	20	/* Pulse Width Modulation Controller */
-#define AT91SAM9263_ID_EMAC	21	/* Ethernet */
-#define AT91SAM9263_ID_2DGE	23	/* 2D Graphic Engine */
-#define AT91SAM9263_ID_UDP	24	/* USB Device Port */
-#define AT91SAM9263_ID_ISI	25	/* Image Sensor Interface */
-#define AT91SAM9263_ID_LCDC	26	/* LCD Controller */
-#define AT91SAM9263_ID_DMA	27	/* DMA Controller */
-#define AT91SAM9263_ID_UHP	29	/* USB Host port */
-#define AT91SAM9263_ID_IRQ0	30	/* Advanced Interrupt Controller (IRQ0) */
-#define AT91SAM9263_ID_IRQ1	31	/* Advanced Interrupt Controller (IRQ1) */
-
-#define AT91_EMAC_BASE		0xfffbc000
-#define AT91_ECC0_BASE		0xffffe000
-#define AT91_SDRAMC0_BASE	0xffffe200
-#define AT91_SMC0_BASE		0xffffe400
-#define AT91_ECC1_BASE		0xffffe600
-#define AT91_SDRAMC1_BASE	0xffffe800
-#define AT91_SMC1_BASE		0xffffea00
-#define AT91_MATRIX_BASE	0xffffec00
-#define AT91_CCFG_BASE		0xffffed10
-#define AT91_DBGU_BASE		0xffffee00
-#define AT91_AIC_BASE		0xfffff000
-#define AT91_PIO_BASE		0xfffff200
-#define AT91_PMC_BASE		0xfffffc00
-#define AT91_RSTC_BASE		0xfffffd00
-#define AT91_RTT0_BASE		0xfffffd20
-#define AT91_PIT_BASE		0xfffffd30
-#define AT91_WDT_BASE		0xfffffd40
-#define AT91_RTT1_BASE		0xfffffd50
-#define AT91_GPBR_BASE		0xfffffd60
-
-#ifdef CONFIG_AT91_LEGACY
+#define CONFIG_ARM926EJS	/* ARM926EJS Core */
+#define CONFIG_AT91FAMILY	/* it's a member of AT91 */
 
 /*
- * User Peripheral physical base addresses.
+ * Peripheral identifiers/interrupts.
  */
-#define AT91SAM9263_BASE_UDP		0xfff78000
-#define AT91SAM9263_BASE_TCB0		0xfff7c000
-#define AT91SAM9263_BASE_TC0		0xfff7c000
-#define AT91SAM9263_BASE_TC1		0xfff7c040
-#define AT91SAM9263_BASE_TC2		0xfff7c080
-#define AT91SAM9263_BASE_MCI0		0xfff80000
-#define AT91SAM9263_BASE_MCI1		0xfff84000
-#define AT91SAM9263_BASE_TWI		0xfff88000
-#define AT91SAM9263_BASE_US0		0xfff8c000
-#define AT91SAM9263_BASE_US1		0xfff90000
-#define AT91SAM9263_BASE_US2		0xfff94000
-#define AT91SAM9263_BASE_SSC0		0xfff98000
-#define AT91SAM9263_BASE_SSC1		0xfff9c000
-#define AT91SAM9263_BASE_AC97C		0xfffa0000
-#define AT91SAM9263_BASE_SPI0		0xfffa4000
-#define AT91SAM9263_BASE_SPI1		0xfffa8000
-#define AT91SAM9263_BASE_CAN		0xfffac000
-#define AT91SAM9263_BASE_PWMC		0xfffb8000
-#define AT91SAM9263_BASE_EMAC		0xfffbc000
-#define AT91SAM9263_BASE_ISI		0xfffc4000
-#define AT91SAM9263_BASE_2DGE		0xfffc8000
-#define AT91_BASE_SYS			0xffffe000
+#define ATMEL_ID_FIQ	0	/* Advanced Interrupt Controller (FIQ) */
+#define ATMEL_ID_SYS	1	/* System Peripherals */
+#define ATMEL_ID_PIOA	2	/* Parallel IO Controller A */
+#define ATMEL_ID_PIOB	3	/* Parallel IO Controller B */
+#define ATMEL_ID_PIOCDE	4	/* Parallel IO Controller C, D and E */
+/* Reserved:		5 */
+/* Reserved:		6 */
+#define ATMEL_ID_USART0	7	/* USART 0 */
+#define ATMEL_ID_USART1	8	/* USART 1 */
+#define ATMEL_ID_USART2	9	/* USART 2 */
+#define ATMEL_ID_MCI0	10	/* Multimedia Card Interface 0 */
+#define ATMEL_ID_MCI1	11	/* Multimedia Card Interface 1 */
+#define ATMEL_ID_CAN	12	/* CAN */
+#define ATMEL_ID_TWI	13	/* Two-Wire Interface */
+#define ATMEL_ID_SPI0	14	/* Serial Peripheral Interface 0 */
+#define ATMEL_ID_SPI1	15	/* Serial Peripheral Interface 1 */
+#define ATMEL_ID_SSC0	16	/* Serial Synchronous Controller 0 */
+#define ATMEL_ID_SSC1	17	/* Serial Synchronous Controller 1 */
+#define ATMEL_ID_AC97C	18	/* AC97 Controller */
+#define ATMEL_ID_TCB	19	/* Timer Counter 0, 1 and 2 */
+#define ATMEL_ID_PWMC	20	/* Pulse Width Modulation Controller */
+#define ATMEL_ID_EMAC	21	/* Ethernet */
+/* Reserved:		22 */
+#define ATMEL_ID_2DGE	23	/* 2D Graphic Engine */
+#define ATMEL_ID_UDP	24	/* USB Device Port */
+#define ATMEL_ID_ISI	25	/* Image Sensor Interface */
+#define ATMEL_ID_LCDC	26	/* LCD Controller */
+#define ATMEL_ID_DMA	27	/* DMA Controller */
+/* Reserved:		28 */
+#define ATMEL_ID_UHP	29	/* USB Host port */
+#define ATMEL_ID_IRQ0	30	/* Advanced Interrupt Controller (IRQ0) */
+#define ATMEL_ID_IRQ1	31	/* Advanced Interrupt Controller (IRQ1) */
 
 /*
- * System Peripherals (offset from AT91_BASE_SYS)
+ * User Peripherals physical base addresses.
  */
-#define AT91_ECC0	(0xffffe000 - AT91_BASE_SYS)
-#define AT91_SDRAMC0	(0xffffe200 - AT91_BASE_SYS)
-#define AT91_SMC0	(0xffffe400 - AT91_BASE_SYS)
-#define AT91_ECC1	(0xffffe600 - AT91_BASE_SYS)
-#define AT91_SDRAMC1	(0xffffe800 - AT91_BASE_SYS)
-#define AT91_SMC1	(0xffffea00 - AT91_BASE_SYS)
-#define AT91_MATRIX	(0xffffec00 - AT91_BASE_SYS)
-#define AT91_CCFG	(0xffffed10 - AT91_BASE_SYS)
-#define AT91_DBGU	(0xffffee00 - AT91_BASE_SYS)
-#define AT91_AIC	(0xfffff000 - AT91_BASE_SYS)
-#define AT91_PIOA	(0xfffff200 - AT91_BASE_SYS)
-#define AT91_PIOB	(0xfffff400 - AT91_BASE_SYS)
-#define AT91_PIOC	(0xfffff600 - AT91_BASE_SYS)
-#define AT91_PIOD	(0xfffff800 - AT91_BASE_SYS)
-#define AT91_PIOE	(0xfffffa00 - AT91_BASE_SYS)
-#define AT91_PMC	(0xfffffc00 - AT91_BASE_SYS)
-#define AT91_RSTC	(0xfffffd00 - AT91_BASE_SYS)
-#define AT91_SHDWC	(0xfffffd10 - AT91_BASE_SYS)
-#define AT91_RTT0	(0xfffffd20 - AT91_BASE_SYS)
-#define AT91_PIT	(0xfffffd30 - AT91_BASE_SYS)
-#define AT91_WDT	(0xfffffd40 - AT91_BASE_SYS)
-#define AT91_RTT1	(0xfffffd50 - AT91_BASE_SYS)
-#define AT91_GPBR	(0xfffffd60 - AT91_BASE_SYS)
-
-#define AT91_USART0	AT91SAM9263_BASE_US0
-#define AT91_USART1	AT91SAM9263_BASE_US1
-#define AT91_USART2	AT91SAM9263_BASE_US2
-
-#define AT91_SMC	AT91_SMC0
-#define AT91_SDRAMC	AT91_SDRAMC0
+#define ATMEL_BASE_UDP		0xfff78000
+#define ATMEL_BASE_TCB0		0xfff7c000
+#define ATMEL_BASE_TC0		0xfff7c000
+#define ATMEL_BASE_TC1		0xfff7c040
+#define ATMEL_BASE_TC2		0xfff7c080
+#define ATMEL_BASE_MCI0		0xfff80000
+#define ATMEL_BASE_MCI1		0xfff84000
+#define ATMEL_BASE_TWI		0xfff88000
+#define ATMEL_BASE_USART0	0xfff8c000
+#define ATMEL_BASE_USART1	0xfff90000
+#define ATMEL_BASE_USART2	0xfff94000
+#define ATMEL_BASE_SSC0		0xfff98000
+#define ATMEL_BASE_SSC1		0xfff9c000
+#define ATMEL_BASE_AC97C	0xfffa0000
+#define ATMEL_BASE_SPI0		0xfffa4000
+#define ATMEL_BASE_SPI1		0xfffa8000
+#define ATMEL_BASE_CAN		0xfffac000
+#define ATMEL_BASE_PWMC		0xfffb8000
+#define ATMEL_BASE_EMAC		0xfffbc000
+#define ATMEL_BASE_ISI		0xfffc4000
+#define ATMEL_BASE_2DGE		0xfffc8000
 
-#endif /* CONFIG_AT91_LEGACY */
+/*
+ * System Peripherals physical base addresses.
+ */
+#define ATMEL_BASE_ECC0		0xffffe000
+#define ATMEL_BASE_SDRAMC0	0xffffe200
+#define ATMEL_BASE_SMC0		0xffffe400
+#define ATMEL_BASE_ECC1		0xffffe600
+#define ATMEL_BASE_SDRAMC1	0xffffe800
+#define ATMEL_BASE_SMC1		0xffffea00
+#define ATMEL_BASE_MATRIX	0xffffec00
+#define ATMEL_BASE_CCFG		0xffffed10
+#define ATMEL_BASE_DBGU		0xffffee00
+#define ATMEL_BASE_AIC		0xfffff000
+#define ATMEL_BASE_PIOA		0xfffff200
+#define ATMEL_BASE_PIOB		0xfffff400
+#define ATMEL_BASE_PIOC		0xfffff600
+#define ATMEL_BASE_PIOD		0xfffff800
+#define ATMEL_BASE_PIOE		0xfffffa00
+#define ATMEL_BASE_PMC		0xfffffc00
+#define ATMEL_BASE_RSTC		0xfffffd00
+#define ATMEL_BASE_SHDWC	0xfffffd10
+#define ATMEL_BASE_RTT0		0xfffffd20
+#define ATMEL_BASE_PIT		0xfffffd30
+#define ATMEL_BASE_WDT		0xfffffd40
+#define ATMEL_BASE_RTT1		0xfffffd50
+#define ATMEL_BASE_GPBR		0xfffffd60
 
 /*
  * Internal Memory.
  */
-#define AT91SAM9263_SRAM0_BASE	0x00300000	/* Internal SRAM 0 base address */
-#define AT91SAM9263_SRAM0_SIZE	(80 * SZ_1K)	/* Internal SRAM 0 size (80Kb) */
+#define ATMEL_BASE_SRAM0	0x00300000	/* Internal SRAM 0 */
+
+#define ATMEL_BASE_ROM		0x00400000	/* Internal ROM */
 
-#define AT91SAM9263_ROM_BASE	0x00400000	/* Internal ROM base address */
-#define AT91SAM9263_ROM_SIZE	SZ_128K		/* Internal ROM size (128Kb) */
+#define ATMEL_BASE_SRAM1	0x00500000	/* Internal SRAM 1 */
 
-#define AT91SAM9263_SRAM1_BASE	0x00500000	/* Internal SRAM 1 base address */
-#define AT91SAM9263_SRAM1_SIZE	SZ_16K		/* Internal SRAM 1 size (16Kb) */
+#define ATMEL_BASE_LCDC		0x00700000	/* LCD Controller */
+#define ATMEL_BASE_DMAC		0x00800000	/* DMA Controller */
+#define ATMEL_BASE_UHP		0x00a00000	/* USB Host controller */
 
-#define AT91SAM9263_LCDC_BASE	0x00700000	/* LCD Controller */
-#define AT91SAM9263_DMAC_BASE	0x00800000	/* DMA Controller */
-#define AT91SAM9263_UHP_BASE	0x00a00000	/* USB Host controller */
+/*
+ * Other misc defines
+ */
+#define ATMEL_PIO_PORTS		5		/* this SoCs has 5 PIO */
 
 /*
  * Cpu Name
  */
-#define CONFIG_SYS_AT91_CPU_NAME	"AT91SAM9263"
+#define ATMEL_CPU_NAME		"AT91SAM9263"
 
 #endif
-- 
1.5.6.5

[U-Boot] [PATCH 04/15] AT91: rework at91sam9g45.h

[Reinhard Meyer]

Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
---
 arch/arm/include/asm/arch-at91/at91sam9g45.h |  225 ++++++++++++--------------
 1 files changed, 107 insertions(+), 118 deletions(-)

diff --git a/arch/arm/include/asm/arch-at91/at91sam9g45.h b/arch/arm/include/asm/arch-at91/at91sam9g45.h
index 445f4b2..364b86c 100644
--- a/arch/arm/include/asm/arch-at91/at91sam9g45.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9g45.h
@@ -1,10 +1,10 @@
 /*
  * Chip-specific header file for the AT91SAM9M1x family
  *
- *  Copyright (C) 2008 Atmel Corporation.
+ * (C) 2008 Atmel Corporation.
  *
- * Common definitions.
- * Based on AT91SAM9G45 preliminary datasheet.
+ * Definitions for the SoC:
+ * AT91SAM9G45
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -16,137 +16,126 @@
 #define AT91SAM9G45_H
 
 /*
- * Peripheral identifiers/interrupts.
+ * defines to be used in other places
  */
-#define AT91_ID_FIQ		0	/* Advanced Interrupt Controller (FIQ) */
-#define AT91_ID_SYS		1	/* System Controller Interrupt */
-#define AT91SAM9G45_ID_PIOA	2	/* Parallel I/O Controller A */
-#define AT91SAM9G45_ID_PIOB	3	/* Parallel I/O Controller B */
-#define AT91SAM9G45_ID_PIOC	4	/* Parallel I/O Controller C */
-#define AT91SAM9G45_ID_PIODE	5	/* Parallel I/O Controller D and E */
-#define AT91SAM9G45_ID_TRNG	6	/* True Random Number Generator */
-#define AT91SAM9G45_ID_US0	7	/* USART 0 */
-#define AT91SAM9G45_ID_US1	8	/* USART 1 */
-#define AT91SAM9G45_ID_US2	9	/* USART 2 */
-#define AT91SAM9G45_ID_US3	10	/* USART 3 */
-#define AT91SAM9G45_ID_MCI0	11	/* High Speed Multimedia Card Interface 0 */
-#define AT91SAM9G45_ID_TWI0	12	/* Two-Wire Interface 0 */
-#define AT91SAM9G45_ID_TWI1	13	/* Two-Wire Interface 1 */
-#define AT91SAM9G45_ID_SPI0	14	/* Serial Peripheral Interface 0 */
-#define AT91SAM9G45_ID_SPI1	15	/* Serial Peripheral Interface 1 */
-#define AT91SAM9G45_ID_SSC0	16	/* Synchronous Serial Controller 0 */
-#define AT91SAM9G45_ID_SSC1	17	/* Synchronous Serial Controller 1 */
-#define AT91SAM9G45_ID_TCB	18	/* Timer Counter 0, 1, 2, 3, 4 and 5 */
-#define AT91SAM9G45_ID_PWMC	19	/* Pulse Width Modulation Controller */
-#define AT91SAM9G45_ID_TSC	20	/* Touch Screen ADC Controller */
-#define AT91SAM9G45_ID_DMA	21	/* DMA Controller */
-#define AT91SAM9G45_ID_UHPHS	22	/* USB Host High Speed */
-#define AT91SAM9G45_ID_LCDC	23	/* LCD Controller */
-#define AT91SAM9G45_ID_AC97C	24	/* AC97 Controller */
-#define AT91SAM9G45_ID_EMAC	25	/* Ethernet MAC */
-#define AT91SAM9G45_ID_ISI	26	/* Image Sensor Interface */
-#define AT91SAM9G45_ID_UDPHS	27	/* USB Device High Speed */
-#define AT91SAM9G45_ID_AESTDESSHA 28	/* AES + T-DES + SHA */
-#define AT91SAM9G45_ID_MCI1	29	/* High Speed Multimedia Card Interface 1 */
-#define AT91SAM9G45_ID_VDEC	30	/* Video Decoder */
-#define AT91SAM9G45_ID_IRQ0	31	/* Advanced Interrupt Controller */
-
-#define AT91_EMAC_BASE		0xfffbc000
-#define AT91_SMC_BASE		0xffffe800
-#define AT91_MATRIX_BASE	0xffffea00
-#define AT91_PIO_BASE		0xfffff200
-#define AT91_PMC_BASE		0xfffffc00
-#define AT91_RSTC_BASE		0xfffffd00
-#define AT91_PIT_BASE		0xfffffd30
-#define AT91_WDT_BASE		0xfffffd40
-
-#ifdef CONFIG_AT91_LEGACY
+#define CONFIG_ARM926EJS	/* ARM926EJS Core */
+#define CONFIG_AT91FAMILY	/* it's a member of AT91 */
 
 /*
- * User Peripheral physical base addresses.
+ * Peripheral identifiers/interrupts.
  */
-#define AT91SAM9G45_BASE_UDPHS		0xfff78000
-#define AT91SAM9G45_BASE_TC0		0xfff7c000
-#define AT91SAM9G45_BASE_TC1		0xfff7c040
-#define AT91SAM9G45_BASE_TC2		0xfff7c080
-#define AT91SAM9G45_BASE_MCI0		0xfff80000
-#define AT91SAM9G45_BASE_TWI0		0xfff84000
-#define AT91SAM9G45_BASE_TWI1		0xfff88000
-#define AT91SAM9G45_BASE_US0		0xfff8c000
-#define AT91SAM9G45_BASE_US1		0xfff90000
-#define AT91SAM9G45_BASE_US2		0xfff94000
-#define AT91SAM9G45_BASE_US3		0xfff98000
-#define AT91SAM9G45_BASE_SSC0		0xfff9c000
-#define AT91SAM9G45_BASE_SSC1		0xfffa0000
-#define AT91SAM9G45_BASE_SPI0		0xfffa4000
-#define AT91SAM9G45_BASE_SPI1		0xfffa8000
-#define AT91SAM9G45_BASE_AC97C		0xfffac000
-#define AT91SAM9G45_BASE_TSC		0xfffb0000
-#define AT91SAM9G45_BASE_ISI		0xfffb4000
-#define AT91SAM9G45_BASE_PWMC		0xfffb8000
-#define AT91SAM9G45_BASE_EMAC		0xfffbc000
-#define AT91SAM9G45_BASE_AES		0xfffc0000
-#define AT91SAM9G45_BASE_TDES		0xfffc4000
-#define AT91SAM9G45_BASE_SHA		0xfffc8000
-#define AT91SAM9G45_BASE_TRNG		0xfffcc000
-#define AT91SAM9G45_BASE_MCI1		0xfffd0000
-#define AT91SAM9G45_BASE_TC3		0xfffd4000
-#define AT91SAM9G45_BASE_TC4		0xfffd4040
-#define AT91SAM9G45_BASE_TC5		0xfffd4080
-#define AT91_BASE_SYS			0xffffe200
+#define ATMEL_ID_FIQ	0	/* Advanced Interrupt Controller (FIQ) */
+#define ATMEL_ID_SYS	1	/* System Controller Interrupt */
+#define ATMEL_ID_PIOA	2	/* Parallel I/O Controller A */
+#define ATMEL_ID_PIOB	3	/* Parallel I/O Controller B */
+#define ATMEL_ID_PIOC	4	/* Parallel I/O Controller C */
+#define ATMEL_ID_PIODE	5	/* Parallel I/O Controller D and E */
+#define ATMEL_ID_TRNG	6	/* True Random Number Generator */
+#define ATMEL_ID_USART0	7	/* USART 0 */
+#define ATMEL_ID_USART1	8	/* USART 1 */
+#define ATMEL_ID_USART2	9	/* USART 2 */
+#define ATMEL_ID_USART3	10	/* USART 3 */
+#define ATMEL_ID_MCI0	11	/* High Speed Multimedia Card Interface 0 */
+#define ATMEL_ID_TWI0	12	/* Two-Wire Interface 0 */
+#define ATMEL_ID_TWI1	13	/* Two-Wire Interface 1 */
+#define ATMEL_ID_SPI0	14	/* Serial Peripheral Interface 0 */
+#define ATMEL_ID_SPI1	15	/* Serial Peripheral Interface 1 */
+#define ATMEL_ID_SSC0	16	/* Synchronous Serial Controller 0 */
+#define ATMEL_ID_SSC1	17	/* Synchronous Serial Controller 1 */
+#define ATMEL_ID_TCB	18	/* Timer Counter 0, 1, 2, 3, 4 and 5 */
+#define ATMEL_ID_PWMC	19	/* Pulse Width Modulation Controller */
+#define ATMEL_ID_TSC	20	/* Touch Screen ADC Controller */
+#define ATMEL_ID_DMA	21	/* DMA Controller */
+#define ATMEL_ID_UHPHS	22	/* USB Host High Speed */
+#define ATMEL_ID_LCDC	23	/* LCD Controller */
+#define ATMEL_ID_AC97C	24	/* AC97 Controller */
+#define ATMEL_ID_EMAC	25	/* Ethernet MAC */
+#define ATMEL_ID_ISI	26	/* Image Sensor Interface */
+#define ATMEL_ID_UDPHS	27	/* USB Device High Speed */
+#define ATMEL_ID_AESTDESSHA 28	/* AES + T-DES + SHA */
+#define ATMEL_ID_MCI1	29	/* High Speed Multimedia Card Interface 1 */
+#define ATMEL_ID_VDEC	30	/* Video Decoder */
+#define ATMEL_ID_IRQ0	31	/* Advanced Interrupt Controller */
 
 /*
- * System Peripherals (offset from AT91_BASE_SYS)
+ * User Peripherals physical base addresses.
  */
-#define AT91_ECC	(0xffffe200 - AT91_BASE_SYS)
-#define AT91_DDRSDRC1	(0xffffe400 - AT91_BASE_SYS)
-#define AT91_DDRSDRC0	(0xffffe600 - AT91_BASE_SYS)
-#define AT91_SMC	(0xffffe800 - AT91_BASE_SYS)
-#define AT91_MATRIX	(0xffffea00 - AT91_BASE_SYS)
-#define AT91_DMA	(0xffffec00 - AT91_BASE_SYS)
-#define AT91_DBGU	(0xffffee00 - AT91_BASE_SYS)
-#define AT91_AIC	(0xfffff000 - AT91_BASE_SYS)
-#define AT91_PIOA	(0xfffff200 - AT91_BASE_SYS)
-#define AT91_PIOB	(0xfffff400 - AT91_BASE_SYS)
-#define AT91_PIOC	(0xfffff600 - AT91_BASE_SYS)
-#define AT91_PIOD	(0xfffff800 - AT91_BASE_SYS)
-#define AT91_PIOE	(0xfffffa00 - AT91_BASE_SYS)
-#define AT91_PMC	(0xfffffc00 - AT91_BASE_SYS)
-#define AT91_RSTC	(0xfffffd00 - AT91_BASE_SYS)
-#define AT91_SHDWC	(0xfffffd10 - AT91_BASE_SYS)
-#define AT91_RTT	(0xfffffd20 - AT91_BASE_SYS)
-#define AT91_PIT	(0xfffffd30 - AT91_BASE_SYS)
-#define AT91_WDT	(0xfffffd40 - AT91_BASE_SYS)
-#define AT91_GPBR	(0xfffffd60 - AT91_BASE_SYS)
-#define AT91_RTC	(0xfffffdb0 - AT91_BASE_SYS)
-
-#define AT91_USART0	AT91SAM9G45_BASE_US0
-#define AT91_USART1	AT91SAM9G45_BASE_US1
-#define AT91_USART2	AT91SAM9G45_BASE_US2
-#define AT91_USART3	AT91SAM9G45_BASE_US3
+#define ATMEL_BASE_UDPHS	0xfff78000
+#define ATMEL_BASE_TC0		0xfff7c000
+#define ATMEL_BASE_TC1		0xfff7c040
+#define ATMEL_BASE_TC2		0xfff7c080
+#define ATMEL_BASE_MCI0		0xfff80000
+#define ATMEL_BASE_TWI0		0xfff84000
+#define ATMEL_BASE_TWI1		0xfff88000
+#define ATMEL_BASE_USART0	0xfff8c000
+#define ATMEL_BASE_USART1	0xfff90000
+#define ATMEL_BASE_USART2	0xfff94000
+#define ATMEL_BASE_USART3	0xfff98000
+#define ATMEL_BASE_SSC0		0xfff9c000
+#define ATMEL_BASE_SSC1		0xfffa0000
+#define ATMEL_BASE_SPI0		0xfffa4000
+#define ATMEL_BASE_SPI1		0xfffa8000
+#define ATMEL_BASE_AC97C	0xfffac000
+#define ATMEL_BASE_TSC		0xfffb0000
+#define ATMEL_BASE_ISI		0xfffb4000
+#define ATMEL_BASE_PWMC		0xfffb8000
+#define ATMEL_BASE_EMAC		0xfffbc000
+#define ATMEL_BASE_AES		0xfffc0000
+#define ATMEL_BASE_TDES		0xfffc4000
+#define ATMEL_BASE_SHA		0xfffc8000
+#define ATMEL_BASE_TRNG		0xfffcc000
+#define ATMEL_BASE_MCI1		0xfffd0000
+#define ATMEL_BASE_TC3		0xfffd4000
+#define ATMEL_BASE_TC4		0xfffd4040
+#define ATMEL_BASE_TC5		0xfffd4080
+/* Reserved:	0xfffd8000 - 0xffffe1ff */
 
-#endif
+/*
+ * System Peripherals physical base addresses.
+ */
+#define ATMEL_BASE_SYS		0xffffe200
+#define ATMEL_BASE_ECC		0xffffe200
+#define ATMEL_BASE_DDRSDRC1	0xffffe400
+#define ATMEL_BASE_DDRSDRC0	0xffffe600
+#define ATMEL_BASE_SMC		0xffffe800
+#define ATMEL_BASE_MATRIX	0xffffea00
+#define ATMEL_BASE_DMA		0xffffec00
+#define ATMEL_BASE_DBGU		0xffffee00
+#define ATMEL_BASE_AIC		0xfffff000
+#define ATMEL_BASE_PIOA		0xfffff200
+#define ATMEL_BASE_PIOB		0xfffff400
+#define ATMEL_BASE_PIOC		0xfffff600
+#define ATMEL_BASE_PIOD		0xfffff800
+#define ATMEL_BASE_PIOE		0xfffffa00
+#define ATMEL_BASE_PMC		0xfffffc00
+#define ATMEL_BASE_RSTC		0xfffffd00
+#define ATMEL_BASE_SHDWN	0xfffffd10
+#define ATMEL_BASE_RTT		0xfffffd20
+#define ATMEL_BASE_PIT		0xfffffd30
+#define ATMEL_BASE_WDT		0xfffffd40
+#define ATMEL_BASE_GPBR		0xfffffd60
+#define ATMEL_BASE_RTC		0xfffffdb0
+/* Reserved:	0xfffffdc0 - 0xffffffff */
 
 /*
  * Internal Memory.
  */
-#define AT91SAM9G45_SRAM_BASE	0x00300000	/* Internal SRAM base address */
-#define AT91SAM9G45_SRAM_SIZE	SZ_64K		/* Internal SRAM size (64Kb) */
-
-#define AT91SAM9G45_ROM_BASE	0x00400000	/* Internal ROM base address */
-#define AT91SAM9G45_ROM_SIZE	SZ_64K		/* Internal ROM size (64Kb) */
+#define ATMEL_BASE_SRAM		0x00300000	/* Internal SRAM base address */
+#define ATMEL_BASE_ROM		0x00400000	/* Internal ROM base address */
+#define ATMEL_BASE_LCDC		0x00500000	/* LCD Controller */
+#define ATMEL_BASE_UDPHS_FIFO	0x00600000	/* USB Device HS controller */
+#define ATMEL_BASE_HCI		0x00700000	/* USB Host controller (OHCI) */
+#define ATMEL_BASE_EHCI		0x00800000	/* USB Host controller (EHCI) */
+#define ATMEL_BASE_VDEC		0x00900000	/* Video Decoder Controller */
 
-#define AT91SAM9G45_LCDC_BASE	0x00500000	/* LCD Controller */
-#define AT91SAM9G45_UDPHS_FIFO	0x00600000	/* USB Device HS controller */
-#define AT91SAM9G45_HCI_BASE	0x00700000	/* USB Host controller (OHCI) */
-#define AT91SAM9G45_EHCI_BASE	0x00800000	/* USB Host controller (EHCI) */
-#define AT91SAM9G45_VDEC_BASE	0x00900000	/* Video Decoder Controller */
-
-#define CONFIG_DRAM_BASE	AT91_CHIPSELECT_6
+/*
+ * Other misc defines
+ */
+#define ATMEL_PIO_PORTS		5		/* this SoCs has 5 PIO */
 
 /*
  * Cpu Name
  */
-#define CONFIG_SYS_AT91_CPU_NAME	"AT91SAM9G45"
+#define ATMEL_CPU_NAME		"AT91SAM9G45"
 
 #endif
-- 
1.5.6.5

[U-Boot] [PATCH 05/15] AT91: cleanup hardware.h, remove memory-map.h

[Reinhard Meyer]

Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
---
 arch/arm/include/asm/arch-at91/hardware.h   |   96 +++++++++------------------
 arch/arm/include/asm/arch-at91/memory-map.h |   36 ----------
 2 files changed, 32 insertions(+), 100 deletions(-)
 delete mode 100644 arch/arm/include/asm/arch-at91/memory-map.h

diff --git a/arch/arm/include/asm/arch-at91/hardware.h b/arch/arm/include/asm/arch-at91/hardware.h
index 6b44d61..c69c451 100644
--- a/arch/arm/include/asm/arch-at91/hardware.h
+++ b/arch/arm/include/asm/arch-at91/hardware.h
@@ -1,80 +1,48 @@
 /*
- * [origin: Linux kernel include/asm-arm/arch-at91/hardware.h]
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
+ * Lead Tech Design <www.leadtechdesign.com>
  *
- *  Copyright (C) 2003 SAN People
- *  Copyright (C) 2003 ATMEL
+ * See file CREDITS for list of people who contributed to this
+ * project.
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
  *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
  */
-
-#ifndef __ASM_ARCH_HARDWARE_H
-#define __ASM_ARCH_HARDWARE_H
-
-#include <asm/sizes.h>
+#ifndef __ASM_ARM_ARCH_HARDWARE_H__
+#define __ASM_ARM_ARCH_HARDWARE_H__
 
 #if defined(CONFIG_AT91RM9200)
-#include <asm/arch-at91/at91rm9200.h>
-#define AT91_PMC_UHP	AT91RM9200_PMC_UHP
-#elif defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20)
-#include <asm/arch/at91sam9260.h>
-#define AT91_BASE_MCI	AT91SAM9260_BASE_MCI
-#define AT91_BASE_SPI	AT91SAM9260_BASE_SPI0
-#define AT91_BASE_SPI1	AT91SAM9260_BASE_SPI1
-#define AT91_ID_UHP	AT91SAM9260_ID_UHP
-#define AT91_PMC_UHP	AT91SAM926x_PMC_UHP
+# include <asm/arch/at91rm9200.h>
+#elif defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20) || \
+	defined(CONFIG_AT91SAM9XE)
+# include <asm/arch/at91sam9260.h>
 #elif defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10)
-#include <asm/arch/at91sam9261.h>
-#define AT91_BASE_SPI	AT91SAM9261_BASE_SPI0
-#define AT91_ID_UHP	AT91SAM9261_ID_UHP
-#define AT91_PMC_UHP	AT91SAM926x_PMC_UHP
+# include <asm/arch/at91sam9261.h>
 #elif defined(CONFIG_AT91SAM9263)
-#include <asm/arch/at91sam9263.h>
-#define AT91_BASE_SPI	AT91SAM9263_BASE_SPI0
-#define AT91_ID_UHP	AT91SAM9263_ID_UHP
-#define AT91_PMC_UHP	AT91SAM926x_PMC_UHP
+# include <asm/arch/at91sam9263.h>
 #elif defined(CONFIG_AT91SAM9RL)
-#include <asm/arch/at91sam9rl.h>
-#define AT91_BASE_SPI	AT91SAM9RL_BASE_SPI
-#define AT91_ID_UHP	AT91SAM9RL_ID_UHP
+# include <asm/arch/at91sam9rl.h>
 #elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
-#include <asm/arch/at91sam9g45.h>
-#define AT91_BASE_EMAC  AT91SAM9G45_BASE_EMAC
-#define AT91_BASE_SPI   AT91SAM9G45_BASE_SPI0
-#define AT91_ID_UHP     AT91SAM9G45_ID_UHPHS
-#define AT91_PMC_UHP    AT91SAM926x_PMC_UHP
+# include <asm/arch/at91sam9g45.h>
 #elif defined(CONFIG_AT91CAP9)
-#include <asm/arch/at91cap9.h>
-#define AT91_BASE_SPI	AT91CAP9_BASE_SPI0
-#define AT91_ID_UHP	AT91CAP9_ID_UHP
-#define AT91_PMC_UHP	AT91CAP9_PMC_UHP
+# include <asm/arch/at91cap9.h>
 #elif defined(CONFIG_AT91X40)
-#include <asm/arch/at91x40.h>
+# include <asm/arch/at91x40.h>
 #else
-#error "Unsupported AT91 processor"
+# error "Unsupported AT91 processor"
 #endif
 
-/* External Memory Map */
-#define AT91_CHIPSELECT_0	0x10000000
-#define AT91_CHIPSELECT_1	0x20000000
-#define AT91_CHIPSELECT_2	0x30000000
-#define AT91_CHIPSELECT_3	0x40000000
-#define AT91_CHIPSELECT_4	0x50000000
-#define AT91_CHIPSELECT_5	0x60000000
-#define AT91_CHIPSELECT_6	0x70000000
-#define AT91_CHIPSELECT_7	0x80000000
-
-/* SDRAM */
-#ifdef CONFIG_DRAM_BASE
-#define AT91_SDRAM_BASE		CONFIG_DRAM_BASE
-#else
-#define AT91_SDRAM_BASE		AT91_CHIPSELECT_1
-#endif
-
-/* Clocks */
-#define AT91_SLOW_CLOCK		32768		/* slow clock */
-
-#endif
+#endif /* __ASM_ARM_ARCH_MEMORYMAP_H__ */
diff --git a/arch/arm/include/asm/arch-at91/memory-map.h b/arch/arm/include/asm/arch-at91/memory-map.h
deleted file mode 100644
index d489fa2..0000000
--- a/arch/arm/include/asm/arch-at91/memory-map.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * (C) Copyright 2007-2008
- * Stelian Pop <stelian.pop@leadtechdesign.com>
- * Lead Tech Design <www.leadtechdesign.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-#ifndef __ASM_ARM_ARCH_MEMORYMAP_H__
-#define __ASM_ARM_ARCH_MEMORYMAP_H__
-
-#include <asm/arch/hardware.h>
-
-#define USART0_BASE AT91_USART0
-#define USART1_BASE AT91_USART1
-#define USART2_BASE AT91_USART2
-#define USART3_BASE (AT91_BASE_SYS + AT91_DBGU)
-#define SPI0_BASE	AT91_BASE_SPI
-#define SPI1_BASE	AT91_BASE_SPI1
-
-#endif /* __ASM_ARM_ARCH_MEMORYMAP_H__ */
-- 
1.5.6.5

[U-Boot] [PATCH 05/15] AT91: cleanup hardware.h, remove memory-map.h

[Andreas Bießmann]

Am 18.02.2011 13:50, schrieb Reinhard Meyer:
> Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
> ---
>  arch/arm/include/asm/arch-at91/hardware.h   |   96 +++++++++------------------
>  arch/arm/include/asm/arch-at91/memory-map.h |   36 ----------
>  2 files changed, 32 insertions(+), 100 deletions(-)
>  delete mode 100644 arch/arm/include/asm/arch-at91/memory-map.h
> 
> diff --git a/arch/arm/include/asm/arch-at91/hardware.h b/arch/arm/include/asm/arch-at91/hardware.h
> index 6b44d61..c69c451 100644
> --- a/arch/arm/include/asm/arch-at91/hardware.h
> +++ b/arch/arm/include/asm/arch-at91/hardware.h
> @@ -1,80 +1,48 @@
>  /*
> - * [origin: Linux kernel include/asm-arm/arch-at91/hardware.h]
> + * (C) Copyright 2007-2008
> + * Stelian Pop <stelian.pop@leadtechdesign.com>
> + * Lead Tech Design <www.leadtechdesign.com>
>   *
> - *  Copyright (C) 2003 SAN People
> - *  Copyright (C) 2003 ATMEL
> + * See file CREDITS for list of people who contributed to this
> + * project.
>   *
> - * This program is free software; you can redistribute it and/or modify
> - * it under the terms of the GNU General Public License as published by
> - * the Free Software Foundation; either version 2 of the License, or
> - * (at your option) any later version.
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
>   *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
>   */
> -
> -#ifndef __ASM_ARCH_HARDWARE_H
> -#define __ASM_ARCH_HARDWARE_H
> -
> -#include <asm/sizes.h>
> +#ifndef __ASM_ARM_ARCH_HARDWARE_H__
> +#define __ASM_ARM_ARCH_HARDWARE_H__
>  
>  #if defined(CONFIG_AT91RM9200)
> -#include <asm/arch-at91/at91rm9200.h>
> -#define AT91_PMC_UHP	AT91RM9200_PMC_UHP
> -#elif defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20)
> -#include <asm/arch/at91sam9260.h>
> -#define AT91_BASE_MCI	AT91SAM9260_BASE_MCI
> -#define AT91_BASE_SPI	AT91SAM9260_BASE_SPI0
> -#define AT91_BASE_SPI1	AT91SAM9260_BASE_SPI1
> -#define AT91_ID_UHP	AT91SAM9260_ID_UHP
> -#define AT91_PMC_UHP	AT91SAM926x_PMC_UHP
> +# include <asm/arch/at91rm9200.h>
> +#elif defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20) || \
> +	defined(CONFIG_AT91SAM9XE)
> +# include <asm/arch/at91sam9260.h>
>  #elif defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10)
> -#include <asm/arch/at91sam9261.h>
> -#define AT91_BASE_SPI	AT91SAM9261_BASE_SPI0
> -#define AT91_ID_UHP	AT91SAM9261_ID_UHP
> -#define AT91_PMC_UHP	AT91SAM926x_PMC_UHP
> +# include <asm/arch/at91sam9261.h>
>  #elif defined(CONFIG_AT91SAM9263)
> -#include <asm/arch/at91sam9263.h>
> -#define AT91_BASE_SPI	AT91SAM9263_BASE_SPI0
> -#define AT91_ID_UHP	AT91SAM9263_ID_UHP
> -#define AT91_PMC_UHP	AT91SAM926x_PMC_UHP
> +# include <asm/arch/at91sam9263.h>
>  #elif defined(CONFIG_AT91SAM9RL)
> -#include <asm/arch/at91sam9rl.h>
> -#define AT91_BASE_SPI	AT91SAM9RL_BASE_SPI
> -#define AT91_ID_UHP	AT91SAM9RL_ID_UHP
> +# include <asm/arch/at91sam9rl.h>
>  #elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
> -#include <asm/arch/at91sam9g45.h>
> -#define AT91_BASE_EMAC  AT91SAM9G45_BASE_EMAC
> -#define AT91_BASE_SPI   AT91SAM9G45_BASE_SPI0
> -#define AT91_ID_UHP     AT91SAM9G45_ID_UHPHS
> -#define AT91_PMC_UHP    AT91SAM926x_PMC_UHP
> +# include <asm/arch/at91sam9g45.h>
>  #elif defined(CONFIG_AT91CAP9)
> -#include <asm/arch/at91cap9.h>
> -#define AT91_BASE_SPI	AT91CAP9_BASE_SPI0
> -#define AT91_ID_UHP	AT91CAP9_ID_UHP
> -#define AT91_PMC_UHP	AT91CAP9_PMC_UHP
> +# include <asm/arch/at91cap9.h>
>  #elif defined(CONFIG_AT91X40)
> -#include <asm/arch/at91x40.h>
> +# include <asm/arch/at91x40.h>
>  #else
> -#error "Unsupported AT91 processor"
> +# error "Unsupported AT91 processor"
>  #endif
>  
> -/* External Memory Map */
> -#define AT91_CHIPSELECT_0	0x10000000
> -#define AT91_CHIPSELECT_1	0x20000000
> -#define AT91_CHIPSELECT_2	0x30000000
> -#define AT91_CHIPSELECT_3	0x40000000
> -#define AT91_CHIPSELECT_4	0x50000000
> -#define AT91_CHIPSELECT_5	0x60000000
> -#define AT91_CHIPSELECT_6	0x70000000
> -#define AT91_CHIPSELECT_7	0x80000000
> -
> -/* SDRAM */
> -#ifdef CONFIG_DRAM_BASE
> -#define AT91_SDRAM_BASE		CONFIG_DRAM_BASE
> -#else
> -#define AT91_SDRAM_BASE		AT91_CHIPSELECT_1
> -#endif
> -
> -/* Clocks */
> -#define AT91_SLOW_CLOCK		32768		/* slow clock */
> -
> -#endif
> +#endif /* __ASM_ARM_ARCH_MEMORYMAP_H__ */

hardware.h here!

> diff --git a/arch/arm/include/asm/arch-at91/memory-map.h b/arch/arm/include/asm/arch-at91/memory-map.h
> deleted file mode 100644
> index d489fa2..0000000
> --- a/arch/arm/include/asm/arch-at91/memory-map.h
> +++ /dev/null
> @@ -1,36 +0,0 @@
> -/*
> - * (C) Copyright 2007-2008
> - * Stelian Pop <stelian.pop@leadtechdesign.com>
> - * Lead Tech Design <www.leadtechdesign.com>
> - *
> - * See file CREDITS for list of people who contributed to this
> - * project.
> - *
> - * This program is free software; you can redistribute it and/or
> - * modify it under the terms of the GNU General Public License as
> - * published by the Free Software Foundation; either version 2 of
> - * the License, or (at your option) any later version.
> - *
> - * This program is distributed in the hope that it will be useful,
> - * but WITHOUT ANY WARRANTY; without even the implied warranty of
> - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> - * GNU General Public License for more details.
> - *
> - * You should have received a copy of the GNU General Public License
> - * along with this program; if not, write to the Free Software
> - * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> - * MA 02111-1307 USA
> - */
> -#ifndef __ASM_ARM_ARCH_MEMORYMAP_H__
> -#define __ASM_ARM_ARCH_MEMORYMAP_H__
> -
> -#include <asm/arch/hardware.h>
> -
> -#define USART0_BASE AT91_USART0
> -#define USART1_BASE AT91_USART1
> -#define USART2_BASE AT91_USART2
> -#define USART3_BASE (AT91_BASE_SYS + AT91_DBGU)
> -#define SPI0_BASE	AT91_BASE_SPI
> -#define SPI1_BASE	AT91_BASE_SPI1
> -
> -#endif /* __ASM_ARM_ARCH_MEMORYMAP_H__ */

[U-Boot] [PATCH 05/15] AT91: cleanup hardware.h, remove memory-map.h

[Reinhard Meyer]

Dear Andreas Bie?mann,
>> +#ifndef __ASM_ARM_ARCH_HARDWARE_H__
>> +#define __ASM_ARM_ARCH_HARDWARE_H__
...
>> +#endif /* __ASM_ARM_ARCH_MEMORYMAP_H__ */
>
> hardware.h here!

Thanks for discovering this!
I'll lowercase and remove the rather pointless comment.
Reinhard

[U-Boot] [PATCH 06/15] AT91: fix related arch-at91 header files

[Reinhard Meyer]

Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
---
 arch/arm/include/asm/arch-at91/at91_common.h |    3 +--
 arch/arm/include/asm/arch-at91/at91_pio.h    |   19 +++----------------
 arch/arm/include/asm/arch-at91/gpio.h        |   18 +++++++++---------
 arch/arm/include/asm/arch-at91/io.h          |    4 ++--
 4 files changed, 15 insertions(+), 29 deletions(-)

diff --git a/arch/arm/include/asm/arch-at91/at91_common.h b/arch/arm/include/asm/arch-at91/at91_common.h
index 0067190..330edd8 100644
--- a/arch/arm/include/asm/arch-at91/at91_common.h
+++ b/arch/arm/include/asm/arch-at91/at91_common.h
@@ -28,11 +28,10 @@
 void at91_can_hw_init(void);
 void at91_macb_hw_init(void);
 void at91_mci_hw_init(void);
-void at91_serial_hw_init(void);
 void at91_serial0_hw_init(void);
 void at91_serial1_hw_init(void);
 void at91_serial2_hw_init(void);
-void at91_serial3_hw_init(void);
+void at91_seriald_hw_init(void);
 void at91_spi0_hw_init(unsigned long cs_mask);
 void at91_spi1_hw_init(unsigned long cs_mask);
 void at91_uhp_hw_init(void);
diff --git a/arch/arm/include/asm/arch-at91/at91_pio.h b/arch/arm/include/asm/arch-at91/at91_pio.h
index f7915a3..0b5bd69 100644
--- a/arch/arm/include/asm/arch-at91/at91_pio.h
+++ b/arch/arm/include/asm/arch-at91/at91_pio.h
@@ -76,32 +76,19 @@ typedef struct at91_port {
 	u32	reserved6[85];
 } at91_port_t;
 
-#if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \
-	defined(CONFIG_AT91SAM9G10) || defined(CONFIG_AT91SAM9G20)
-#define AT91_PIO_PORTS	3
-#elif defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G45) || \
-	defined(CONFIG_AT91SAM9M10G45)
-#define AT91_PIO_PORTS	5
-#elif defined(CONFIG_AT91RM9200) || defined(CONFIG_AT91CAP9) || \
-	defined(CONFIG_AT91SAM9RL)
-#define AT91_PIO_PORTS	4
-#else
-#error "Unsupported cpu. Please update at91_pio.h"
-#endif
-
 typedef union at91_pio {
 	struct {
 		at91_port_t	pioa;
 		at91_port_t	piob;
 		at91_port_t	pioc;
-	#if (AT91_PIO_PORTS > 3)
+	#if (ATMEL_PIO_PORTS > 3)
 		at91_port_t	piod;
 	#endif
-	#if (AT91_PIO_PORTS > 4)
+	#if (ATMEL_PIO_PORTS > 4)
 		at91_port_t	pioe;
 	#endif
 	} ;
-	at91_port_t port[AT91_PIO_PORTS];
+	at91_port_t port[ATMEL_PIO_PORTS];
 } at91_pio_t;
 
 #ifdef CONFIG_AT91_GPIO
diff --git a/arch/arm/include/asm/arch-at91/gpio.h b/arch/arm/include/asm/arch-at91/gpio.h
index 716f81f..293d0bf 100644
--- a/arch/arm/include/asm/arch-at91/gpio.h
+++ b/arch/arm/include/asm/arch-at91/gpio.h
@@ -18,7 +18,7 @@
 #include <asm/arch/at91_pio.h>
 #include <asm/arch/hardware.h>
 
-#ifdef CONFIG_AT91_LEGACY
+#ifdef CONFIG_ATMEL_LEGACY
 
 #define PIN_BASE		32
 
@@ -192,13 +192,13 @@
 #define	AT91_PIN_PE31	(PIN_BASE + 0x80 + 31)
 
 static unsigned long at91_pios[] = {
-	AT91_PIOA,
-	AT91_PIOB,
-	AT91_PIOC,
-#ifdef AT91_PIOD
-	AT91_PIOD,
-#ifdef AT91_PIOE
-	AT91_PIOE
+	ATMEL_BASE_PIOA,
+	ATMEL_BASE_PIOB,
+	ATMEL_BASE_PIOC,
+#ifdef ATMEL_BASE_PIOD
+	ATMEL_BASE_PIOD,
+#ifdef ATMEL_BASE_PIOE
+	ATMEL_BASE_PIOE
 #endif
 #endif
 };
@@ -207,7 +207,7 @@ static inline void *pin_to_controller(unsigned pin)
 {
 	pin -= PIN_BASE;
 	pin /= 32;
-	return (void *)(AT91_BASE_SYS + at91_pios[pin]);
+	return (void *)(at91_pios[pin]);
 }
 
 static inline unsigned pin_to_mask(unsigned pin)
diff --git a/arch/arm/include/asm/arch-at91/io.h b/arch/arm/include/asm/arch-at91/io.h
index 38d185e..d0daa4e 100644
--- a/arch/arm/include/asm/arch-at91/io.h
+++ b/arch/arm/include/asm/arch-at91/io.h
@@ -27,14 +27,14 @@
 
 static inline unsigned int at91_sys_read(unsigned int reg_offset)
 {
-	void *addr = (void *)AT91_BASE_SYS;
+	void *addr = (void *)ATMEL_BASE_SYS;
 
 	return __raw_readl(addr + reg_offset);
 }
 
 static inline void at91_sys_write(unsigned int reg_offset, unsigned long value)
 {
-	void *addr = (void *)AT91_BASE_SYS;
+	void *addr = (void *)ATMEL_BASE_SYS;
 
 	__raw_writel(value, addr + reg_offset);
 }
-- 
1.5.6.5

[U-Boot] [PATCH 06/15] AT91: fix related arch-at91 header files

[Andreas Bießmann]

Am 18.02.2011 13:50, schrieb Reinhard Meyer:
> Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
> ---
>  arch/arm/include/asm/arch-at91/at91_common.h |    3 +--
>  arch/arm/include/asm/arch-at91/at91_pio.h    |   19 +++----------------
>  arch/arm/include/asm/arch-at91/gpio.h        |   18 +++++++++---------
>  arch/arm/include/asm/arch-at91/io.h          |    4 ++--
>  4 files changed, 15 insertions(+), 29 deletions(-)
> 
> diff --git a/arch/arm/include/asm/arch-at91/at91_common.h b/arch/arm/include/asm/arch-at91/at91_common.h
> index 0067190..330edd8 100644
> --- a/arch/arm/include/asm/arch-at91/at91_common.h
> +++ b/arch/arm/include/asm/arch-at91/at91_common.h
> @@ -28,11 +28,10 @@
>  void at91_can_hw_init(void);
>  void at91_macb_hw_init(void);
>  void at91_mci_hw_init(void);
> -void at91_serial_hw_init(void);
>  void at91_serial0_hw_init(void);
>  void at91_serial1_hw_init(void);
>  void at91_serial2_hw_init(void);
> -void at91_serial3_hw_init(void);
> +void at91_seriald_hw_init(void);
>  void at91_spi0_hw_init(unsigned long cs_mask);
>  void at91_spi1_hw_init(unsigned long cs_mask);
>  void at91_uhp_hw_init(void);
> diff --git a/arch/arm/include/asm/arch-at91/at91_pio.h b/arch/arm/include/asm/arch-at91/at91_pio.h
> index f7915a3..0b5bd69 100644
> --- a/arch/arm/include/asm/arch-at91/at91_pio.h
> +++ b/arch/arm/include/asm/arch-at91/at91_pio.h
> @@ -76,32 +76,19 @@ typedef struct at91_port {
>  	u32	reserved6[85];
>  } at91_port_t;
>  
> -#if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \
> -	defined(CONFIG_AT91SAM9G10) || defined(CONFIG_AT91SAM9G20)
> -#define AT91_PIO_PORTS	3
> -#elif defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G45) || \
> -	defined(CONFIG_AT91SAM9M10G45)
> -#define AT91_PIO_PORTS	5
> -#elif defined(CONFIG_AT91RM9200) || defined(CONFIG_AT91CAP9) || \
> -	defined(CONFIG_AT91SAM9RL)
> -#define AT91_PIO_PORTS	4
> -#else
> -#error "Unsupported cpu. Please update at91_pio.h"
> -#endif
> -
>  typedef union at91_pio {
>  	struct {
>  		at91_port_t	pioa;
>  		at91_port_t	piob;
>  		at91_port_t	pioc;
> -	#if (AT91_PIO_PORTS > 3)
> +	#if (ATMEL_PIO_PORTS > 3)
>  		at91_port_t	piod;
>  	#endif
> -	#if (AT91_PIO_PORTS > 4)
> +	#if (ATMEL_PIO_PORTS > 4)
>  		at91_port_t	pioe;
>  	#endif
>  	} ;
> -	at91_port_t port[AT91_PIO_PORTS];
> +	at91_port_t port[ATMEL_PIO_PORTS];
>  } at91_pio_t;
>  
>  #ifdef CONFIG_AT91_GPIO
> diff --git a/arch/arm/include/asm/arch-at91/gpio.h b/arch/arm/include/asm/arch-at91/gpio.h
> index 716f81f..293d0bf 100644
> --- a/arch/arm/include/asm/arch-at91/gpio.h
> +++ b/arch/arm/include/asm/arch-at91/gpio.h
> @@ -18,7 +18,7 @@
>  #include <asm/arch/at91_pio.h>
>  #include <asm/arch/hardware.h>
>  
> -#ifdef CONFIG_AT91_LEGACY
> +#ifdef CONFIG_ATMEL_LEGACY

is this still necessary?

>  
>  #define PIN_BASE		32
>  
> @@ -192,13 +192,13 @@
>  #define	AT91_PIN_PE31	(PIN_BASE + 0x80 + 31)
>  
>  static unsigned long at91_pios[] = {
> -	AT91_PIOA,
> -	AT91_PIOB,
> -	AT91_PIOC,
> -#ifdef AT91_PIOD
> -	AT91_PIOD,
> -#ifdef AT91_PIOE
> -	AT91_PIOE
> +	ATMEL_BASE_PIOA,
> +	ATMEL_BASE_PIOB,
> +	ATMEL_BASE_PIOC,
> +#ifdef ATMEL_BASE_PIOD
> +	ATMEL_BASE_PIOD,
> +#ifdef ATMEL_BASE_PIOE
> +	ATMEL_BASE_PIOE
>  #endif
>  #endif
>  };
> @@ -207,7 +207,7 @@ static inline void *pin_to_controller(unsigned pin)
>  {
>  	pin -= PIN_BASE;
>  	pin /= 32;
> -	return (void *)(AT91_BASE_SYS + at91_pios[pin]);
> +	return (void *)(at91_pios[pin]);
>  }
>  
>  static inline unsigned pin_to_mask(unsigned pin)
> diff --git a/arch/arm/include/asm/arch-at91/io.h b/arch/arm/include/asm/arch-at91/io.h
> index 38d185e..d0daa4e 100644
> --- a/arch/arm/include/asm/arch-at91/io.h
> +++ b/arch/arm/include/asm/arch-at91/io.h
> @@ -27,14 +27,14 @@
>  
>  static inline unsigned int at91_sys_read(unsigned int reg_offset)
>  {
> -	void *addr = (void *)AT91_BASE_SYS;
> +	void *addr = (void *)ATMEL_BASE_SYS;
>  
>  	return __raw_readl(addr + reg_offset);
>  }
>  
>  static inline void at91_sys_write(unsigned int reg_offset, unsigned long value)
>  {
> -	void *addr = (void *)AT91_BASE_SYS;
> +	void *addr = (void *)ATMEL_BASE_SYS;
>  
>  	__raw_writel(value, addr + reg_offset);
>  }

[U-Boot] [PATCH 06/15] AT91: fix related arch-at91 header files

[Reinhard Meyer]

Dear Andreas Bie?mann,
>> +#ifdef CONFIG_ATMEL_LEGACY
>
> is this still necessary?
I am afraid so. The ATMEL GPIO code should be reworked.
Reinhard

[U-Boot] [PATCH 07/15] AT91: fix related at91 system/driver files

[Reinhard Meyer]

Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
---
 arch/arm/cpu/arm926ejs/at91/Makefile              |    1 +
 arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c |   45 ++++++---------------
 arch/arm/cpu/arm926ejs/at91/clock.c               |    6 +-
 arch/arm/cpu/arm926ejs/at91/cpu.c                 |    8 ++--
 arch/arm/cpu/arm926ejs/at91/eflash.c              |   14 +++---
 arch/arm/cpu/arm926ejs/at91/reset.c               |    2 +-
 arch/arm/cpu/arm926ejs/at91/timer.c               |    8 ++--
 7 files changed, 33 insertions(+), 51 deletions(-)

diff --git a/arch/arm/cpu/arm926ejs/at91/Makefile b/arch/arm/cpu/arm926ejs/at91/Makefile
index be9f6dd..f333753 100644
--- a/arch/arm/cpu/arm926ejs/at91/Makefile
+++ b/arch/arm/cpu/arm926ejs/at91/Makefile
@@ -28,6 +28,7 @@ LIB	= $(obj)lib$(SOC).o
 COBJS-$(CONFIG_AT91CAP9)	+= at91cap9_devices.o
 COBJS-$(CONFIG_AT91SAM9260)	+= at91sam9260_devices.o
 COBJS-$(CONFIG_AT91SAM9G20)	+= at91sam9260_devices.o
+COBJS-$(CONFIG_AT91SAM9XE)	+= at91sam9260_devices.o
 COBJS-$(CONFIG_AT91SAM9261)	+= at91sam9261_devices.o
 COBJS-$(CONFIG_AT91SAM9G10)	+= at91sam9261_devices.o
 COBJS-$(CONFIG_AT91SAM9263)	+= at91sam9263_devices.o
diff --git a/arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c b/arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c
index c1822b7..54e8ee9 100644
--- a/arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c
+++ b/arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c
@@ -45,70 +45,51 @@
 
 void at91_serial0_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) AT91_PMC_BASE;
+	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
 
 	at91_set_a_periph(AT91_PIO_PORTB, 4, 1);		/* TXD0 */
 	at91_set_a_periph(AT91_PIO_PORTB, 5, PUP);		/* RXD0 */
-	writel(1 << AT91SAM9260_ID_US0, &pmc->pcer);
+	writel(1 << ATMEL_ID_USART0, &pmc->pcer);
 }
 
 void at91_serial1_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) AT91_PMC_BASE;
+	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
 
 	at91_set_a_periph(AT91_PIO_PORTB, 6, 1);		/* TXD1 */
 	at91_set_a_periph(AT91_PIO_PORTB, 7, PUP);		/* RXD1 */
-	writel(1 << AT91SAM9260_ID_US1, &pmc->pcer);
+	writel(1 << ATMEL_ID_USART1, &pmc->pcer);
 }
 
 void at91_serial2_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) AT91_PMC_BASE;
+	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
 
 	at91_set_a_periph(AT91_PIO_PORTB, 8, 1);		/* TXD2 */
 	at91_set_a_periph(AT91_PIO_PORTB, 9, PUP);		/* RXD2 */
-	writel(1 << AT91SAM9260_ID_US2, &pmc->pcer);
+	writel(1 << ATMEL_ID_USART2, &pmc->pcer);
 }
 
-void at91_serial3_hw_init(void)
+void at91_seriald_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) AT91_PMC_BASE;
+	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
 
 	at91_set_a_periph(AT91_PIO_PORTB, 14, PUP);		/* DRXD */
 	at91_set_a_periph(AT91_PIO_PORTB, 15, 1);		/* DTXD */
-	writel(1 << AT91_ID_SYS, &pmc->pcer);
-}
-
-void at91_serial_hw_init(void)
-{
-#ifdef CONFIG_USART0
-	at91_serial0_hw_init();
-#endif
-
-#ifdef CONFIG_USART1
-	at91_serial1_hw_init();
-#endif
-
-#ifdef CONFIG_USART2
-	at91_serial2_hw_init();
-#endif
-
-#ifdef CONFIG_USART3	/* DBGU */
-	at91_serial3_hw_init();
-#endif
+	writel(1 << ATMEL_ID_SYS, &pmc->pcer);
 }
 
 #if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
 void at91_spi0_hw_init(unsigned long cs_mask)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) AT91_PMC_BASE;
+	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
 
 	at91_set_a_periph(AT91_PIO_PORTA, 0, PUP);	/* SPI0_MISO */
 	at91_set_a_periph(AT91_PIO_PORTA, 1, PUP);	/* SPI0_MOSI */
 	at91_set_a_periph(AT91_PIO_PORTA, 2, PUP);	/* SPI0_SPCK */
 
 	/* Enable clock */
-	writel(1 << AT91SAM9260_ID_SPI0, &pmc->pcer);
+	writel(1 << ATMEL_ID_SPI0, &pmc->pcer);
 
 	if (cs_mask & (1 << 0)) {
 		at91_set_a_periph(AT91_PIO_PORTA, 3, 1);
@@ -138,14 +119,14 @@ void at91_spi0_hw_init(unsigned long cs_mask)
 
 void at91_spi1_hw_init(unsigned long cs_mask)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) AT91_PMC_BASE;
+	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
 
 	at91_set_a_periph(AT91_PIO_PORTB, 0, PUP);	/* SPI1_MISO */
 	at91_set_a_periph(AT91_PIO_PORTB, 1, PUP);	/* SPI1_MOSI */
 	at91_set_a_periph(AT91_PIO_PORTB, 2, PUP);	/* SPI1_SPCK */
 
 	/* Enable clock */
-	writel(1 << AT91SAM9260_ID_SPI1, &pmc->pcer);
+	writel(1 << ATMEL_ID_SPI1, &pmc->pcer);
 
 	if (cs_mask & (1 << 0)) {
 		at91_set_a_periph(AT91_PIO_PORTB, 3, 1);
diff --git a/arch/arm/cpu/arm926ejs/at91/clock.c b/arch/arm/cpu/arm926ejs/at91/clock.c
index 7a10a77..06c63e5 100644
--- a/arch/arm/cpu/arm926ejs/at91/clock.c
+++ b/arch/arm/cpu/arm926ejs/at91/clock.c
@@ -57,7 +57,7 @@ static unsigned long at91_css_to_rate(unsigned long css)
 {
 	switch (css) {
 	case AT91_PMC_MCKR_CSS_SLOW:
-		return AT91_SLOW_CLOCK;
+		return CONFIG_SYS_AT91_SLOW_CLOCK;
 	case AT91_PMC_MCKR_CSS_MAIN:
 		return gd->main_clk_rate_hz;
 	case AT91_PMC_MCKR_CSS_PLLA:
@@ -145,7 +145,7 @@ static u32 at91_pll_rate(u32 freq, u32 reg)
 int at91_clock_init(unsigned long main_clock)
 {
 	unsigned freq, mckr;
-	at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
+	at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
 #ifndef CONFIG_SYS_AT91_MAIN_CLOCK
 	unsigned tmp;
 	/*
@@ -159,7 +159,7 @@ int at91_clock_init(unsigned long main_clock)
 			tmp = readl(&pmc->mcfr);
 		} while (!(tmp & AT91_PMC_MCFR_MAINRDY));
 		tmp &= AT91_PMC_MCFR_MAINF_MASK;
-		main_clock = tmp * (AT91_SLOW_CLOCK / 16);
+		main_clock = tmp * (CONFIG_SYS_AT91_SLOW_CLOCK / 16);
 	}
 #endif
 	gd->main_clk_rate_hz = main_clock;
diff --git a/arch/arm/cpu/arm926ejs/at91/cpu.c b/arch/arm/cpu/arm926ejs/at91/cpu.c
index 5e30f1d..4c8664d 100644
--- a/arch/arm/cpu/arm926ejs/at91/cpu.c
+++ b/arch/arm/cpu/arm926ejs/at91/cpu.c
@@ -44,7 +44,7 @@ int arch_cpu_init(void)
 void arch_preboot_os(void)
 {
 	ulong cpiv;
-	at91_pit_t *pit = (at91_pit_t *) AT91_PIT_BASE;
+	at91_pit_t *pit = (at91_pit_t *) ATMEL_BASE_PIT;
 
 	cpiv = AT91_PIT_MR_PIV_MASK(readl(&pit->piir));
 
@@ -61,7 +61,7 @@ int print_cpuinfo(void)
 {
 	char buf[32];
 
-	printf("CPU: %s\n", CONFIG_SYS_AT91_CPU_NAME);
+	printf("CPU: %s\n", ATMEL_CPU_NAME);
 	printf("Crystal frequency: %8s MHz\n",
 					strmhz(buf, get_main_clk_rate()));
 	printf("CPU clock        : %8s MHz\n",
@@ -80,7 +80,7 @@ int print_cpuinfo(void)
  */
 void bootcount_store (ulong a)
 {
-	at91_gpbr_t *gpbr = (at91_gpbr_t *) AT91_GPR_BASE;
+	at91_gpbr_t *gpbr = (at91_gpbr_t *) ATMEL_BASE_GPBR;
 
 	writel((BOOTCOUNT_MAGIC & 0xffff0000) | (a & 0x0000ffff),
 		&gpbr->reg[AT91_GPBR_INDEX_BOOTCOUNT]);
@@ -88,7 +88,7 @@ void bootcount_store (ulong a)
 
 ulong bootcount_load (void)
 {
-	at91_gpbr_t *gpbr = (at91_gpbr_t *) AT91_GPR_BASE;
+	at91_gpbr_t *gpbr = (at91_gpbr_t *) ATMEL_BASE_GPBR;
 
 	ulong val = readl(&gpbr->reg[AT91_GPBR_INDEX_BOOTCOUNT]);
 	if ((val & 0xffff0000) != (BOOTCOUNT_MAGIC & 0xffff0000))
diff --git a/arch/arm/cpu/arm926ejs/at91/eflash.c b/arch/arm/cpu/arm926ejs/at91/eflash.c
index 938c3b1..a6e0501 100644
--- a/arch/arm/cpu/arm926ejs/at91/eflash.c
+++ b/arch/arm/cpu/arm926ejs/at91/eflash.c
@@ -77,8 +77,8 @@ static u32 pagesize;
 
 unsigned long flash_init (void)
 {
-	at91_eefc_t *eefc = (at91_eefc_t *) 0xfffffa00;
-	at91_dbu_t *dbu = (at91_dbu_t *) 0xfffff200;
+	at91_eefc_t *eefc = (at91_eefc_t *) ATMEL_BASE_EEFC;
+	at91_dbu_t *dbu = (at91_dbu_t *) ATMEL_BASE_DBGU;
 	u32 id, size, nplanes, planesize, nlocks;
 	u32 addr, i, tmp=0;
 
@@ -119,7 +119,7 @@ unsigned long flash_init (void)
 	flash_info[0].sector_count = nlocks;
 	flash_info[0].flash_id = id;
 
-	addr = AT91SAM9XE_FLASH_BASE;
+	addr = ATMEL_BASE_FLASH;
 	for (i=0; i<nlocks; i++) {
 		tmp = readl(&eefc->frr);	/* words 4+nplanes+1.. */
 		flash_info[0].start[i] = addr;
@@ -167,8 +167,8 @@ void flash_print_info (flash_info_t *info)
 
 int flash_real_protect (flash_info_t *info, long sector, int prot)
 {
-	at91_eefc_t *eefc = (at91_eefc_t *) 0xfffffa00;
-	u32 pagenum = (info->start[sector]-AT91SAM9XE_FLASH_BASE)/pagesize;
+	at91_eefc_t *eefc = (at91_eefc_t *) ATMEL_BASE_EEFC;
+	u32 pagenum = (info->start[sector]-ATMEL_BASE_FLASH)/pagesize;
 	u32 i, tmp=0;
 
 	debug("protect sector=%ld prot=%d\n", sector, prot);
@@ -205,7 +205,7 @@ int flash_real_protect (flash_info_t *info, long sector, int prot)
 
 static u32 erase_write_page (u32 pagenum)
 {
-	at91_eefc_t *eefc = (at91_eefc_t *) 0xfffffa00;
+	at91_eefc_t *eefc = (at91_eefc_t *) ATMEL_BASE_EEFC;
 
 	debug("erase+write page=%u\n", pagenum);
 
@@ -249,7 +249,7 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
 	}
 
 	/* now start copying data */
-	pagenum = (addr-AT91SAM9XE_FLASH_BASE)/pagesize;
+	pagenum = (addr-ATMEL_BASE_FLASH)/pagesize;
 	src32 = (u32 *) src;
 	dst32 = (u32 *) addr;
 	while (cnt > 0) {
diff --git a/arch/arm/cpu/arm926ejs/at91/reset.c b/arch/arm/cpu/arm926ejs/at91/reset.c
index d2569d8..1f918b0 100644
--- a/arch/arm/cpu/arm926ejs/at91/reset.c
+++ b/arch/arm/cpu/arm926ejs/at91/reset.c
@@ -30,7 +30,7 @@
 /* Reset the cpu by telling the reset controller to do so */
 void reset_cpu(ulong ignored)
 {
-	at91_rstc_t *rstc = (at91_rstc_t *) AT91_RSTC_BASE;
+	at91_rstc_t *rstc = (at91_rstc_t *) ATMEL_BASE_RSTC;
 
 	writel(AT91_RSTC_KEY
 		| AT91_RSTC_CR_PROCRST	/* Processor Reset */
diff --git a/arch/arm/cpu/arm926ejs/at91/timer.c b/arch/arm/cpu/arm926ejs/at91/timer.c
index 82b8d7e..2634418 100644
--- a/arch/arm/cpu/arm926ejs/at91/timer.c
+++ b/arch/arm/cpu/arm926ejs/at91/timer.c
@@ -70,11 +70,11 @@ static inline unsigned long long usec_to_tick(unsigned long long usec)
  */
 int timer_init(void)
 {
-	at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
-	at91_pit_t *pit = (at91_pit_t *) AT91_PIT_BASE;
+	at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
+	at91_pit_t *pit = (at91_pit_t *) ATMEL_BASE_PIT;
 
 	/* Enable PITC Clock */
-	writel(1 << AT91_ID_SYS, &pmc->pcer);
+	writel(1 << ATMEL_ID_SYS, &pmc->pcer);
 
 	/* Enable PITC */
 	writel(TIMER_LOAD_VAL | AT91_PIT_MR_EN , &pit->mr);
@@ -90,7 +90,7 @@ int timer_init(void)
  */
 unsigned long long get_ticks(void)
 {
-	at91_pit_t *pit = (at91_pit_t *) AT91_PIT_BASE;
+	at91_pit_t *pit = (at91_pit_t *) ATMEL_BASE_PIT;
 
 	ulong now = readl(&pit->piir);
 
-- 
1.5.6.5

[U-Boot] [PATCH 08/15] AT91: fix related at91 driver files

[Reinhard Meyer]

Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
---
 drivers/gpio/at91_gpio.c        |   52 +++++++++++++++++++++++---------------
 drivers/rtc/at91sam9_rtt.c      |   12 ++++----
 drivers/usb/host/ohci-at91.c    |   16 ++++++------
 drivers/watchdog/at91sam9_wdt.c |    4 +-
 4 files changed, 47 insertions(+), 37 deletions(-)

diff --git a/drivers/gpio/at91_gpio.c b/drivers/gpio/at91_gpio.c
index c0a97bc..1631687 100644
--- a/drivers/gpio/at91_gpio.c
+++ b/drivers/gpio/at91_gpio.c
@@ -24,6 +24,16 @@
  * MA 02111-1307 USA
  */
 
+/*
+ * WARNING:
+ *
+ * As the code is right now, it expects all PIO ports A,B,C,...
+ * to be evenly spaced in the memory map:
+ * ATMEL_BASE_PIOA + port * sizeof at91pio_t
+ * This might not necessaryly be true in future Atmel SoCs.
+ * This code should be fixed to use a pointer array to the ports.
+ */
+
 #include <config.h>
 #include <common.h>
 #include <asm/sizes.h>
@@ -33,10 +43,10 @@
 
 int at91_set_pio_pullup(unsigned port, unsigned pin, int use_pullup)
 {
-	at91_pio_t	*pio 	= (at91_pio_t *) AT91_PIO_BASE;
+	at91_pio_t	*pio = (at91_pio_t *) ATMEL_BASE_PIOA;
 	u32		mask;
 
-	if ((port < AT91_PIO_PORTS) && (pin < 32)) {
+	if ((port < ATMEL_PIO_PORTS) && (pin < 32)) {
 		mask = 1 << pin;
 		if (use_pullup)
 			writel(1 << pin, &pio->port[port].puer);
@@ -52,10 +62,10 @@ int at91_set_pio_pullup(unsigned port, unsigned pin, int use_pullup)
  */
 int at91_set_pio_periph(unsigned port, unsigned pin, int use_pullup)
 {
-	at91_pio_t	*pio 	= (at91_pio_t *) AT91_PIO_BASE;
+	at91_pio_t	*pio = (at91_pio_t *) ATMEL_BASE_PIOA;
 	u32		mask;
 
-	if ((port < AT91_PIO_PORTS) && (pin < 32)) {
+	if ((port < ATMEL_PIO_PORTS) && (pin < 32)) {
 		mask = 1 << pin;
 		writel(mask, &pio->port[port].idr);
 		at91_set_pio_pullup(port, pin, use_pullup);
@@ -69,10 +79,10 @@ int at91_set_pio_periph(unsigned port, unsigned pin, int use_pullup)
  */
 int at91_set_a_periph(unsigned port, unsigned pin, int use_pullup)
 {
-	at91_pio_t	*pio 	= (at91_pio_t *) AT91_PIO_BASE;
+	at91_pio_t	*pio = (at91_pio_t *) ATMEL_BASE_PIOA;
 	u32		mask;
 
-	if ((port < AT91_PIO_PORTS) && (pin < 32)) {
+	if ((port < ATMEL_PIO_PORTS) && (pin < 32)) {
 		mask = 1 << pin;
 		writel(mask, &pio->port[port].idr);
 		at91_set_pio_pullup(port, pin, use_pullup);
@@ -87,10 +97,10 @@ int at91_set_a_periph(unsigned port, unsigned pin, int use_pullup)
  */
 int at91_set_b_periph(unsigned port, unsigned pin, int use_pullup)
 {
-	at91_pio_t	*pio 	= (at91_pio_t *) AT91_PIO_BASE;
+	at91_pio_t	*pio = (at91_pio_t *) ATMEL_BASE_PIOA;
 	u32		mask;
 
-	if ((port < AT91_PIO_PORTS) && (pin < 32)) {
+	if ((port < ATMEL_PIO_PORTS) && (pin < 32)) {
 		mask = 1 << pin;
 		writel(mask, &pio->port[port].idr);
 		at91_set_pio_pullup(port, pin, use_pullup);
@@ -106,10 +116,10 @@ int at91_set_b_periph(unsigned port, unsigned pin, int use_pullup)
  */
 int at91_set_pio_input(unsigned port, u32 pin, int use_pullup)
 {
-	at91_pio_t	*pio 	= (at91_pio_t *) AT91_PIO_BASE;
+	at91_pio_t	*pio = (at91_pio_t *) ATMEL_BASE_PIOA;
 	u32		mask;
 
-	if ((port < AT91_PIO_PORTS) && (pin < 32)) {
+	if ((port < ATMEL_PIO_PORTS) && (pin < 32)) {
 		mask = 1 << pin;
 		writel(mask, &pio->port[port].idr);
 		at91_set_pio_pullup(port, pin, use_pullup);
@@ -125,10 +135,10 @@ int at91_set_pio_input(unsigned port, u32 pin, int use_pullup)
  */
 int at91_set_pio_output(unsigned port, u32 pin, int value)
 {
-	at91_pio_t	*pio 	= (at91_pio_t *) AT91_PIO_BASE;
+	at91_pio_t	*pio = (at91_pio_t *) ATMEL_BASE_PIOA;
 	u32		mask;
 
-	if ((port < AT91_PIO_PORTS) && (pin < 32)) {
+	if ((port < ATMEL_PIO_PORTS) && (pin < 32)) {
 		mask = 1 << pin;
 		writel(mask, &pio->port[port].idr);
 		writel(mask, &pio->port[port].pudr);
@@ -147,10 +157,10 @@ int at91_set_pio_output(unsigned port, u32 pin, int value)
  */
 int at91_set_pio_deglitch(unsigned port, unsigned pin, int is_on)
 {
-	at91_pio_t	*pio 	= (at91_pio_t *) AT91_PIO_BASE;
+	at91_pio_t	*pio = (at91_pio_t *) ATMEL_BASE_PIOA;
 	u32		mask;
 
-	if ((port < AT91_PIO_PORTS) && (pin < 32)) {
+	if ((port < ATMEL_PIO_PORTS) && (pin < 32)) {
 		mask = 1 << pin;
 		if (is_on)
 			writel(mask, &pio->port[port].ifer);
@@ -166,10 +176,10 @@ int at91_set_pio_deglitch(unsigned port, unsigned pin, int is_on)
  */
 int at91_set_pio_multi_drive(unsigned port, unsigned pin, int is_on)
 {
-	at91_pio_t	*pio 	= (at91_pio_t *) AT91_PIO_BASE;
+	at91_pio_t	*pio = (at91_pio_t *) ATMEL_BASE_PIOA;
 	u32		mask;
 
-	if ((port < AT91_PIO_PORTS) && (pin < 32)) {
+	if ((port < ATMEL_PIO_PORTS) && (pin < 32)) {
 		mask = 1 << pin;
 		if (is_on)
 			writel(mask, &pio->port[port].mder);
@@ -184,10 +194,10 @@ int at91_set_pio_multi_drive(unsigned port, unsigned pin, int is_on)
  */
 int at91_set_pio_value(unsigned port, unsigned pin, int value)
 {
-	at91_pio_t	*pio 	= (at91_pio_t *) AT91_PIO_BASE;
+	at91_pio_t	*pio = (at91_pio_t *) ATMEL_BASE_PIOA;
 	u32		mask;
 
-	if ((port < AT91_PIO_PORTS) && (pin < 32)) {
+	if ((port < ATMEL_PIO_PORTS) && (pin < 32)) {
 		mask = 1 << pin;
 		if (value)
 			writel(mask, &pio->port[port].sodr);
@@ -202,11 +212,11 @@ int at91_set_pio_value(unsigned port, unsigned pin, int value)
  */
 int at91_get_pio_value(unsigned port, unsigned pin)
 {
-	u32		pdsr	= 0;
-	at91_pio_t	*pio 	= (at91_pio_t *) AT91_PIO_BASE;
+	u32		pdsr = 0;
+	at91_pio_t	*pio = (at91_pio_t *) ATMEL_BASE_PIOA;
 	u32		mask;
 
-	if ((port < AT91_PIO_PORTS) && (pin < 32)) {
+	if ((port < ATMEL_PIO_PORTS) && (pin < 32)) {
 		mask = 1 << pin;
 		pdsr = readl(&pio->port[port].pdsr) & mask;
 	}
diff --git a/drivers/rtc/at91sam9_rtt.c b/drivers/rtc/at91sam9_rtt.c
index de8e30d..ed44016 100644
--- a/drivers/rtc/at91sam9_rtt.c
+++ b/drivers/rtc/at91sam9_rtt.c
@@ -48,8 +48,8 @@
 
 int rtc_get (struct rtc_time *tmp)
 {
-	at91_rtt_t *rtt = (at91_rtt_t *) AT91_RTT_BASE;
-	at91_gpbr_t *gpbr = (at91_gpbr_t *) AT91_GPR_BASE;
+	at91_rtt_t *rtt = (at91_rtt_t *) ATMEL_BASE_RTT;
+	at91_gpbr_t *gpbr = (at91_gpbr_t *) ATMEL_BASE_GPBR;
 	ulong tim;
 	ulong tim2;
 	ulong off;
@@ -66,8 +66,8 @@ int rtc_get (struct rtc_time *tmp)
 
 int rtc_set (struct rtc_time *tmp)
 {
-	at91_rtt_t *rtt = (at91_rtt_t *) AT91_RTT_BASE;
-	at91_gpbr_t *gpbr = (at91_gpbr_t *) AT91_GPR_BASE;
+	at91_rtt_t *rtt = (at91_rtt_t *) ATMEL_BASE_RTT;
+	at91_gpbr_t *gpbr = (at91_gpbr_t *) ATMEL_BASE_GPBR;
 	ulong tim;
 
 	tim = mktime (tmp->tm_year, tmp->tm_mon, tmp->tm_mday,
@@ -85,8 +85,8 @@ int rtc_set (struct rtc_time *tmp)
 
 void rtc_reset (void)
 {
-	at91_rtt_t *rtt = (at91_rtt_t *) AT91_RTT_BASE;
-	at91_gpbr_t *gpbr = (at91_gpbr_t *) AT91_GPR_BASE;
+	at91_rtt_t *rtt = (at91_rtt_t *) ATMEL_BASE_RTT;
+	at91_gpbr_t *gpbr = (at91_gpbr_t *) ATMEL_BASE_GPBR;
 
 	/* clear alarm, set prescaler to 32768, clear counter */
 	writel(32768+AT91_RTT_RTTRST, &rtt->mr);
diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c
index 64fde68..6166899 100644
--- a/drivers/usb/host/ohci-at91.c
+++ b/drivers/usb/host/ohci-at91.c
@@ -32,7 +32,7 @@
 
 int usb_cpu_init(void)
 {
-	at91_pmc_t *pmc	= (at91_pmc_t *)AT91_PMC_BASE;
+	at91_pmc_t *pmc	= (at91_pmc_t *)ATMEL_BASE_PMC;
 
 #if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
     defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) || \
@@ -53,11 +53,11 @@ int usb_cpu_init(void)
 #endif
 
 	/* Enable USB host clock. */
-	writel(1 << AT91_ID_UHP, &pmc->pcer);
+	writel(1 << ATMEL_ID_UHP, &pmc->pcer);
 #ifdef CONFIG_AT91SAM9261
-	writel(AT91_PMC_UHP | AT91_PMC_HCK0, &pmc->scer);
+	writel(ATMEL_PMC_UHP | AT91_PMC_HCK0, &pmc->scer);
 #else
-	writel(AT91_PMC_UHP, &pmc->scer);
+	writel(ATMEL_PMC_UHP, &pmc->scer);
 #endif
 
 	return 0;
@@ -65,14 +65,14 @@ int usb_cpu_init(void)
 
 int usb_cpu_stop(void)
 {
-	at91_pmc_t *pmc	= (at91_pmc_t *)AT91_PMC_BASE;
+	at91_pmc_t *pmc	= (at91_pmc_t *)ATMEL_BASE_PMC;
 
 	/* Disable USB host clock. */
-	writel(1 << AT91_ID_UHP, &pmc->pcdr);
+	writel(1 << ATMEL_ID_UHP, &pmc->pcdr);
 #ifdef CONFIG_AT91SAM9261
-	writel(AT91_PMC_UHP | AT91_PMC_HCK0, &pmc->scdr);
+	writel(ATMEL_PMC_UHP | AT91_PMC_HCK0, &pmc->scdr);
 #else
-	writel(AT91_PMC_UHP, &pmc->scdr);
+	writel(ATMEL_PMC_UHP, &pmc->scdr);
 #endif
 
 #if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
diff --git a/drivers/watchdog/at91sam9_wdt.c b/drivers/watchdog/at91sam9_wdt.c
index 25afae7..6254765 100644
--- a/drivers/watchdog/at91sam9_wdt.c
+++ b/drivers/watchdog/at91sam9_wdt.c
@@ -42,7 +42,7 @@
 static int at91_wdt_settimeout(unsigned int timeout)
 {
 	unsigned int reg;
-	at91_wdt_t *wd 	= (at91_wdt_t *) AT91_WDT_BASE;
+	at91_wdt_t *wd = (at91_wdt_t *) ATMEL_BASE_WDT;
 
 	/* Check if disabled */
 	if (readl(&wd->mr) & AT91_WDT_MR_WDDIS) {
@@ -69,7 +69,7 @@ static int at91_wdt_settimeout(unsigned int timeout)
 
 void hw_watchdog_reset(void)
 {
-	at91_wdt_t *wd 	= (at91_wdt_t *) AT91_WDT_BASE;
+	at91_wdt_t *wd = (at91_wdt_t *) ATMEL_BASE_WDT;
 	writel(AT91_WDT_CR_WDRSTT | AT91_WDT_CR_KEY, &wd->cr);
 }
 
-- 
1.5.6.5

[U-Boot] [PATCH 09/15] ATMEL: fix related common atmel driver files

[Reinhard Meyer]

Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
---
 drivers/mmc/gen_atmel_mci.c  |    2 +-
 drivers/net/macb.c           |   14 ++++++++------
 drivers/serial/atmel_usart.c |   28 +++++++---------------------
 drivers/spi/atmel_spi.c      |   16 ++++++++--------
 4 files changed, 24 insertions(+), 36 deletions(-)

diff --git a/drivers/mmc/gen_atmel_mci.c b/drivers/mmc/gen_atmel_mci.c
index 2984d64..c28c469 100644
--- a/drivers/mmc/gen_atmel_mci.c
+++ b/drivers/mmc/gen_atmel_mci.c
@@ -33,7 +33,7 @@
 #include <asm/errno.h>
 #include <asm/byteorder.h>
 #include <asm/arch/clk.h>
-#include <asm/arch/memory-map.h>
+#include <asm/arch/hardware.h>
 #include "atmel_mci.h"
 
 #ifndef CONFIG_SYS_MMC_CLK_OD
diff --git a/drivers/net/macb.c b/drivers/net/macb.c
index acb8d20..72ea1fc 100644
--- a/drivers/net/macb.c
+++ b/drivers/net/macb.c
@@ -469,17 +469,19 @@ static int macb_init(struct eth_device *netdev, bd_t *bd)
 
 	/* choose RMII or MII mode. This depends on the board */
 #ifdef CONFIG_RMII
-#if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
-    defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) || \
-	defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
+#if	defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
+	defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) || \
+	defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) || \
+	defined(CONFIG_AT91SAM9XE)
 	macb_writel(macb, USRIO, MACB_BIT(RMII) | MACB_BIT(CLKEN));
 #else
 	macb_writel(macb, USRIO, 0);
 #endif
 #else
-#if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
-    defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) || \
-	defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
+#if	defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
+	defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) || \
+	defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) || \
+	defined(CONFIG_AT91SAM9XE)
 	macb_writel(macb, USRIO, MACB_BIT(CLKEN));
 #else
 	macb_writel(macb, USRIO, MACB_BIT(MII));
diff --git a/drivers/serial/atmel_usart.c b/drivers/serial/atmel_usart.c
index bfa1f3a..e326b2b 100644
--- a/drivers/serial/atmel_usart.c
+++ b/drivers/serial/atmel_usart.c
@@ -23,21 +23,7 @@
 
 #include <asm/io.h>
 #include <asm/arch/clk.h>
-#include <asm/arch/memory-map.h>
-
-#if defined(CONFIG_USART0)
-# define USART_ID	0
-# define USART_BASE	USART0_BASE
-#elif defined(CONFIG_USART1)
-# define USART_ID	1
-# define USART_BASE	USART1_BASE
-#elif defined(CONFIG_USART2)
-# define USART_ID	2
-# define USART_BASE	USART2_BASE
-#elif defined(CONFIG_USART3)
-# define USART_ID	3
-# define USART_BASE	USART3_BASE
-#endif
+#include <asm/arch/hardware.h>
 
 #include "atmel_usart.h"
 
@@ -45,7 +31,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 void serial_setbrg(void)
 {
-	atmel_usart3_t *usart = (atmel_usart3_t*)USART_BASE;
+	atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
 	unsigned long divisor;
 	unsigned long usart_hz;
 
@@ -54,14 +40,14 @@ void serial_setbrg(void)
 	 * Baud Rate = --------------
 	 *                16 * CD
 	 */
-	usart_hz = get_usart_clk_rate(USART_ID);
+	usart_hz = get_usart_clk_rate(CONFIG_USART_ID);
 	divisor = (usart_hz / 16 + gd->baudrate / 2) / gd->baudrate;
 	writel(USART3_BF(CD, divisor), &usart->brgr);
 }
 
 int serial_init(void)
 {
-	atmel_usart3_t *usart = (atmel_usart3_t*)USART_BASE;
+	atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
 
 	writel(USART3_BIT(RSTRX) | USART3_BIT(RSTTX), &usart->cr);
 
@@ -80,7 +66,7 @@ int serial_init(void)
 
 void serial_putc(char c)
 {
-	atmel_usart3_t *usart = (atmel_usart3_t*)USART_BASE;
+	atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
 
 	if (c == '\n')
 		serial_putc('\r');
@@ -97,7 +83,7 @@ void serial_puts(const char *s)
 
 int serial_getc(void)
 {
-	atmel_usart3_t *usart = (atmel_usart3_t*)USART_BASE;
+	atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
 
 	while (!(readl(&usart->csr) & USART3_BIT(RXRDY)))
 		 WATCHDOG_RESET();
@@ -106,6 +92,6 @@ int serial_getc(void)
 
 int serial_tstc(void)
 {
-	atmel_usart3_t *usart = (atmel_usart3_t*)USART_BASE;
+	atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
 	return (readl(&usart->csr) & USART3_BIT(RXRDY)) != 0;
 }
diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c
index d0de931..33e38b6 100644
--- a/drivers/spi/atmel_spi.c
+++ b/drivers/spi/atmel_spi.c
@@ -26,7 +26,7 @@
 #include <asm/io.h>
 
 #include <asm/arch/clk.h>
-#include <asm/arch/memory-map.h>
+#include <asm/arch/hardware.h>
 
 #include "atmel_spi.h"
 
@@ -48,21 +48,21 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
 
 	switch (bus) {
 	case 0:
-		regs = (void *)SPI0_BASE;
+		regs = (void *)ATMEL_BASE_SPI0;
 		break;
-#ifdef SPI1_BASE
+#ifdef ATMEL_BASE_SPI1
 	case 1:
-		regs = (void *)SPI1_BASE;
+		regs = (void *)ATMEL_BASE_SPI1;
 		break;
 #endif
-#ifdef SPI2_BASE
+#ifdef ATMEL_BASE_SPI2
 	case 2:
-		regs = (void *)SPI2_BASE;
+		regs = (void *)ATMEL_BASE_SPI2;
 		break;
 #endif
-#ifdef SPI3_BASE
+#ifdef ATMEL_BASE_SPI3
 	case 3:
-		regs = (void *)SPI3_BASE;
+		regs = (void *)ATMEL_BASE_SPI3;
 		break;
 #endif
 	default:
-- 
1.5.6.5

[U-Boot] [PATCH 10/15] AT91: cleanup at91sam9260_matrix.h to struct SoC access

[Reinhard Meyer]

Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
---
 .../arm/include/asm/arch-at91/at91sam9260_matrix.h |  102 +++++++++-----------
 1 files changed, 45 insertions(+), 57 deletions(-)

diff --git a/arch/arm/include/asm/arch-at91/at91sam9260_matrix.h b/arch/arm/include/asm/arch-at91/at91sam9260_matrix.h
index f8b023d..be28ad1 100644
--- a/arch/arm/include/asm/arch-at91/at91sam9260_matrix.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9260_matrix.h
@@ -15,66 +15,54 @@
 #ifndef AT91SAM9260_MATRIX_H
 #define AT91SAM9260_MATRIX_H
 
-#define AT91_MATRIX_MCFG0	(AT91_MATRIX + 0x00)	/* Master Configuration Register 0 */
-#define AT91_MATRIX_MCFG1	(AT91_MATRIX + 0x04)	/* Master Configuration Register 1 */
-#define AT91_MATRIX_MCFG2	(AT91_MATRIX + 0x08)	/* Master Configuration Register 2 */
-#define AT91_MATRIX_MCFG3	(AT91_MATRIX + 0x0C)	/* Master Configuration Register 3 */
-#define AT91_MATRIX_MCFG4	(AT91_MATRIX + 0x10)	/* Master Configuration Register 4 */
-#define AT91_MATRIX_MCFG5	(AT91_MATRIX + 0x14)	/* Master Configuration Register 5 */
-#define		AT91_MATRIX_ULBT		(7 << 0)	/* Undefined Length Burst Type */
-#define			AT91_MATRIX_ULBT_INFINITE	(0 << 0)
-#define			AT91_MATRIX_ULBT_SINGLE		(1 << 0)
-#define			AT91_MATRIX_ULBT_FOUR		(2 << 0)
-#define			AT91_MATRIX_ULBT_EIGHT		(3 << 0)
-#define			AT91_MATRIX_ULBT_SIXTEEN	(4 << 0)
+#ifndef __ASSEMBLY__
 
-#define AT91_MATRIX_SCFG0	(AT91_MATRIX + 0x40)	/* Slave Configuration Register 0 */
-#define AT91_MATRIX_SCFG1	(AT91_MATRIX + 0x44)	/* Slave Configuration Register 1 */
-#define AT91_MATRIX_SCFG2	(AT91_MATRIX + 0x48)	/* Slave Configuration Register 2 */
-#define AT91_MATRIX_SCFG3	(AT91_MATRIX + 0x4C)	/* Slave Configuration Register 3 */
-#define AT91_MATRIX_SCFG4	(AT91_MATRIX + 0x50)	/* Slave Configuration Register 4 */
-#define		AT91_MATRIX_SLOT_CYCLE		(0xff <<  0)	/* Maximum Number of Allowed Cycles for a Burst */
-#define		AT91_MATRIX_DEFMSTR_TYPE	(3    << 16)	/* Default Master Type */
-#define			AT91_MATRIX_DEFMSTR_TYPE_NONE	(0 << 16)
-#define			AT91_MATRIX_DEFMSTR_TYPE_LAST	(1 << 16)
-#define			AT91_MATRIX_DEFMSTR_TYPE_FIXED	(2 << 16)
-#define		AT91_MATRIX_FIXED_DEFMSTR	(7    << 18)	/* Fixed Index of Default Master */
-#define		AT91_MATRIX_ARBT		(3    << 24)	/* Arbitration Type */
-#define			AT91_MATRIX_ARBT_ROUND_ROBIN	(0 << 24)
-#define			AT91_MATRIX_ARBT_FIXED_PRIORITY	(1 << 24)
+/*
+ * This struct defines access to the matrix' maximum of
+ * 16 masters and 16 slaves.
+ * However, on the AT91SAM9260/9G20/9XE there exist only
+ * 6 Masters and 5 Slaves!
+ */
+struct at91_matrix {
+	u32	mcfg[16];	/* Master Configuration Registers */
+	u32	scfg[16];	/* Slave Configuration Registers */
+	u32	pras[16][2];	/* Priority Assignment Slave Registers */
+	u32	mrcr;		/* Master Remap Control Register */
+	u32	filler[0x06];
+	u32	ebicsa;		/* EBI Chip Select Assignment Register */
+};
+
+#endif /* __ASSEMBLY__ */
+
+#define AT91_MATRIX_ULBT_INFINITE	(0 << 0)
+#define AT91_MATRIX_ULBT_SINGLE		(1 << 0)
+#define AT91_MATRIX_ULBT_FOUR		(2 << 0)
+#define AT91_MATRIX_ULBT_EIGHT		(3 << 0)
+#define AT91_MATRIX_ULBT_SIXTEEN	(4 << 0)
+
+#define AT91_MATRIX_DEFMSTR_TYPE_NONE	(0 << 16)
+#define AT91_MATRIX_DEFMSTR_TYPE_LAST	(1 << 16)
+#define AT91_MATRIX_DEFMSTR_TYPE_FIXED	(2 << 16)
+#define AT91_MATRIX_FIXED_DEFMSTR_SHIFT	18
+#define AT91_MATRIX_ARBT_ROUND_ROBIN	(0 << 24)
+#define AT91_MATRIX_ARBT_FIXED_PRIORITY	(1 << 24)
 
-#define AT91_MATRIX_PRAS0	(AT91_MATRIX + 0x80)	/* Priority Register A for Slave 0 */
-#define AT91_MATRIX_PRAS1	(AT91_MATRIX + 0x88)	/* Priority Register A for Slave 1 */
-#define AT91_MATRIX_PRAS2	(AT91_MATRIX + 0x90)	/* Priority Register A for Slave 2 */
-#define AT91_MATRIX_PRAS3	(AT91_MATRIX + 0x98)	/* Priority Register A for Slave 3 */
-#define AT91_MATRIX_PRAS4	(AT91_MATRIX + 0xA0)	/* Priority Register A for Slave 4 */
-#define		AT91_MATRIX_M0PR		(3 << 0)	/* Master 0 Priority */
-#define		AT91_MATRIX_M1PR		(3 << 4)	/* Master 1 Priority */
-#define		AT91_MATRIX_M2PR		(3 << 8)	/* Master 2 Priority */
-#define		AT91_MATRIX_M3PR		(3 << 12)	/* Master 3 Priority */
-#define		AT91_MATRIX_M4PR		(3 << 16)	/* Master 4 Priority */
-#define		AT91_MATRIX_M5PR		(3 << 20)	/* Master 5 Priority */
+#define AT91_MATRIX_M0PR_SHIFT		0
+#define AT91_MATRIX_M1PR_SHIFT		4
+#define AT91_MATRIX_M2PR_SHIFT		8
+#define AT91_MATRIX_M3PR_SHIFT		12
+#define AT91_MATRIX_M4PR_SHIFT		16
+#define AT91_MATRIX_M5PR_SHIFT		20
 
-#define AT91_MATRIX_MRCR	(AT91_MATRIX + 0x100)	/* Master Remap Control Register */
-#define		AT91_MATRIX_RCB0		(1 << 0)	/* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
-#define		AT91_MATRIX_RCB1		(1 << 1)	/* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
+#define AT91_MATRIX_RCB0		(1 << 0)
+#define AT91_MATRIX_RCB1		(1 << 1)
 
-#define AT91_MATRIX_EBICSA	(AT91_MATRIX + 0x11C)	/* EBI Chip Select Assignment Register */
-#define		AT91_MATRIX_CS1A		(1 << 1)	/* Chip Select 1 Assignment */
-#define			AT91_MATRIX_CS1A_SMC		(0 << 1)
-#define			AT91_MATRIX_CS1A_SDRAMC		(1 << 1)
-#define		AT91_MATRIX_CS3A		(1 << 3)	/* Chip Select 3 Assignment */
-#define			AT91_MATRIX_CS3A_SMC		(0 << 3)
-#define			AT91_MATRIX_CS3A_SMC_SMARTMEDIA	(1 << 3)
-#define		AT91_MATRIX_CS4A		(1 << 4)	/* Chip Select 4 Assignment */
-#define			AT91_MATRIX_CS4A_SMC		(0 << 4)
-#define			AT91_MATRIX_CS4A_SMC_CF1	(1 << 4)
-#define		AT91_MATRIX_CS5A		(1 << 5)	/* Chip Select 5 Assignment */
-#define			AT91_MATRIX_CS5A_SMC		(0 << 5)
-#define			AT91_MATRIX_CS5A_SMC_CF2	(1 << 5)
-#define		AT91_MATRIX_DBPUC		(1 << 8)	/* Data Bus Pull-up Configuration */
-#define		AT91_MATRIX_VDDIOMSEL		(1 << 16)	/* Memory voltage selection */
-#define			AT91_MATRIX_VDDIOMSEL_1_8V	(0 << 16)
-#define			AT91_MATRIX_VDDIOMSEL_3_3V	(1 << 16)
+#define AT91_MATRIX_CS1A_SDRAMC		(1 << 1)
+#define AT91_MATRIX_CS3A_SMC_SMARTMEDIA	(1 << 3)
+#define AT91_MATRIX_CS4A_SMC_CF1	(1 << 4)
+#define AT91_MATRIX_CS5A_SMC_CF2	(1 << 5)
+#define AT91_MATRIX_DBPUC		(1 << 8)
+#define AT91_MATRIX_VDDIOMSEL_1_8V	(0 << 16)
+#define AT91_MATRIX_VDDIOMSEL_3_3V	(1 << 16)
 
 #endif
-- 
1.5.6.5

[U-Boot] [PATCH 11/15] AT91: change includes from asm/arch/io.h to asm/io.h

[Reinhard Meyer]

and remove the now unused asm/arch-at91/io.h

Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
---
 arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c |    2 +-
 arch/arm/cpu/arm926ejs/at91/clock.c               |    2 +-
 arch/arm/cpu/arm926ejs/at91/cpu.c                 |    3 +-
 arch/arm/cpu/arm926ejs/at91/eflash.c              |    2 +-
 arch/arm/cpu/arm926ejs/at91/led.c                 |    2 +-
 arch/arm/cpu/arm926ejs/at91/reset.c               |    2 +-
 arch/arm/cpu/arm926ejs/at91/timer.c               |    2 +-
 arch/arm/include/asm/arch-at91/io.h               |   43 ---------------------
 drivers/gpio/at91_gpio.c                          |    2 +-
 drivers/rtc/at91sam9_rtt.c                        |    2 +-
 drivers/usb/host/ohci-at91.c                      |    2 +-
 11 files changed, 10 insertions(+), 54 deletions(-)
 delete mode 100644 arch/arm/include/asm/arch-at91/io.h

diff --git a/arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c b/arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c
index 54e8ee9..6bdc75c 100644
--- a/arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c
+++ b/arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c
@@ -23,10 +23,10 @@
  */
 
 #include <common.h>
+#include <asm/io.h>
 #include <asm/arch/at91_common.h>
 #include <asm/arch/at91_pmc.h>
 #include <asm/arch/gpio.h>
-#include <asm/arch/io.h>
 
 /*
  * if CONFIG_AT91_GPIO_PULLUP ist set, keep pullups on on all
diff --git a/arch/arm/cpu/arm926ejs/at91/clock.c b/arch/arm/cpu/arm926ejs/at91/clock.c
index 06c63e5..608af2c 100644
--- a/arch/arm/cpu/arm926ejs/at91/clock.c
+++ b/arch/arm/cpu/arm926ejs/at91/clock.c
@@ -12,8 +12,8 @@
  */
 
 #include <common.h>
+#include <asm/io.h>
 #include <asm/arch/hardware.h>
-#include <asm/arch/io.h>
 #include <asm/arch/at91_pmc.h>
 #include <asm/arch/clk.h>
 
diff --git a/arch/arm/cpu/arm926ejs/at91/cpu.c b/arch/arm/cpu/arm926ejs/at91/cpu.c
index 4c8664d..c47fb31 100644
--- a/arch/arm/cpu/arm926ejs/at91/cpu.c
+++ b/arch/arm/cpu/arm926ejs/at91/cpu.c
@@ -24,13 +24,12 @@
  */
 
 #include <common.h>
-
+#include <asm/io.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_pit.h>
 #include <asm/arch/at91_gpbr.h>
 #include <asm/arch/clk.h>
-#include <asm/arch/io.h>
 
 #ifndef CONFIG_SYS_AT91_MAIN_CLOCK
 #define CONFIG_SYS_AT91_MAIN_CLOCK 0
diff --git a/arch/arm/cpu/arm926ejs/at91/eflash.c b/arch/arm/cpu/arm926ejs/at91/eflash.c
index a6e0501..b0c1e1e 100644
--- a/arch/arm/cpu/arm926ejs/at91/eflash.c
+++ b/arch/arm/cpu/arm926ejs/at91/eflash.c
@@ -60,8 +60,8 @@
  * do a read-modify-write for partially programmed pages
  */
 #include <common.h>
+#include <asm/io.h>
 #include <asm/arch/hardware.h>
-#include <asm/arch/io.h>
 #include <asm/arch/at91_common.h>
 #include <asm/arch/at91_eefc.h>
 #include <asm/arch/at91_dbu.h>
diff --git a/arch/arm/cpu/arm926ejs/at91/led.c b/arch/arm/cpu/arm926ejs/at91/led.c
index 0a315c4..6bcfa7f 100644
--- a/arch/arm/cpu/arm926ejs/at91/led.c
+++ b/arch/arm/cpu/arm926ejs/at91/led.c
@@ -23,10 +23,10 @@
  */
 
 #include <common.h>
+#include <asm/io.h>
 #include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_pio.h>
 #include <asm/arch/gpio.h>
-#include <asm/arch/io.h>
 
 #ifdef CONFIG_RED_LED
 void red_LED_on(void)
diff --git a/arch/arm/cpu/arm926ejs/at91/reset.c b/arch/arm/cpu/arm926ejs/at91/reset.c
index 1f918b0..023719a 100644
--- a/arch/arm/cpu/arm926ejs/at91/reset.c
+++ b/arch/arm/cpu/arm926ejs/at91/reset.c
@@ -23,9 +23,9 @@
  */
 
 #include <common.h>
+#include <asm/io.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/at91_rstc.h>
-#include <asm/arch/io.h>
 
 /* Reset the cpu by telling the reset controller to do so */
 void reset_cpu(ulong ignored)
diff --git a/arch/arm/cpu/arm926ejs/at91/timer.c b/arch/arm/cpu/arm926ejs/at91/timer.c
index 2634418..87a5b63 100644
--- a/arch/arm/cpu/arm926ejs/at91/timer.c
+++ b/arch/arm/cpu/arm926ejs/at91/timer.c
@@ -23,11 +23,11 @@
  */
 
 #include <common.h>
+#include <asm/io.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/at91_pit.h>
 #include <asm/arch/at91_pmc.h>
 #include <asm/arch/clk.h>
-#include <asm/arch/io.h>
 #include <div64.h>
 
 #if !defined(CONFIG_AT91FAMILY)
diff --git a/arch/arm/include/asm/arch-at91/io.h b/arch/arm/include/asm/arch-at91/io.h
deleted file mode 100644
index d0daa4e..0000000
--- a/arch/arm/include/asm/arch-at91/io.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * [origin: Linux kernel include/asm-arm/arch-at91/io.h]
- *
- *  Copyright (C) 2003 SAN People
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-
-#ifndef __ASM_ARCH_IO_H
-#define __ASM_ARCH_IO_H
-
-#include <asm/io.h>
-
-#ifdef CONFIG_AT91_LEGACY
-
-static inline unsigned int at91_sys_read(unsigned int reg_offset)
-{
-	void *addr = (void *)ATMEL_BASE_SYS;
-
-	return __raw_readl(addr + reg_offset);
-}
-
-static inline void at91_sys_write(unsigned int reg_offset, unsigned long value)
-{
-	void *addr = (void *)ATMEL_BASE_SYS;
-
-	__raw_writel(value, addr + reg_offset);
-}
-#endif
-
-#endif
diff --git a/drivers/gpio/at91_gpio.c b/drivers/gpio/at91_gpio.c
index 1631687..be2a026 100644
--- a/drivers/gpio/at91_gpio.c
+++ b/drivers/gpio/at91_gpio.c
@@ -36,9 +36,9 @@
 
 #include <config.h>
 #include <common.h>
+#include <asm/io.h>
 #include <asm/sizes.h>
 #include <asm/arch/hardware.h>
-#include <asm/arch/io.h>
 #include <asm/arch/at91_pio.h>
 
 int at91_set_pio_pullup(unsigned port, unsigned pin, int use_pullup)
diff --git a/drivers/rtc/at91sam9_rtt.c b/drivers/rtc/at91sam9_rtt.c
index ed44016..ff4acb5 100644
--- a/drivers/rtc/at91sam9_rtt.c
+++ b/drivers/rtc/at91sam9_rtt.c
@@ -38,9 +38,9 @@
 #include <common.h>
 #include <command.h>
 #include <rtc.h>
+#include <asm/io.h>
 #include <asm/errno.h>
 #include <asm/arch/hardware.h>
-#include <asm/arch/io.h>
 #include <asm/arch/at91_rtt.h>
 #include <asm/arch/at91_gpbr.h>
 
diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c
index 6166899..9532dd9 100644
--- a/drivers/usb/host/ohci-at91.c
+++ b/drivers/usb/host/ohci-at91.c
@@ -25,8 +25,8 @@
 
 #if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT)
 
+#include <asm/io.h>
 #include <asm/arch/hardware.h>
-#include <asm/arch/io.h>
 #include <asm/arch/at91_pmc.h>
 #include <asm/arch/clk.h>
 
-- 
1.5.6.5

[U-Boot] [PATCH 12/15] ATMEL: fix dataflash (dirty)

[Reinhard Meyer]

Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
---
 drivers/spi/atmel_dataflash_spi.c |   94 ++++++++++++++++++++++--------------
 include/dataflash.h               |    1 -
 2 files changed, 57 insertions(+), 38 deletions(-)

diff --git a/drivers/spi/atmel_dataflash_spi.c b/drivers/spi/atmel_dataflash_spi.c
index 4a5c4aa..6e632cc 100644
--- a/drivers/spi/atmel_dataflash_spi.c
+++ b/drivers/spi/atmel_dataflash_spi.c
@@ -21,13 +21,21 @@
 
 #include <common.h>
 #ifndef CONFIG_AT91_LEGACY
-#define CONFIG_AT91_LEGACY
-#warning Please update to use C structur SoC access !
+# define CONFIG_AT91_LEGACY
+# warning Please update to use C structur SoC access !
 #endif
-#include <asm/arch/hardware.h>
+#include <common.h>
+#include <spi.h>
+#include <malloc.h>
+
+#include <asm/io.h>
+
 #include <asm/arch/clk.h>
+#include <asm/arch/hardware.h>
+
+#include "atmel_spi.h"
+
 #include <asm/arch/gpio.h>
-#include <asm/arch/io.h>
 #include <asm/arch/at91_pio.h>
 #include <asm/arch/at91_spi.h>
 
@@ -41,18 +49,18 @@
 void AT91F_SpiInit(void)
 {
 	/* Reset the SPI */
-	writel(AT91_SPI_SWRST, AT91_BASE_SPI + AT91_SPI_CR);
+	writel(AT91_SPI_SWRST, ATMEL_BASE_SPI0 + AT91_SPI_CR);
 
 	/* Configure SPI in Master Mode with No CS selected !!! */
 	writel(AT91_SPI_MSTR | AT91_SPI_MODFDIS | AT91_SPI_PCS,
-	       AT91_BASE_SPI + AT91_SPI_MR);
+	       ATMEL_BASE_SPI0 + AT91_SPI_MR);
 
 	/* Configure CS0 */
 	writel(AT91_SPI_NCPHA |
 	       (AT91_SPI_DLYBS & DATAFLASH_TCSS) |
 	       (AT91_SPI_DLYBCT & DATAFLASH_TCHS) |
 	       ((get_mck_clk_rate() / AT91_SPI_CLK) << 8),
-	       AT91_BASE_SPI + AT91_SPI_CSR(0));
+	       ATMEL_BASE_SPI0 + AT91_SPI_CSR(0));
 
 #ifdef CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1
 	/* Configure CS1 */
@@ -60,7 +68,7 @@ void AT91F_SpiInit(void)
 	       (AT91_SPI_DLYBS & DATAFLASH_TCSS) |
 	       (AT91_SPI_DLYBCT & DATAFLASH_TCHS) |
 	       ((get_mck_clk_rate() / AT91_SPI_CLK) << 8),
-	       AT91_BASE_SPI + AT91_SPI_CSR(1));
+	       ATMEL_BASE_SPI0 + AT91_SPI_CSR(1));
 #endif
 #ifdef CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS2
 	/* Configure CS2 */
@@ -68,7 +76,7 @@ void AT91F_SpiInit(void)
 	       (AT91_SPI_DLYBS & DATAFLASH_TCSS) |
 	       (AT91_SPI_DLYBCT & DATAFLASH_TCHS) |
 	       ((get_mck_clk_rate() / AT91_SPI_CLK) << 8),
-	       AT91_BASE_SPI + AT91_SPI_CSR(2));
+	       ATMEL_BASE_SPI0 + AT91_SPI_CSR(2));
 #endif
 #ifdef CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3
 	/* Configure CS3 */
@@ -76,21 +84,22 @@ void AT91F_SpiInit(void)
 	       (AT91_SPI_DLYBS & DATAFLASH_TCSS) |
 	       (AT91_SPI_DLYBCT & DATAFLASH_TCHS) |
 	       ((get_mck_clk_rate() / AT91_SPI_CLK) << 8),
-	       AT91_BASE_SPI + AT91_SPI_CSR(3));
+	       ATMEL_BASE_SPI0 + AT91_SPI_CSR(3));
 #endif
 
 	/* SPI_Enable */
-	writel(AT91_SPI_SPIEN, AT91_BASE_SPI + AT91_SPI_CR);
+	writel(AT91_SPI_SPIEN, ATMEL_BASE_SPI0 + AT91_SPI_CR);
 
-	while (!(readl(AT91_BASE_SPI + AT91_SPI_SR) & AT91_SPI_SPIENS));
+	while (!(readl(ATMEL_BASE_SPI0 + AT91_SPI_SR) & AT91_SPI_SPIENS))
+		;
 
 	/*
 	 * Add tempo to get SPI in a safe state.
 	 * Should not be needed for new silicon (Rev B)
 	 */
 	udelay(500000);
-	readl(AT91_BASE_SPI + AT91_SPI_SR);
-	readl(AT91_BASE_SPI + AT91_SPI_RDR);
+	readl(ATMEL_BASE_SPI0 + AT91_SPI_SR);
+	readl(ATMEL_BASE_SPI0 + AT91_SPI_RDR);
 
 }
 
@@ -100,33 +109,33 @@ void AT91F_SpiEnable(int cs)
 
 	switch (cs) {
 	case 0:	/* Configure SPI CS0 for Serial DataFlash AT45DBxx */
-		mode = readl(AT91_BASE_SPI + AT91_SPI_MR);
+		mode = readl(ATMEL_BASE_SPI0 + AT91_SPI_MR);
 		mode &= 0xFFF0FFFF;
 		writel(mode | ((AT91_SPI_PCS0_DATAFLASH_CARD<<16) & AT91_SPI_PCS),
-		       AT91_BASE_SPI + AT91_SPI_MR);
+		       ATMEL_BASE_SPI0 + AT91_SPI_MR);
 		break;
 	case 1:	/* Configure SPI CS1 for Serial DataFlash AT45DBxx */
-		mode = readl(AT91_BASE_SPI + AT91_SPI_MR);
+		mode = readl(ATMEL_BASE_SPI0 + AT91_SPI_MR);
 		mode &= 0xFFF0FFFF;
 		writel(mode | ((AT91_SPI_PCS1_DATAFLASH_CARD<<16) & AT91_SPI_PCS),
-		       AT91_BASE_SPI + AT91_SPI_MR);
+		       ATMEL_BASE_SPI0 + AT91_SPI_MR);
 		break;
 	case 2:	/* Configure SPI CS2 for Serial DataFlash AT45DBxx */
-		mode = readl(AT91_BASE_SPI + AT91_SPI_MR);
+		mode = readl(ATMEL_BASE_SPI0 + AT91_SPI_MR);
 		mode &= 0xFFF0FFFF;
 		writel(mode | ((AT91_SPI_PCS2_DATAFLASH_CARD<<16) & AT91_SPI_PCS),
-		       AT91_BASE_SPI + AT91_SPI_MR);
+		       ATMEL_BASE_SPI0 + AT91_SPI_MR);
 		break;
 	case 3:
-		mode = readl(AT91_BASE_SPI + AT91_SPI_MR);
+		mode = readl(ATMEL_BASE_SPI0 + AT91_SPI_MR);
 		mode &= 0xFFF0FFFF;
 		writel(mode | ((AT91_SPI_PCS3_DATAFLASH_CARD<<16) & AT91_SPI_PCS),
-		       AT91_BASE_SPI + AT91_SPI_MR);
+		       ATMEL_BASE_SPI0 + AT91_SPI_MR);
 		break;
 	}
 
 	/* SPI_Enable */
-	writel(AT91_SPI_SPIEN, AT91_BASE_SPI + AT91_SPI_CR);
+	writel(AT91_SPI_SPIEN, ATMEL_BASE_SPI0 + AT91_SPI_CR);
 }
 
 unsigned int AT91F_SpiWrite1(AT91PS_DataflashDesc pDesc);
@@ -134,37 +143,48 @@ unsigned int AT91F_SpiWrite1(AT91PS_DataflashDesc pDesc);
 unsigned int AT91F_SpiWrite(AT91PS_DataflashDesc pDesc)
 {
 	unsigned int timeout;
+	unsigned int timebase;
 
 	pDesc->state = BUSY;
 
-	writel(AT91_SPI_TXTDIS + AT91_SPI_RXTDIS, AT91_BASE_SPI + AT91_SPI_PTCR);
+	writel(AT91_SPI_TXTDIS + AT91_SPI_RXTDIS,
+		ATMEL_BASE_SPI0 + AT91_SPI_PTCR);
 
 	/* Initialize the Transmit and Receive Pointer */
-	writel((unsigned int)pDesc->rx_cmd_pt, AT91_BASE_SPI + AT91_SPI_RPR);
-	writel((unsigned int)pDesc->tx_cmd_pt, AT91_BASE_SPI + AT91_SPI_TPR);
+	writel((unsigned int)pDesc->rx_cmd_pt,
+		ATMEL_BASE_SPI0 + AT91_SPI_RPR);
+	writel((unsigned int)pDesc->tx_cmd_pt,
+		ATMEL_BASE_SPI0 + AT91_SPI_TPR);
 
 	/* Intialize the Transmit and Receive Counters */
-	writel(pDesc->rx_cmd_size, AT91_BASE_SPI + AT91_SPI_RCR);
-	writel(pDesc->tx_cmd_size, AT91_BASE_SPI + AT91_SPI_TCR);
+	writel(pDesc->rx_cmd_size, ATMEL_BASE_SPI0 + AT91_SPI_RCR);
+	writel(pDesc->tx_cmd_size, ATMEL_BASE_SPI0 + AT91_SPI_TCR);
 
 	if (pDesc->tx_data_size != 0) {
 		/* Initialize the Next Transmit and Next Receive Pointer */
-		writel((unsigned int)pDesc->rx_data_pt, AT91_BASE_SPI + AT91_SPI_RNPR);
-		writel((unsigned int)pDesc->tx_data_pt, AT91_BASE_SPI + AT91_SPI_TNPR);
+		writel((unsigned int)pDesc->rx_data_pt,
+			ATMEL_BASE_SPI0 + AT91_SPI_RNPR);
+		writel((unsigned int)pDesc->tx_data_pt,
+			ATMEL_BASE_SPI0 + AT91_SPI_TNPR);
 
 		/* Intialize the Next Transmit and Next Receive Counters */
-		writel(pDesc->rx_data_size, AT91_BASE_SPI + AT91_SPI_RNCR);
-		writel(pDesc->tx_data_size, AT91_BASE_SPI + AT91_SPI_TNCR);
+		writel(pDesc->rx_data_size,
+			ATMEL_BASE_SPI0 + AT91_SPI_RNCR);
+		writel(pDesc->tx_data_size,
+			ATMEL_BASE_SPI0 + AT91_SPI_TNCR);
 	}
 
 	/* arm simple, non interrupt dependent timer */
-	reset_timer_masked();
+	timebase = get_timer(0);
 	timeout = 0;
 
-	writel(AT91_SPI_TXTEN + AT91_SPI_RXTEN, AT91_BASE_SPI + AT91_SPI_PTCR);
-	while (!(readl(AT91_BASE_SPI + AT91_SPI_SR) & AT91_SPI_RXBUFF) &&
-		((timeout = get_timer_masked()) < CONFIG_SYS_SPI_WRITE_TOUT));
-	writel(AT91_SPI_TXTDIS + AT91_SPI_RXTDIS, AT91_BASE_SPI + AT91_SPI_PTCR);
+	writel(AT91_SPI_TXTEN + AT91_SPI_RXTEN,
+		ATMEL_BASE_SPI0 + AT91_SPI_PTCR);
+	while (!(readl(ATMEL_BASE_SPI0 + AT91_SPI_SR) & AT91_SPI_RXBUFF) &&
+		((timeout = get_timer(timebase)) < CONFIG_SYS_SPI_WRITE_TOUT))
+		;
+	writel(AT91_SPI_TXTDIS + AT91_SPI_RXTDIS,
+		ATMEL_BASE_SPI0 + AT91_SPI_PTCR);
 	pDesc->state = IDLE;
 
 	if (timeout >= CONFIG_SYS_SPI_WRITE_TOUT) {
diff --git a/include/dataflash.h b/include/dataflash.h
index 63b3bf9..96ac097 100644
--- a/include/dataflash.h
+++ b/include/dataflash.h
@@ -34,7 +34,6 @@
 #define _DataFlash_h
 
 
-#include <asm/arch/hardware.h>
 #include "config.h"
 
 /*number of protected area*/
-- 
1.5.6.5

[U-Boot] [PATCH 12/15] ATMEL: fix dataflash (dirty)

[Andreas Bießmann]

Am 18.02.2011 13:50, schrieb Reinhard Meyer:
> Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
> ---
>  drivers/spi/atmel_dataflash_spi.c |   94 ++++++++++++++++++++++--------------
>  include/dataflash.h               |    1 -
>  2 files changed, 57 insertions(+), 38 deletions(-)
> 
> diff --git a/drivers/spi/atmel_dataflash_spi.c b/drivers/spi/atmel_dataflash_spi.c
> index 4a5c4aa..6e632cc 100644
> --- a/drivers/spi/atmel_dataflash_spi.c
> +++ b/drivers/spi/atmel_dataflash_spi.c
> @@ -21,13 +21,21 @@
>  
>  #include <common.h>
>  #ifndef CONFIG_AT91_LEGACY
> -#define CONFIG_AT91_LEGACY
> -#warning Please update to use C structur SoC access !
> +# define CONFIG_AT91_LEGACY

this would be CONFIG_ATMEL_LEGACY

> +# warning Please update to use C structur SoC access !
>  #endif
> -#include <asm/arch/hardware.h>
> +#include <common.h>
> +#include <spi.h>
> +#include <malloc.h>
> +
> +#include <asm/io.h>
> +
>  #include <asm/arch/clk.h>
> +#include <asm/arch/hardware.h>
> +
> +#include "atmel_spi.h"
> +
>  #include <asm/arch/gpio.h>
> -#include <asm/arch/io.h>
>  #include <asm/arch/at91_pio.h>
>  #include <asm/arch/at91_spi.h>
>  
> @@ -41,18 +49,18 @@
>  void AT91F_SpiInit(void)
>  {
>  	/* Reset the SPI */
> -	writel(AT91_SPI_SWRST, AT91_BASE_SPI + AT91_SPI_CR);
> +	writel(AT91_SPI_SWRST, ATMEL_BASE_SPI0 + AT91_SPI_CR);
>  
>  	/* Configure SPI in Master Mode with No CS selected !!! */
>  	writel(AT91_SPI_MSTR | AT91_SPI_MODFDIS | AT91_SPI_PCS,
> -	       AT91_BASE_SPI + AT91_SPI_MR);
> +	       ATMEL_BASE_SPI0 + AT91_SPI_MR);
>  
>  	/* Configure CS0 */
>  	writel(AT91_SPI_NCPHA |
>  	       (AT91_SPI_DLYBS & DATAFLASH_TCSS) |
>  	       (AT91_SPI_DLYBCT & DATAFLASH_TCHS) |
>  	       ((get_mck_clk_rate() / AT91_SPI_CLK) << 8),
> -	       AT91_BASE_SPI + AT91_SPI_CSR(0));
> +	       ATMEL_BASE_SPI0 + AT91_SPI_CSR(0));
>  
>  #ifdef CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1
>  	/* Configure CS1 */
> @@ -60,7 +68,7 @@ void AT91F_SpiInit(void)
>  	       (AT91_SPI_DLYBS & DATAFLASH_TCSS) |
>  	       (AT91_SPI_DLYBCT & DATAFLASH_TCHS) |
>  	       ((get_mck_clk_rate() / AT91_SPI_CLK) << 8),
> -	       AT91_BASE_SPI + AT91_SPI_CSR(1));
> +	       ATMEL_BASE_SPI0 + AT91_SPI_CSR(1));
>  #endif
>  #ifdef CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS2
>  	/* Configure CS2 */
> @@ -68,7 +76,7 @@ void AT91F_SpiInit(void)
>  	       (AT91_SPI_DLYBS & DATAFLASH_TCSS) |
>  	       (AT91_SPI_DLYBCT & DATAFLASH_TCHS) |
>  	       ((get_mck_clk_rate() / AT91_SPI_CLK) << 8),
> -	       AT91_BASE_SPI + AT91_SPI_CSR(2));
> +	       ATMEL_BASE_SPI0 + AT91_SPI_CSR(2));
>  #endif
>  #ifdef CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3
>  	/* Configure CS3 */
> @@ -76,21 +84,22 @@ void AT91F_SpiInit(void)
>  	       (AT91_SPI_DLYBS & DATAFLASH_TCSS) |
>  	       (AT91_SPI_DLYBCT & DATAFLASH_TCHS) |
>  	       ((get_mck_clk_rate() / AT91_SPI_CLK) << 8),
> -	       AT91_BASE_SPI + AT91_SPI_CSR(3));
> +	       ATMEL_BASE_SPI0 + AT91_SPI_CSR(3));
>  #endif
>  
>  	/* SPI_Enable */
> -	writel(AT91_SPI_SPIEN, AT91_BASE_SPI + AT91_SPI_CR);
> +	writel(AT91_SPI_SPIEN, ATMEL_BASE_SPI0 + AT91_SPI_CR);
>  
> -	while (!(readl(AT91_BASE_SPI + AT91_SPI_SR) & AT91_SPI_SPIENS));
> +	while (!(readl(ATMEL_BASE_SPI0 + AT91_SPI_SR) & AT91_SPI_SPIENS))
> +		;
>  
>  	/*
>  	 * Add tempo to get SPI in a safe state.
>  	 * Should not be needed for new silicon (Rev B)
>  	 */
>  	udelay(500000);
> -	readl(AT91_BASE_SPI + AT91_SPI_SR);
> -	readl(AT91_BASE_SPI + AT91_SPI_RDR);
> +	readl(ATMEL_BASE_SPI0 + AT91_SPI_SR);
> +	readl(ATMEL_BASE_SPI0 + AT91_SPI_RDR);
>  
>  }
>  
> @@ -100,33 +109,33 @@ void AT91F_SpiEnable(int cs)
>  
>  	switch (cs) {
>  	case 0:	/* Configure SPI CS0 for Serial DataFlash AT45DBxx */
> -		mode = readl(AT91_BASE_SPI + AT91_SPI_MR);
> +		mode = readl(ATMEL_BASE_SPI0 + AT91_SPI_MR);
>  		mode &= 0xFFF0FFFF;
>  		writel(mode | ((AT91_SPI_PCS0_DATAFLASH_CARD<<16) & AT91_SPI_PCS),
> -		       AT91_BASE_SPI + AT91_SPI_MR);
> +		       ATMEL_BASE_SPI0 + AT91_SPI_MR);
>  		break;
>  	case 1:	/* Configure SPI CS1 for Serial DataFlash AT45DBxx */
> -		mode = readl(AT91_BASE_SPI + AT91_SPI_MR);
> +		mode = readl(ATMEL_BASE_SPI0 + AT91_SPI_MR);
>  		mode &= 0xFFF0FFFF;
>  		writel(mode | ((AT91_SPI_PCS1_DATAFLASH_CARD<<16) & AT91_SPI_PCS),
> -		       AT91_BASE_SPI + AT91_SPI_MR);
> +		       ATMEL_BASE_SPI0 + AT91_SPI_MR);
>  		break;
>  	case 2:	/* Configure SPI CS2 for Serial DataFlash AT45DBxx */
> -		mode = readl(AT91_BASE_SPI + AT91_SPI_MR);
> +		mode = readl(ATMEL_BASE_SPI0 + AT91_SPI_MR);
>  		mode &= 0xFFF0FFFF;
>  		writel(mode | ((AT91_SPI_PCS2_DATAFLASH_CARD<<16) & AT91_SPI_PCS),
> -		       AT91_BASE_SPI + AT91_SPI_MR);
> +		       ATMEL_BASE_SPI0 + AT91_SPI_MR);
>  		break;
>  	case 3:
> -		mode = readl(AT91_BASE_SPI + AT91_SPI_MR);
> +		mode = readl(ATMEL_BASE_SPI0 + AT91_SPI_MR);
>  		mode &= 0xFFF0FFFF;
>  		writel(mode | ((AT91_SPI_PCS3_DATAFLASH_CARD<<16) & AT91_SPI_PCS),
> -		       AT91_BASE_SPI + AT91_SPI_MR);
> +		       ATMEL_BASE_SPI0 + AT91_SPI_MR);
>  		break;
>  	}
>  
>  	/* SPI_Enable */
> -	writel(AT91_SPI_SPIEN, AT91_BASE_SPI + AT91_SPI_CR);
> +	writel(AT91_SPI_SPIEN, ATMEL_BASE_SPI0 + AT91_SPI_CR);
>  }
>  
>  unsigned int AT91F_SpiWrite1(AT91PS_DataflashDesc pDesc);
> @@ -134,37 +143,48 @@ unsigned int AT91F_SpiWrite1(AT91PS_DataflashDesc pDesc);
>  unsigned int AT91F_SpiWrite(AT91PS_DataflashDesc pDesc)
>  {
>  	unsigned int timeout;
> +	unsigned int timebase;
>  
>  	pDesc->state = BUSY;
>  
> -	writel(AT91_SPI_TXTDIS + AT91_SPI_RXTDIS, AT91_BASE_SPI + AT91_SPI_PTCR);
> +	writel(AT91_SPI_TXTDIS + AT91_SPI_RXTDIS,
> +		ATMEL_BASE_SPI0 + AT91_SPI_PTCR);
>  
>  	/* Initialize the Transmit and Receive Pointer */
> -	writel((unsigned int)pDesc->rx_cmd_pt, AT91_BASE_SPI + AT91_SPI_RPR);
> -	writel((unsigned int)pDesc->tx_cmd_pt, AT91_BASE_SPI + AT91_SPI_TPR);
> +	writel((unsigned int)pDesc->rx_cmd_pt,
> +		ATMEL_BASE_SPI0 + AT91_SPI_RPR);
> +	writel((unsigned int)pDesc->tx_cmd_pt,
> +		ATMEL_BASE_SPI0 + AT91_SPI_TPR);
>  
>  	/* Intialize the Transmit and Receive Counters */
> -	writel(pDesc->rx_cmd_size, AT91_BASE_SPI + AT91_SPI_RCR);
> -	writel(pDesc->tx_cmd_size, AT91_BASE_SPI + AT91_SPI_TCR);
> +	writel(pDesc->rx_cmd_size, ATMEL_BASE_SPI0 + AT91_SPI_RCR);
> +	writel(pDesc->tx_cmd_size, ATMEL_BASE_SPI0 + AT91_SPI_TCR);
>  
>  	if (pDesc->tx_data_size != 0) {
>  		/* Initialize the Next Transmit and Next Receive Pointer */
> -		writel((unsigned int)pDesc->rx_data_pt, AT91_BASE_SPI + AT91_SPI_RNPR);
> -		writel((unsigned int)pDesc->tx_data_pt, AT91_BASE_SPI + AT91_SPI_TNPR);
> +		writel((unsigned int)pDesc->rx_data_pt,
> +			ATMEL_BASE_SPI0 + AT91_SPI_RNPR);
> +		writel((unsigned int)pDesc->tx_data_pt,
> +			ATMEL_BASE_SPI0 + AT91_SPI_TNPR);
>  
>  		/* Intialize the Next Transmit and Next Receive Counters */
> -		writel(pDesc->rx_data_size, AT91_BASE_SPI + AT91_SPI_RNCR);
> -		writel(pDesc->tx_data_size, AT91_BASE_SPI + AT91_SPI_TNCR);
> +		writel(pDesc->rx_data_size,
> +			ATMEL_BASE_SPI0 + AT91_SPI_RNCR);
> +		writel(pDesc->tx_data_size,
> +			ATMEL_BASE_SPI0 + AT91_SPI_TNCR);
>  	}
>  
>  	/* arm simple, non interrupt dependent timer */
> -	reset_timer_masked();
> +	timebase = get_timer(0);
>  	timeout = 0;
>  
> -	writel(AT91_SPI_TXTEN + AT91_SPI_RXTEN, AT91_BASE_SPI + AT91_SPI_PTCR);
> -	while (!(readl(AT91_BASE_SPI + AT91_SPI_SR) & AT91_SPI_RXBUFF) &&
> -		((timeout = get_timer_masked()) < CONFIG_SYS_SPI_WRITE_TOUT));
> -	writel(AT91_SPI_TXTDIS + AT91_SPI_RXTDIS, AT91_BASE_SPI + AT91_SPI_PTCR);
> +	writel(AT91_SPI_TXTEN + AT91_SPI_RXTEN,
> +		ATMEL_BASE_SPI0 + AT91_SPI_PTCR);
> +	while (!(readl(ATMEL_BASE_SPI0 + AT91_SPI_SR) & AT91_SPI_RXBUFF) &&
> +		((timeout = get_timer(timebase)) < CONFIG_SYS_SPI_WRITE_TOUT))
> +		;
> +	writel(AT91_SPI_TXTDIS + AT91_SPI_RXTDIS,
> +		ATMEL_BASE_SPI0 + AT91_SPI_PTCR);
>  	pDesc->state = IDLE;
>  
>  	if (timeout >= CONFIG_SYS_SPI_WRITE_TOUT) {
> diff --git a/include/dataflash.h b/include/dataflash.h
> index 63b3bf9..96ac097 100644
> --- a/include/dataflash.h
> +++ b/include/dataflash.h
> @@ -34,7 +34,6 @@
>  #define _DataFlash_h
>  
>  
> -#include <asm/arch/hardware.h>
>  #include "config.h"
>  
>  /*number of protected area*/

[U-Boot] [PATCH 12/15] ATMEL: fix dataflash (dirty)

[Reinhard Meyer]

Dear Andreas Bie?mann,
>>   #ifndef CONFIG_AT91_LEGACY
>> -#define CONFIG_AT91_LEGACY
>> -#warning Please update to use C structur SoC access !
>> +# define CONFIG_AT91_LEGACY
>
> this would be CONFIG_ATMEL_LEGACY
>
>> +# warning Please update to use C structur SoC access !
>>   #endif
Interesting.. It did build although the (wrong) define should not have been set.
Either it is set somewhere, or it is actually not required.

Anyway, when the driver is converted to struct SoC access, this will be removed.
Reinhard

[U-Boot] [PATCH 13/15] AT91: remove LEGACY from at91_rstc.h

[Reinhard Meyer]

Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
---
 arch/arm/include/asm/arch-at91/at91_rstc.h |   25 -------------------------
 1 files changed, 0 insertions(+), 25 deletions(-)

diff --git a/arch/arm/include/asm/arch-at91/at91_rstc.h b/arch/arm/include/asm/arch-at91/at91_rstc.h
index 9ff2c5b..510eed5 100644
--- a/arch/arm/include/asm/arch-at91/at91_rstc.h
+++ b/arch/arm/include/asm/arch-at91/at91_rstc.h
@@ -41,29 +41,4 @@ typedef struct at91_rstc {
 
 #define AT91_RSTC_SR_NRSTL	0x00010000
 
-#ifdef CONFIG_AT91_LEGACY
-
-#define AT91_RSTC_CR		(AT91_RSTC + 0x00)	/* Reset Controller Control Register */
-#define		AT91_RSTC_PROCRST	(1 << 0)		/* Processor Reset */
-#define		AT91_RSTC_PERRST	(1 << 2)		/* Peripheral Reset */
-#define		AT91_RSTC_EXTRST	(1 << 3)		/* External Reset */
-
-#define AT91_RSTC_SR		(AT91_RSTC + 0x04)	/* Reset Controller Status Register */
-#define		AT91_RSTC_URSTS		(1 << 0)		/* User Reset Status */
-#define		AT91_RSTC_RSTTYP	(7 << 8)		/* Reset Type */
-#define			AT91_RSTC_RSTTYP_GENERAL	(0 << 8)
-#define			AT91_RSTC_RSTTYP_WAKEUP		(1 << 8)
-#define			AT91_RSTC_RSTTYP_WATCHDOG	(2 << 8)
-#define			AT91_RSTC_RSTTYP_SOFTWARE	(3 << 8)
-#define			AT91_RSTC_RSTTYP_USER	(4 << 8)
-#define		AT91_RSTC_NRSTL		(1 << 16)		/* NRST Pin Level */
-#define		AT91_RSTC_SRCMP		(1 << 17)		/* Software Reset Command in Progress */
-
-#define AT91_RSTC_MR		(AT91_RSTC + 0x08)	/* Reset Controller Mode Register */
-#define		AT91_RSTC_URSTEN	(1 << 0)		/* User Reset Enable */
-#define		AT91_RSTC_URSTIEN	(1 << 4)		/* User Reset Interrupt Enable */
-#define		AT91_RSTC_ERSTL		(0xf << 8)		/* External Reset Length */
-
-#endif /* CONFIG_AT91_LEGACY */
-
 #endif
-- 
1.5.6.5

[U-Boot] [PATCH 14/15] AT91: fix at91sam_wdt.c to reworked header files

[Reinhard Meyer]

Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
---
 drivers/watchdog/at91sam9_wdt.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/watchdog/at91sam9_wdt.c b/drivers/watchdog/at91sam9_wdt.c
index 6254765..80dad07 100644
--- a/drivers/watchdog/at91sam9_wdt.c
+++ b/drivers/watchdog/at91sam9_wdt.c
@@ -21,7 +21,7 @@
 #include <common.h>
 #include <watchdog.h>
 #include <asm/arch/hardware.h>
-#include <asm/arch/io.h>
+#include <asm/io.h>
 #include <asm/arch/at91_wdt.h>
 
 /*
-- 
1.5.6.5

[U-Boot] [PATCH 15/15] AT91: fix timer.c - remove reset_timer()

[Reinhard Meyer]

Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
---
 arch/arm/cpu/arm926ejs/at91/timer.c |   27 +++++++++++----------------
 1 files changed, 11 insertions(+), 16 deletions(-)

diff --git a/arch/arm/cpu/arm926ejs/at91/timer.c b/arch/arm/cpu/arm926ejs/at91/timer.c
index 87a5b63..a087687 100644
--- a/arch/arm/cpu/arm926ejs/at91/timer.c
+++ b/arch/arm/cpu/arm926ejs/at91/timer.c
@@ -103,33 +103,28 @@ unsigned long long get_ticks(void)
 
 void __udelay(unsigned long usec)
 {
-	unsigned long long tmp;
+	unsigned long long start;
 	ulong tmo;
 
-	tmo = usec_to_tick(usec);
-	tmp = get_ticks() + tmo;	/* get current timestamp */
-
-	while (get_ticks() < tmp)	/* loop till event */
-		;
+	start = get_ticks();		/* get current timestamp */
+	tmo = usec_to_tick(usec);	/* convert usecs to ticks */
+	while ((get_ticks() - start) < tmo)
+		;			/* loop till time has passed */
 }
 
 /*
- * reset_timer() and get_timer(base) are a pair of functions that are used by
- * some timeout/sleep mechanisms in u-boot.
+ * get_timer(base) can be used to check for timeouts or
+ * to measure elasped time relative to an event:
  *
- * reset_timer() marks the current time as epoch and
- * get_timer(base) works relative to that epoch.
+ * ulong start_time = get_timer(0) sets start_time to the current
+ * time value.
+ * get_timer(start_time) returns the time elapsed since then.
  *
  * The time is used in CONFIG_SYS_HZ units!
  */
-void reset_timer(void)
-{
-	gd->timer_reset_value = get_ticks();
-}
-
 ulong get_timer(ulong base)
 {
-	return tick_to_time(get_ticks() - gd->timer_reset_value) - base;
+	return tick_to_time(get_ticks()) - base;
 }
 
 /*
-- 
1.5.6.5

[U-Boot] [PATCH 01/15] AT91: rework at91sam9260.h

[Andreas Bießmann]

Dear Reinhard Meyer,

Am 18.02.2011 um 13:49 schrieb Reinhard Meyer:

> Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
> ---
> arch/arm/include/asm/arch-at91/at91sam9260.h |  252 ++++++++++++++------------
> 1 files changed, 132 insertions(+), 120 deletions(-)
> 
> diff --git a/arch/arm/include/asm/arch-at91/at91sam9260.h b/arch/arm/include/asm/arch-at91/at91sam9260.h
> index 7fd60b7..dd68485 100644
> --- a/arch/arm/include/asm/arch-at91/at91sam9260.h
> +++ b/arch/arm/include/asm/arch-at91/at91sam9260.h

snip

> @@ -16,145 +22,151 @@
> #define AT91SAM9260_H
> 
> /*
> - * Peripheral identifiers/interrupts.
> + * defines to be used in other places
>  */
> -#define AT91_ID_FIQ		0	/* Advanced Interrupt Controller (FIQ) */

snap

> -#define AT91SAM9260_ID_IRQ2	31	/* Advanced Interrupt Controller (IRQ2) */
> +#define CONFIG_ARM926EJS	/* ARM926EJS Core */
> +#define CONFIG_AT91FAMILY	/* it's a member of AT91 */

these two lines have contra-productive effects.

If one remove these two configs from board configuration header cause of double definition error message he will get

---8<---
clock.c:28:11: error: 'gd_t' has no member named 'cpu_clk_rate_hz'
...
--->8---

cause CONFIG_AT91FAMILY is not defined when including asm/global_data.h. One way out is to include arch/hardware.h in each relevant board specific header. Other solutions are welcome.

regards

Andreas Bie?mann

[U-Boot] [PATCH 0/15] ATMEL rework

[Remy Bohmer]

Hi Reinhard,

2011/2/18 Reinhard Meyer <u-boot@emk-elektronik.de>:
> These are all the reworks on the ATMEL parts done by me so far.
> They are now officially posted as patches for commenting.
> They are the patches found in u-boot-atmel so far, with minor
> whitespace and long line fixes complained about by checkpatch.
>
> The following files are affected:
>
> (Output of git-diff-tree --stat HEAD~15 HEAD~0)
>
> ?arch/arm/cpu/arm926ejs/at91/Makefile ? ? ? ? ? ? ? | ? ?1 +
> ?arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c ?| ? 47 +---
> ?arch/arm/cpu/arm926ejs/at91/clock.c ? ? ? ? ? ? ? ?| ? ?8 +-
> ?arch/arm/cpu/arm926ejs/at91/cpu.c ? ? ? ? ? ? ? ? ?| ? 11 +-
> ?arch/arm/cpu/arm926ejs/at91/eflash.c ? ? ? ? ? ? ? | ? 16 +-
> ?arch/arm/cpu/arm926ejs/at91/led.c ? ? ? ? ? ? ? ? ?| ? ?2 +-
> ?arch/arm/cpu/arm926ejs/at91/reset.c ? ? ? ? ? ? ? ?| ? ?4 +-
> ?arch/arm/cpu/arm926ejs/at91/timer.c ? ? ? ? ? ? ? ?| ? 37 ++--
> ?arch/arm/include/asm/arch-at91/at91_common.h ? ? ? | ? ?3 +-
> ?arch/arm/include/asm/arch-at91/at91_pio.h ? ? ? ? ?| ? 19 +--
> ?arch/arm/include/asm/arch-at91/at91_rstc.h ? ? ? ? | ? 25 --
> ?arch/arm/include/asm/arch-at91/at91sam9260.h ? ? ? | ?252 ++++++++++----------
> ?.../arm/include/asm/arch-at91/at91sam9260_matrix.h | ?102 ++++-----
> ?arch/arm/include/asm/arch-at91/at91sam9261.h ? ? ? | ?187 ++++++++-------
> ?arch/arm/include/asm/arch-at91/at91sam9263.h ? ? ? | ?218 ++++++++---------
> ?arch/arm/include/asm/arch-at91/at91sam9g45.h ? ? ? | ?225 +++++++++---------
> ?arch/arm/include/asm/arch-at91/gpio.h ? ? ? ? ? ? ?| ? 18 +-
> ?arch/arm/include/asm/arch-at91/hardware.h ? ? ? ? ?| ? 96 +++-----
> ?arch/arm/include/asm/arch-at91/io.h ? ? ? ? ? ? ? ?| ? 43 ----
> ?arch/arm/include/asm/arch-at91/memory-map.h ? ? ? ?| ? 36 ---
> ?drivers/gpio/at91_gpio.c ? ? ? ? ? ? ? ? ? ? ? ? ? | ? 54 +++--
> ?drivers/mmc/gen_atmel_mci.c ? ? ? ? ? ? ? ? ? ? ? ?| ? ?2 +-
> ?drivers/net/macb.c ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? | ? 14 +-
> ?drivers/rtc/at91sam9_rtt.c ? ? ? ? ? ? ? ? ? ? ? ? | ? 14 +-
> ?drivers/serial/atmel_usart.c ? ? ? ? ? ? ? ? ? ? ? | ? 28 +--
> ?drivers/spi/atmel_dataflash_spi.c ? ? ? ? ? ? ? ? ?| ? 94 +++++---
> ?drivers/spi/atmel_spi.c ? ? ? ? ? ? ? ? ? ? ? ? ? ?| ? 16 +-
> ?drivers/usb/host/ohci-at91.c ? ? ? ? ? ? ? ? ? ? ? | ? 18 +-

Patches for the usb drivers should go through the u-boot-usb custodian tree.
But for this series it is okay if you push it forward.
Thanks.

Remy

[U-Boot] [PATCH 0/15] ATMEL rework

[Reinhard Meyer]

I wrote,
> These are all the reworks on the ATMEL parts done by me so far.
> They are now officially posted as patches for commenting.
> They are the patches found in u-boot-atmel so far, with minor
> whitespace and long line fixes complained about by checkpatch.
> 
> The following files are affected:
> 
> (Output of git-diff-tree --stat HEAD~15 HEAD~0)
> 
>  arch/arm/cpu/arm926ejs/at91/Makefile               |    1 +
>  arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c  |   47 +---
>  arch/arm/cpu/arm926ejs/at91/clock.c                |    8 +-
>  arch/arm/cpu/arm926ejs/at91/cpu.c                  |   11 +-
>  arch/arm/cpu/arm926ejs/at91/eflash.c               |   16 +-
>  arch/arm/cpu/arm926ejs/at91/led.c                  |    2 +-
>  arch/arm/cpu/arm926ejs/at91/reset.c                |    4 +-
>  arch/arm/cpu/arm926ejs/at91/timer.c                |   37 ++--
>  arch/arm/include/asm/arch-at91/at91_common.h       |    3 +-
>  arch/arm/include/asm/arch-at91/at91_pio.h          |   19 +--
>  arch/arm/include/asm/arch-at91/at91_rstc.h         |   25 --
>  arch/arm/include/asm/arch-at91/at91sam9260.h       |  252 ++++++++++----------
>  .../arm/include/asm/arch-at91/at91sam9260_matrix.h |  102 ++++-----
>  arch/arm/include/asm/arch-at91/at91sam9261.h       |  187 ++++++++-------
>  arch/arm/include/asm/arch-at91/at91sam9263.h       |  218 ++++++++---------
>  arch/arm/include/asm/arch-at91/at91sam9g45.h       |  225 +++++++++---------
>  arch/arm/include/asm/arch-at91/gpio.h              |   18 +-
>  arch/arm/include/asm/arch-at91/hardware.h          |   96 +++-----
>  arch/arm/include/asm/arch-at91/io.h                |   43 ----
>  arch/arm/include/asm/arch-at91/memory-map.h        |   36 ---
>  drivers/gpio/at91_gpio.c                           |   54 +++--
>  drivers/mmc/gen_atmel_mci.c                        |    2 +-
>  drivers/net/macb.c                                 |   14 +-
>  drivers/rtc/at91sam9_rtt.c                         |   14 +-
>  drivers/serial/atmel_usart.c                       |   28 +--
>  drivers/spi/atmel_dataflash_spi.c                  |   94 +++++---
>  drivers/spi/atmel_spi.c                            |   16 +-
>  drivers/usb/host/ohci-at91.c                       |   18 +-
>  drivers/watchdog/at91sam9_wdt.c                    |    6 +-
>  include/dataflash.h                                |    1 -
>  30 files changed, 714 insertions(+), 883 deletions(-)

Hand edited minor typos as found by Andreas Bie?mann in 05/15 and 12/15.

The whole series is now applied into u-boot-atmel/next.

Greetings,

Reinhard