[U-Boot] [PATCH][v2] fsl_esdhc: Correcting esdhc timeout counter calculation

[U-Boot] [PATCH][v2] fsl_esdhc: Correcting esdhc timeout counter calculation

[Priyanka Jain]

- Timeout counter value is set as DTOCV bits in SYSCTL register
  For counter value set as timeout,
  Timeout period = (2^(timeout + 13)) SD Clock cycles

- As per 4.6.2.2 section of SD Card specification v2.00, host should
  cofigure timeout period value to minimum 0.25 sec.

- Number of SD Clock cycles for 0.25sec should be minimum
	(SD Clock/sec * 0.25 sec) SD Clock cycles
	= (mmc->tran_speed * 1/4) SD Clock cycles

- Calculating timeout based on
	(2^(timeout + 13)) >=  mmc->tran_speed * 1/4
	Taking log2 both the sides and rounding up to next power of 2
	=> timeout + 13 = log2(mmc->tran_speed/4) + 1

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Mingkai Hu <Mingkai.Hu@freescale.com>
---
 Changes for v2:
	Added proper description as suggested by Wolfgang Denk
 
 drivers/mmc/fsl_esdhc.c |   15 +++++++++++++--
 1 files changed, 13 insertions(+), 2 deletions(-)

diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 9c69cc7..e8dd9b7 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -207,8 +207,19 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data)
 	esdhc_write32(&regs->blkattr, data->blocks << 16 | data->blocksize);
 
 	/* Calculate the timeout period for data transactions */
-	/* Timeout period = (2^(13+timeout))/mmc->trans_speed
-	 * Timeout period should be minimum 250msec as per SD Card spec
+	/*
+	 * 1)Timeout period = (2^(timeout+13)) SD Clock cycles
+	 * 2)Timeout period should be minimum 0.250sec as per SD Card spec
+	 *  So, Number of SD Clock cycles for 0.25sec should be minimum
+	 *		(SD Clock/sec * 0.25 sec) SD Clock cycles
+	 *		= (mmc->tran_speed * 1/4) SD Clock cycles
+	 * As 1) >=  2)
+	 * => (2^(timeout+13)) >= mmc->tran_speed * 1/4
+	 * Taking log2 both the sides
+	 * => timeout + 13 >= log2(mmc->tran_speed/4)
+	 * Rounding up to next power of 2
+	 * => timeout + 13 = log2(mmc->tran_speed/4) + 1
+	 * => timeout + 13 = fls(mmc->tran_speed/4)
 	 */
 	timeout = fls(mmc->tran_speed/4);
 	timeout -= 13;
-- 
1.6.5.6

[U-Boot] [PATCH][v2] fsl_esdhc: Correcting esdhc timeout counter calculation

[Stefano Babic]

On 03/01/2011 11:12 AM, Priyanka Jain wrote:
> - Timeout counter value is set as DTOCV bits in SYSCTL register
>   For counter value set as timeout,
>   Timeout period = (2^(timeout + 13)) SD Clock cycles
> 
> - As per 4.6.2.2 section of SD Card specification v2.00, host should
>   cofigure timeout period value to minimum 0.25 sec.
> 
> - Number of SD Clock cycles for 0.25sec should be minimum
> 	(SD Clock/sec * 0.25 sec) SD Clock cycles
> 	= (mmc->tran_speed * 1/4) SD Clock cycles
> 
> - Calculating timeout based on
> 	(2^(timeout + 13)) >=  mmc->tran_speed * 1/4
> 	Taking log2 both the sides and rounding up to next power of 2
> 	=> timeout + 13 = log2(mmc->tran_speed/4) + 1
> 
> Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
> Signed-off-by: Andy Fleming <afleming@freescale.com>
> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
> Acked-by: Mingkai Hu <Mingkai.Hu@freescale.com>
> ---

It seems to me that this patch is set on top of V1 of the same patch
instead of top of u-boot. Changes are related only to comments and the
new formula for timeout is already applied.

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: office at denx.de
=====================================================================