From: Timur Tabi <timur@freescale.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [u-boot-release] [PATCH 1/2] powerpc/mpc8xxx: Fix DDR3 timing_cfg_1 and sdram_mode registers
Date: Wed, 2 Mar 2011 13:31:23 -0600 [thread overview]
Message-ID: <4D6E9B0B.4080300@freescale.com> (raw)
In-Reply-To: <1299091841-14594-1-git-send-email-yorksun@freescale.com>
York Sun wrote:
> + switch (wrrec_mclk) { /* DDR_SDRAM_MODE doesn't support 9,11,13,15 */
> + case 9:
> + wrrec_mclk = 10;
> + break;
> + case 11:
> + wrrec_mclk = 12;
> + break;
> + case 13:
> + wrrec_mclk = 14;
> + break;
> + case 16:
15?
> + wrrec_mclk = 16;
> + break;
> + }
How about something simpler:
if (wrrec_mclk & 1)
wrrec_mclk++;
--
Timur Tabi
Linux kernel developer at Freescale
next prev parent reply other threads:[~2011-03-02 19:31 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-03-02 18:50 [U-Boot] [PATCH 1/2] powerpc/mpc8xxx: Fix DDR3 timing_cfg_1 and sdram_mode registers York Sun
2011-03-02 18:50 ` [U-Boot] [PATCH 2/2] powerpc/corenet_ds: revise platform dependent parameters York Sun
2011-03-02 19:31 ` Timur Tabi [this message]
2011-03-02 19:39 ` [U-Boot] [u-boot-release] [PATCH 1/2] powerpc/mpc8xxx: Fix DDR3 timing_cfg_1 and sdram_mode registers York Sun
2011-03-02 19:46 ` Timur Tabi
2011-03-02 19:52 ` York Sun
2011-03-02 19:58 ` Timur Tabi
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