From mboxrd@z Thu Jan 1 00:00:00 1970 From: Felix Radensky Date: Thu, 03 Mar 2011 15:08:28 +0200 Subject: [U-Boot] CONFIG_WATCHDOG on MPC85XX and QorIQ P1/P2 In-Reply-To: <4D6F8AB5.2050208@freescale.com> References: <4D6EDC78.3010909@embedded-sol.com> <45903308677306428B6EE7E6FF5A52040EDA82@039-SN1MPN1-004.039d.mgd.msft.net> <4D6F1723.4040205@freescale.com> <57D3AB35EFB0E542A4326DBD78E17E9512853B@039-SN1MPN1-004.039d.mgd.msft.net> <4D6F4619.2020201@embedded-sol.com> <4D6F8AB5.2050208@freescale.com> Message-ID: <4D6F92CC.3010707@embedded-sol.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Timur, On 03/03/2011 02:33 PM, Tabi Timur-B04825 wrote: > Felix Radensky wrote: >> Correct. It works fine in linux. I've even tried to port linux code that >> enables watchdog (booke_wdt.c/__booke_wdt_enable()) to u-boot, >> but was not successful. Watchdog never triggered, although I did >> not refresh it. >> >> I'd appreciate some advice on what may be different in u-boot >> vs. linux. > I don't know what to tell you. I would need to try to make it myself in order to see what's going on. Maybe you really didn't program TCR correctly. Or maybe it is working, but the default behavior of U-Boot is to handle everything silently. Thanks. I suspect u-boot WDT behaviour should be different from Linux. Linux sets TCR_WIE bit to enable watchdog interrupt, u-boot should not do this and just reset the CPU on first time-out. The TCR values are identical in u-boot and linux, except for TCR_WIE and TCR_DIE bits that are set in linux. Except not setting TCI_WIE bit and setting WRC to 10b, is there anything else that should be done to cause reset of first time-out ? Felix.