[U-Boot] MPC837x PCIe no link

[U-Boot] MPC837x PCIe no link

[Andre Schwarz]

All,

sorry to bother you again.
After my harddisk died I'm porting my latest 8377 work to TOT.
Unfortunately I'm lacking some commits that haven't been pushed to backup.


But everything's fine so far and the system is up and running, except PCIe.

Using the "old" binary left on the server PCIe has been working fine :

U-Boot 2010.12-rc1-00596-gcef659f-dirty (Nov 22 2010 - 17:22:20) MPC83XX
...
PCIE1: link

and the Wifi card is present and usable by Linux.

=> pci 2
Scanning PCI devices on bus 2
BusDevFun  VendorId   DeviceId   Device Class       Sub-Class
_____________________________________________________________
02.00.00   0x168c     0x001c     Network controller      0x00



With latest code running on the *same piece of hardware*

U-Boot 2011.03-rc1-00129-g1ce1ed1-dirty (Mar 04 2011 - 16:31:40) MPC83XX

I get "PCIE1: No link"


Dumping SerDes (e3000 + e3100) and PCIe core (400-7ff) registers shows 
now difference between both versions.

Any ideas what might be responsible for the link not being established ?



Regards,
Andr?

MATRIX VISION GmbH, Talstrasse 16, DE-71570 Oppenweiler
Registergericht: Amtsgericht Stuttgart, HRB 271090
Geschaeftsfuehrer: Gerhard Thullner, Werner Armingeon, Uwe Furtner

[U-Boot] MPC837x PCIe no link

[Baidu Liu]

2011/3/5 Andre Schwarz <andre.schwarz@matrix-vision.de>

> All,
>
> sorry to bother you again.
> After my harddisk died I'm porting my latest 8377 work to TOT.
> Unfortunately I'm lacking some commits that haven't been pushed to backup.
>
>
> But everything's fine so far and the system is up and running, except PCIe.
>
> Using the "old" binary left on the server PCIe has been working fine :
>
> U-Boot 2010.12-rc1-00596-gcef659f-dirty (Nov 22 2010 - 17:22:20) MPC83XX
> ...
> PCIE1: link
>
> and the Wifi card is present and usable by Linux.
>
> => pci 2
> Scanning PCI devices on bus 2
> BusDevFun  VendorId   DeviceId   Device Class       Sub-Class
> _____________________________________________________________
> 02.00.00   0x168c     0x001c     Network controller      0x00
>
>
>
> With latest code running on the *same piece of hardware*
>
> U-Boot 2011.03-rc1-00129-g1ce1ed1-dirty (Mar 04 2011 - 16:31:40) MPC83XX
>
> I get "PCIE1: No link"
>
>
> Dumping SerDes (e3000 + e3100) and PCIe core (400-7ff) registers shows
> now difference between both versions.
>
> Any ideas what might be responsible for the link not being established ?
>
>
> the link is the physical status of the pcie. So please to check the setting
about the pcie. Such as x1/x2?clock?serdes setting in
functiono pci_init_board().

[U-Boot] MPC837x PCIe no link

[Schwarz, Andre]

Baidu,?


> 
> 
>  2011/3/5 Andre Schwarz <andre.schwarz@matrix-vision.de
> [mailto:andre.schwarz at matrix-vision.de] >
> 
> >  All,
> > 
> >  sorry to bother you again.
> >  After my harddisk died I'm porting my latest 8377 work to TOT.
> >  Unfortunately I'm lacking some commits that haven't been pushed to backup.
> > 
> > 
> >  But everything's fine so far and the system is up and running, except PCIe.
> > 
> >  Using the "old" binary left on the server PCIe has been working fine :
> > 
> >  U-Boot 2010.12-rc1-00596-gcef659f-dirty (Nov 22 2010 - 17:22:20) MPC83XX
> >  ...
> >  PCIE1: link
> > 
> >  and the Wifi card is present and usable by Linux.
> > 
> >  => pci 2
> >  Scanning PCI devices on bus 2
> >  BusDevFun ?VendorId ? DeviceId ? Device Class ? ? ? Sub-Class
> >  _____________________________________________________________
> >  02.00.00 ? 0x168c ? ? 0x001c ? ? Network controller ? ? ?0x00
> > 
> > 
> > 
> >  With latest code running on the *same piece of hardware*
> > 
> >  U-Boot 2011.03-rc1-00129-g1ce1ed1-dirty (Mar 04 2011 - 16:31:40) MPC83XX
> > 
> >  I get "PCIE1: No link"
> > 
> > 
> >  Dumping SerDes (e3000 + e3100) and PCIe core (400-7ff) registers shows
> >  now difference between both versions.
> > 
> >  Any ideas what might be responsible for the link not being established ?
> > 
> > 
> > 
the link is the physical status of the pcie.
hmm - that's clear.
I'm running the very same pci_init code, i.e. fsl_setup_serde and the resulting
register setting (PCIe *and* SerDes) are identical.?


>  So please to check the setting about the pcie. Such as x1/x2?clock?serdes
> setting in functiono?pci_init_board().
?
What exactly do you mean with x1/x2 clock ?
?
Are you talking about PCIe link width ?
It's 2 times x1 with 100MHz external refclk and internal PCIe clocks matches CSB
clock 333MHz.?
?
?
?
Regards,
Andr??

MATRIX VISION GmbH, Talstrasse 16, DE-71570 Oppenweiler
Registergericht: Amtsgericht Stuttgart, HRB 271090
Geschaeftsfuehrer: Gerhard Thullner, Werner Armingeon, Uwe Furtner

[U-Boot] MPC837x PCIe no link

[Andre Schwarz]

On 03/04/2011 05:27 PM, Andre Schwarz wrote:
> All,
>
> sorry to bother you again.
> After my harddisk died I'm porting my latest 8377 work to TOT.
> Unfortunately I'm lacking some commits that haven't been pushed to backup.
>
>
> But everything's fine so far and the system is up and running, except PCIe.
>
> Using the "old" binary left on the server PCIe has been working fine :
>
> U-Boot 2010.12-rc1-00596-gcef659f-dirty (Nov 22 2010 - 17:22:20) MPC83XX
> ...
> PCIE1: link
>
> and the Wifi card is present and usable by Linux.
>
> =>  pci 2
> Scanning PCI devices on bus 2
> BusDevFun  VendorId   DeviceId   Device Class       Sub-Class
> _____________________________________________________________
> 02.00.00   0x168c     0x001c     Network controller      0x00
>
>
>
> With latest code running on the *same piece of hardware*
>
> U-Boot 2011.03-rc1-00129-g1ce1ed1-dirty (Mar 04 2011 - 16:31:40) MPC83XX
>
> I get "PCIE1: No link"
>
>
> Dumping SerDes (e3000 + e3100) and PCIe core (400-7ff) registers shows
> now difference between both versions.
>
> Any ideas what might be responsible for the link not being established ?
>
got it - solution is somewhat unrelated but quite annoying :

serdes setup has been done twice :

1. during board_early_init_f
2. during pci_init_board

Although CONFIG_BOARD_EARLY_INIT_F has been defined in the 
board-config.h the function is not called - don't know why.
serdes needs some time to establish a link and the delay between serdes 
and pcie setup within pci_init_board has been to small.
This is why the registers always looked fine.

Now I do an early serdes init during DDR setup and everything works fine.


sorry for the noise.

Cheers,
Andr?

MATRIX VISION GmbH, Talstrasse 16, DE-71570 Oppenweiler
Registergericht: Amtsgericht Stuttgart, HRB 271090
Geschaeftsfuehrer: Gerhard Thullner, Werner Armingeon, Uwe Furtner