From mboxrd@z Thu Jan 1 00:00:00 1970 From: Shinya Kuribayashi Date: Sat, 12 Mar 2011 23:43:18 +0900 Subject: [U-Boot] [RFC PATCH 1/6] Mips: Move content of arch/mips/cpu to arch/mips/cpu/mips32 In-Reply-To: <1299676619-7963-2-git-send-email-daniel.schwierzeck@googlemail.com> References: <1299676619-7963-1-git-send-email-daniel.schwierzeck@googlemail.com> <1299676619-7963-2-git-send-email-daniel.schwierzeck@googlemail.com> Message-ID: <4D7B8686.9060101@pobox.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 3/9/11 10:16 PM, daniel.schwierzeck at googlemail.com wrote: > All current CPUs and SoCs are based on Mips32 arch. The complete Is that true? What about purple SoC? IIUC It's based on MIPS 5Kc and capable of 64-bit, which MIPS32 is 32-bit only architecture. > code resides in the global arch/mips/cpu directory. This is not > suitable if other Mips architectures like Mips64 or Octeon should > be supported in the future. Just for the record. Personally, Octeon is sort of a special case. It's based on MIPS64 architecture, and definitely a MIPS SoC, but not usual MIPS machine. As Aaron already mentioned before, we have very few files sharable with other MIPS machines even in the Linux kernel case. I think it will take long time the Octeon port gets merged to upstream, regard- less of my opinions, because they have a lot of things need to be resolved prior to Octeon itself. > To achieve this the current CPU code is moved to its own mips32 > subdirectory. All Mips32 boards have to use mips32 as config switch > in board.cfg. > > Signed-off-by: Daniel Schwierzeck > Cc: Shinya Kuribayashi