[U-Boot] [PATCH 2/2] MIPS: Coding style cleanups on common assembly files

[Shinya Kuribayashi <skuribay@pobox.com>]

On 04/12/2011 12:35 AM, Daniel Schwierzeck wrote:
>> diff --git a/arch/mips/cpu/mips32/start.S b/arch/mips/cpu/mips32/start.S
>> index 0a9d9d5..f1e3447 100644
>> --- a/arch/mips/cpu/mips32/start.S
>> +++ b/arch/mips/cpu/mips32/start.S
>> @@ -62,11 +62,11 @@
>>        .globl _start
>>        .text
>>  _start:
>> -       RVECENT(reset,0)        /* U-boot entry point */
>> -       RVECENT(reset,1)        /* software reboot */
>> -#if defined(CONFIG_INCA_IP)
>> -       .word INFINEON_EBU_BOOTCFG /* EBU init code, fetched during booting */
>> -       .word 0x00000000           /* phase of the flash                    */
>> +       RVECENT(reset,0)                        # U-boot entry point
>> +       RVECENT(reset,1)                        # software reboot
>> +#ifdef CONFIG_INCA_IP
>> +       .word INFINEON_EBU_BOOTCFG              # EBU init code, fetched during
>> +       .word 0x00000000                        # booting phase of the flash
>>  #else
>>        RVECENT(romReserved,2)
>>  #endif
> 
> can we use #ifdef INFINEON_EBU_BOOTCFG instead? This would help me
> with other SOCs which uses this feature too.

I don't see any problem with that plan, although I'm not sure what
EBU stands for and whether it could be generalized for other SoCs or
not at this moment.

Anyway patches are welcome.  But that's out of the scope of this clean-
up patch, so should be prepared separately.

> you missed that line:
> XVECENT(romExcHandle,0x380) 	/* bfc00380: R4000 general vector */

Thanks, now fixed.