From mboxrd@z Thu Jan  1 00:00:00 1970
From: Felix Radensky <felix@embedded-sol.com>
Date: Thu, 05 May 2011 16:17:06 +0300
Subject: [U-Boot] Memory size detection on P1011
Message-ID: <4DC2A352.8080505@embedded-sol.com>
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To: u-boot@lists.denx.de

Hi,

I'm working on a custom board based on P1011.
There are 2 board flavours, with either 128MB or 256MB of soldered
DDR2 SDRAM. Having u-boot image per board works fine, but I'd like
to have a single image and use get_ram_size() to detect memory size
at runtime. So far I had no luck.

The only significant difference between memory devices on these boards
is the number of banks: 4 banks on 128MB board and 8 banks on 256MB
board.

The memory size detection logic is loosely based on the code in
boards/tqc/tqm85xx/sdram.c, but I use fsl_ddr_set_memctl_regs()
to configure DDR controller registers and enable the controller.
The sequence is:

1. Configure TLBs for 2GB DDR
2. Configure LAWs for 2GB DDR
3. Configure DDR controller registers and enable DDR controller,
     CS0_BNDS is set to 256MB.
4. Iterate over possible memory sizes starting from the largest.
     Each iteration configures CS0_CONFIG (sets number of banks, rows 
and columns)
     and runs get_ram_size()

What I observe on 128MB board, is that only 32KB of RAM is detected in 
both
first and second iteration. So it seems that setting number of banks 
to 8 on
4-bank devices is fatal, and cannot be changed even if CS0_CONFIG is 
modified.

I've tried to rerun DDR controller initialization sequence with new 
CS0_CONFIG
value, but that just hangs the board. I've also tried to disable DDR 
controller via
RORDEVDISR register and then enable it and reconfigure DDR. That also 
leads
to hang.

I hope Freescale gurus on the list can help me to find a solution.

Thanks in advance.

Felix.