[U-Boot] [RFC] Review of U-Boot timer API

Wolfgang Denk
2011-05-23T19:33:05Z

Dear "J. William Campbell",

In message <4DDAA705.1040702@comcast.net> you wrote:
>
> My apologies for being a little (perhaps more than a little)
> dense. As they say, "after further review", I think the key aspect of
> the PPC timer system is that it uses the decrementer register to
> generate an interrupt at a 1 KHz rate. What I have been attempting here
> is to produce a timer system that does not use interrupts at all. This
> is a fundamental design question. Naturally, systems that can generate

No, it is not. It is an implementation detail which is irrelevant to
almost all users of U-Boot.

Or do you actucally care if your UART driver uses polling or
interrupts?

> an interrupt at a 1 KHz rate (or at any (reasonable) higher rate for
> that matter) using the decrementer register can produce a 1 ms
> resolution software counter that updates "by magic". If my understanding
> of this PPC code is incorrect, somebody please stop me before I make a
> further fool of myself! Is it then a design requirement that the timer
> system use interrupts? Is that what is meant by using the PPC system as

No, it is not a design requirement. It is just one possible
implementation. Any other method that achieves the same or similar
results is as good. As noted before, on PowerPC we could have
probably avoided this and just base all timer services on the timebase
register.

[The reason for this dual implementation is historical. When I wrote
this code, I did not know if we would ever need any fancy timer-
controlled callbacks or similar. And I needed to implement interrupt
handling for a few other purposes (for example for use in standalone
applications; this was an explicit requirement at that time). And the
timer was something that made a good and simple example.]

> a model? If so, is it possible/reasonable on all the u-boots that are
> out there to generate and process timer interrupts at some (hopefully
> but not necessarily) programmable rate?

I consider this an implementation detail. On all architectures it
should be possible to use interrupts, so if the hardware supports a
timer that can generate interrupts it should be possible to use this.
But it is not a requirement that all implementations must work like
this.

Best regards,

Wolfgang Denk

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