[U-Boot] [PATCH v2 1/4] include/asm/arch-at91: update several .h files to ATMEL_xxx name scheme

[Reinhard Meyer <u-boot@emk-elektronik.de>]

Dear Eric B?nard,
> Signed-off-by: Eric B?nard <eric@eukrea.com>
> ---
>  arch/arm/include/asm/arch-at91/at91_matrix.h     |   10 +++---
>  arch/arm/include/asm/arch-at91/at91_rstc.h       |    2 +-
>  arch/arm/include/asm/arch-at91/at91_wdt.h        |    2 +-
>  arch/arm/include/asm/arch-at91/at91sam9_sdramc.h |   30 +++++++++++-----------
>  arch/arm/include/asm/arch-at91/at91sam9_smc.h    |   12 ++++----
>  5 files changed, 28 insertions(+), 28 deletions(-)
> 
> diff --git a/arch/arm/include/asm/arch-at91/at91_matrix.h b/arch/arm/include/asm/arch-at91/at91_matrix.h
> index f99b1d4..a9ba9e9 100644
> --- a/arch/arm/include/asm/arch-at91/at91_matrix.h
> +++ b/arch/arm/include/asm/arch-at91/at91_matrix.h

Several lines are longer than 80 chars. Can you fix this asap?

I think the comments could be left away completely or at least shortened by
removing the obvios "SDAM Controller" part.

Before someone complains about this out of context: those defines are
used by ASM and therefore no struct SoC access is possible in that
case.

Thank you,
Reinhard

> +#define AT91_SDRAMC_MR		(ATMEL_BASE_SDRAMC + 0x00)	/* SDRAM Controller Mode Register */
> +#define AT91_SDRAMC_TR		(ATMEL_BASE_SDRAMC + 0x04)	/* SDRAM Controller Refresh Timer Register */
> +#define AT91_SDRAMC_CR		(ATMEL_BASE_SDRAMC + 0x08)	/* SDRAM Controller Configuration Register */
> +#define AT91_SDRAMC_LPR		(ATMEL_BASE_SDRAMC + 0x10)	/* SDRAM Controller Low Power Register */
> +#define AT91_SDRAMC_IER		(ATMEL_BASE_SDRAMC + 0x14)	/* SDRAM Controller Interrupt Enable Register */
> +#define AT91_SDRAMC_IDR		(ATMEL_BASE_SDRAMC + 0x18)	/* SDRAM Controller Interrupt Disable Register */
> +#define AT91_SDRAMC_IMR		(ATMEL_BASE_SDRAMC + 0x1C)	/* SDRAM Controller Interrupt Mask Register */
> +#define AT91_SDRAMC_ISR		(ATMEL_BASE_SDRAMC + 0x20)	/* SDRAM Controller Interrupt Status Register */
> +#define AT91_SDRAMC_MDR		(ATMEL_BASE_SDRAMC + 0x24)	/* SDRAM Memory Device Register */