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* [U-Boot] [PATCH] MX3: make additional hardware and clocks available
@ 2011-06-09  8:58 Helmut Raiger
  2011-06-09 11:58 ` Stefano Babic
  0 siblings, 1 reply; 3+ messages in thread
From: Helmut Raiger @ 2011-06-09  8:58 UTC (permalink / raw)
  To: u-boot

This patch is in preparation for the contribution of our board support. 
More to follow ...

diff --git a/arch/arm/cpu/arm1136/mx31/devices.c 
b/arch/arm/cpu/arm1136/mx31/devices.c
index 1e7d48f..ace48f4 100644
--- a/arch/arm/cpu/arm1136/mx31/devices.c
+++ b/arch/arm/cpu/arm1136/mx31/devices.c
@@ -38,7 +38,21 @@ void mx31_uart1_hw_init(void)
  }
  #endif

+#ifdef CONFIG_SYS_MX31_UART2
+void mx31_uart2_hw_init(void)
+{
+    /* setup pins for UART2 */
+    mx31_gpio_mux(MUX_RXD2__UART2_RXD_MUX);
+    mx31_gpio_mux(MUX_TXD2__UART2_TXD_MUX);
+    mx31_gpio_mux(MUX_RTS2__UART2_RTS_B);
+    mx31_gpio_mux(MUX_CTS2__UART2_CTS_B);
+}
+#endif
+
  #ifdef CONFIG_MXC_SPI
+/* note: putting several spi setups here makes no sense as they may differ
+ * at board level (physical pin SS0 of CSPI2 may aswell be used as SS0 
of CSPI3)
+ */
  void mx31_spi2_hw_init(void)
  {
      /* SPI2 */
diff --git a/arch/arm/cpu/arm1136/mx31/generic.c 
b/arch/arm/cpu/arm1136/mx31/generic.c
index 4ebf38d..92dd8d6 100644
--- a/arch/arm/cpu/arm1136/mx31/generic.c
+++ b/arch/arm/cpu/arm1136/mx31/generic.c
@@ -71,6 +71,18 @@ u32 mx31_get_ipg_clk(void)
      return freq;
  }

+/* hsp is the clock for the ipu */
+u32 mx31_get_hsp_clk(void)
+{
+      u32 freq = mx31_get_mcu_main_clk();
+      u32 pdr0 = __REG(CCM_PDR0);
+
+      /* divided by HSP_PODF in PDR0 */
+      freq /= ((pdr0 >> 11) & 0x7) + 1;
+
+      return freq;
+}
+
  void mx31_dump_clocks(void)
  {
      u32 cpufreq = mx31_get_mcu_main_clk();
diff --git a/arch/arm/include/asm/arch-mx31/clock.h 
b/arch/arm/include/asm/arch-mx31/clock.h
old mode 100644
new mode 100755
index 9f7ae80..980bec1
--- a/arch/arm/include/asm/arch-mx31/clock.h
+++ b/arch/arm/include/asm/arch-mx31/clock.h
@@ -26,10 +26,11 @@

  extern u32 mx31_get_ipg_clk(void);
  #define imx_get_uartclk mx31_get_ipg_clk
+extern u32 mx31_get_hsp_clk(void);
  extern void mx31_gpio_mux(unsigned long mode);
  extern void mx31_set_pad(enum iomux_pins pin, u32 config);
-
  void mx31_uart1_hw_init(void);
+void mx31_uart2_hw_init(void);
  void mx31_spi2_hw_init(void);
  void mxc_hw_watchdog_enable(void);
  void mxc_hw_watchdog_reset(void);
diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h 
b/arch/arm/include/asm/arch-mx31/imx-regs.h
old mode 100644
new mode 100755
index 306f966..af163cd
--- a/arch/arm/include/asm/arch-mx31/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx31/imx-regs.h
@@ -604,12 +604,41 @@ enum iomux_pins {

  /* Register offsets based on IOMUXC_BASE */
  /* 0x00 .. 0x7b */
+#define MUX_CTL_CSPI3_MISO        0x0c
+#define MUX_CTL_CSPI3_SCLK        0x0d
+#define MUX_CTL_CSPI3_SPI_RDY    0x0e
+#define MUX_CTL_TTM_PAD            0x0f
+#define MUX_CTL_ATA_RESET_B        0x10
+#define MUX_CTL_CE_CONTROL        0x11
+#define MUX_CTL_CLKSS            0x12
+#define MUX_CTL_CSPI3_MOSI        0x13
+
+#define MUX_CTL_SD1_DATA1    0x18
+#define MUX_CTL_SD1_DATA2    0x19
+#define MUX_CTL_SD1_DATA3    0x1a
+#define MUX_CTL_SD1_CMD        0x1d
+#define MUX_CTL_SD1_CLK        0x1e
+#define MUX_CTL_SD1_DATA0    0x1f
+
  #define MUX_CTL_USBH2_DATA1    0x40
  #define MUX_CTL_USBH2_DIR    0x44
  #define MUX_CTL_USBH2_STP    0x45
  #define MUX_CTL_USBH2_NXT    0x46
  #define MUX_CTL_USBH2_DATA0    0x47
  #define MUX_CTL_USBH2_CLK    0x4B
+
+#define MUX_CTL_TXD2        0x70
+#define MUX_CTL_RTS2        0x71
+#define MUX_CTL_CTS2        0x72
+#define MUX_CTL_BATT_LINE    0x73
+#define MUX_CTL_RI_DTE1        0x74
+#define MUX_CTL_DCD_DTE1    0x75
+#define MUX_CTL_DTR_DCE2    0x76
+#define MUX_CTL_RXD2        0x77
+#define MUX_CTL_RI_DCE1        0x78
+#define MUX_CTL_DCD_DCE1    0x79
+#define MUX_CTL_DTR_DTE1    0x7a
+#define MUX_CTL_DSR_DTE1    0x7b
  #define MUX_CTL_RTS1        0x7c
  #define MUX_CTL_CTS1        0x7d
  #define MUX_CTL_DTR_DCE1    0x7e
@@ -667,6 +696,11 @@ enum iomux_pins {
  #define MUX_RTS1__UART1_RTS_B    IOMUX_MODE(MUX_CTL_RTS1, MUX_CTL_FUNC)
  #define MUX_CTS1__UART1_CTS_B    IOMUX_MODE(MUX_CTL_CTS1, MUX_CTL_FUNC)

+#define MUX_RXD2__UART2_RXD_MUX    IOMUX_MODE(MUX_CTL_RXD2, MUX_CTL_FUNC)
+#define MUX_TXD2__UART2_TXD_MUX    IOMUX_MODE(MUX_CTL_TXD2, MUX_CTL_FUNC)
+#define MUX_RTS2__UART2_RTS_B    IOMUX_MODE(MUX_CTL_RTS2, MUX_CTL_FUNC)
+#define MUX_CTS2__UART2_CTS_B    IOMUX_MODE(MUX_CTL_CTS2, MUX_CTL_FUNC)
+
  #define MUX_CSPI2_SS0__CSPI2_SS0_B IOMUX_MODE(MUX_CTL_CSPI2_SS0, 
MUX_CTL_FUNC)
  #define MUX_CSPI2_SS1__CSPI2_SS1_B IOMUX_MODE(MUX_CTL_CSPI2_SS1, 
MUX_CTL_FUNC)
  #define MUX_CSPI2_SS2__CSPI2_SS2_B IOMUX_MODE(MUX_CTL_CSPI2_SS2, 
MUX_CTL_FUNC)
@@ -739,6 +773,10 @@ enum iomux_pins {
   */
  #define NFC_BASE_ADDR    0xB8000000

+/* SD card controller */
+#define SDHC1_BASE_ADDR        0x50004000
+#define SDHC2_BASE_ADDR        0x50008000
+
  /*
   * Internal RAM (16KB)
   */
diff --git a/include/fsl_pmic.h b/include/fsl_pmic.h
old mode 100644
new mode 100755
index e3abde6..e0ef810
--- a/include/fsl_pmic.h
+++ b/include/fsl_pmic.h
@@ -121,6 +121,8 @@ enum {
  /* Interrupt status 1 */
  #define RTCRSTI        (1 << 7)

+struct spi_slave *pmic_spi_probe(void);
+void pmic_spi_free(struct spi_slave *slave);
  void pmic_show_pmic_info(void);
  void pmic_reg_write(u32 reg, u32 value);
  u32 pmic_reg_read(u32 reg);


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^ permalink raw reply related	[flat|nested] 3+ messages in thread

* [U-Boot] [PATCH] MX3: make additional hardware and clocks available
  2011-06-09  8:58 [U-Boot] [PATCH] MX3: make additional hardware and clocks available Helmut Raiger
@ 2011-06-09 11:58 ` Stefano Babic
  2011-06-09 15:05   ` Helmut Raiger
  0 siblings, 1 reply; 3+ messages in thread
From: Stefano Babic @ 2011-06-09 11:58 UTC (permalink / raw)
  To: u-boot

On 06/09/2011 10:58 AM, Helmut Raiger wrote:
> This patch is in preparation for the contribution of our board support. 
> More to follow ...

Hi Helmut,

please replace this with a useful comment for the commit, describing
what the patch is thought to do or which issue should solve.

You must add your Signed-off-by line to your patch. Your patch seems
corrupt and cannot be apply without errors. Think about using git
send-email to post patches, as this avoid mail corruption generated by
mailer.

Please submit your patches together in a single patchset, including
support for your board. This makes everything more readable and easier
to understand why you need some changes.

You should run checkpatch before submitting patches and fix for errors
the tool reports:

ERROR: trailing whitespace
#40: FILE: arch/arm/cpu/arm1136/mx31/devices.c:54:
+ * at board level (physical pin SS0 of CSPI2 may aswell be used as SS0 $

ERROR: patch seems to be corrupt (line wrapped?)
#41: FILE: arch/arm/cpu/arm1136/mx31/devices.c:54:
of CSPI3)

ERROR: Missing Signed-off-by: line(s)

total: 3 errors, 0 warnings, 124 lines checked


> +
>   #ifdef CONFIG_MXC_SPI
> +/* note: putting several spi setups here makes no sense as they may differ
> + * at board level (physical pin SS0 of CSPI2 may aswell be used as SS0 
> of CSPI3)
> + */
>   void mx31_spi2_hw_init(void)
>   {
>       /* SPI2 */
> diff --git a/arch/arm/cpu/arm1136/mx31/generic.c 
> b/arch/arm/cpu/arm1136/mx31/generic.c
> index 4ebf38d..92dd8d6 100644
> --- a/arch/arm/cpu/arm1136/mx31/generic.c
> +++ b/arch/arm/cpu/arm1136/mx31/generic.c
> @@ -71,6 +71,18 @@ u32 mx31_get_ipg_clk(void)
>       return freq;
>   }
> 
> +/* hsp is the clock for the ipu */
> +u32 mx31_get_hsp_clk(void)
> +{
> +      u32 freq = mx31_get_mcu_main_clk();
> +      u32 pdr0 = __REG(CCM_PDR0);
> +
> +      /* divided by HSP_PODF in PDR0 */
> +      freq /= ((pdr0 >> 11) & 0x7) + 1;
> +
> +      return freq;
> +}

Use the same interface implemented on other i.MX processors (MX5, MX35)
to ask for clocks. If you need to get a clock, you should implement
mxc_get_clock().
If you need to get the ipu clock, does it mean you plan to change the
IPU driver, too ?


> diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h 
> b/arch/arm/include/asm/arch-mx31/imx-regs.h
> old mode 100644
> new mode 100755
> index 306f966..af163cd
> --- a/arch/arm/include/asm/arch-mx31/imx-regs.h
> +++ b/arch/arm/include/asm/arch-mx31/imx-regs.h
> @@ -604,12 +604,41 @@ enum iomux_pins {
> 
>   /* Register offsets based on IOMUXC_BASE */
>   /* 0x00 .. 0x7b */
> +#define MUX_CTL_CSPI3_MISO        0x0c
> +#define MUX_CTL_CSPI3_SCLK        0x0d
> +#define MUX_CTL_CSPI3_SPI_RDY    0x0e
> +#define MUX_CTL_TTM_PAD            0x0f
> +#define MUX_CTL_ATA_RESET_B        0x10
> +#define MUX_CTL_CE_CONTROL        0x11
> +#define MUX_CTL_CLKSS            0x12
> +#define MUX_CTL_CSPI3_MOSI        0x13
> +
> +#define MUX_CTL_SD1_DATA1    0x18
> +#define MUX_CTL_SD1_DATA2    0x19
> +#define MUX_CTL_SD1_DATA3    0x1a
> +#define MUX_CTL_SD1_CMD        0x1d
> +#define MUX_CTL_SD1_CLK        0x1e
> +#define MUX_CTL_SD1_DATA0    0x1f

It seems to me you define a lot of this stuff, but you use only a few of
them.


> diff --git a/include/fsl_pmic.h b/include/fsl_pmic.h
> old mode 100644
> new mode 100755
> index e3abde6..e0ef810
> --- a/include/fsl_pmic.h
> +++ b/include/fsl_pmic.h
> @@ -121,6 +121,8 @@ enum {
>   /* Interrupt status 1 */
>   #define RTCRSTI        (1 << 7)
> 
> +struct spi_slave *pmic_spi_probe(void);
> +void pmic_spi_free(struct spi_slave *slave);

The two functions are used internally to fsl_pmic. At least
pmic_spi_probe is automatically called by the read/write helper if the
spi slave is not set. Why do you need to export them ?

Best regards,
Stefano Babic

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^ permalink raw reply	[flat|nested] 3+ messages in thread

* [U-Boot] [PATCH] MX3: make additional hardware and clocks available
  2011-06-09 11:58 ` Stefano Babic
@ 2011-06-09 15:05   ` Helmut Raiger
  0 siblings, 0 replies; 3+ messages in thread
From: Helmut Raiger @ 2011-06-09 15:05 UTC (permalink / raw)
  To: u-boot

On 06/09/2011 01:58 PM, Stefano Babic wrote:
> On 06/09/2011 10:58 AM, Helmut Raiger wrote:
>> This patch is in preparation for the contribution of our board support.
>> More to follow ...
> Hi Helmut,
>
> please replace this with a useful comment for the commit, describing
> what the patch is thought to do or which issue should solve.
>
> You must add your Signed-off-by line to your patch. Your patch seems
> corrupt and cannot be apply without errors. Think about using git
> send-email to post patches, as this avoid mail corruption generated by
> mailer.
>
> Please submit your patches together in a single patchset, including
> support for your board. This makes everything more readable and easier
> to understand why you need some changes.
>
> You should run checkpatch before submitting patches and fix for errors
> the tool reports:
>
... looks like I hit a standard disclaimer, sorry for the noise, I'll check.

Helmut


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2011-06-09  8:58 [U-Boot] [PATCH] MX3: make additional hardware and clocks available Helmut Raiger
2011-06-09 11:58 ` Stefano Babic
2011-06-09 15:05   ` Helmut Raiger

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