[U-Boot] [PATCH 2/2] powerpc/85xx: Fix the work-arounds for errata SERDES-8 & SERDES-A001 on p4080

[Tabi Timur-B04825 <B04825@freescale.com>]

Kumar Gala wrote:
> Ok, Can you send a commit message for when I merge them or repost a merged patch.

powerpc/85xx: remove SERDES4 soft-reset work-around

Some P4080 rev1 errata work-arounds, notably erratum SERDES4, required a
bank soft-reset after the bank was configured and enabled, even though 
enabling a bank causes it to reset.  Because the reset was required for 
multiple errata, it was not properly enclosed in an #ifdef, and so was not 
removed with all the other rev1 errata work-arounds.

Erratum SERDES-8 says that the clocks for bank 3 needs to be enabled if
bank 2 is enabled, but this was not being done for SERDES protocols 0xF
and 0x10.  The bank reset also happened to enable bank 3 (apparently an
undocumented feature).  Simply removing the reset breaks these two protocols.

It turns out that every time we call enable_bank(), we do want at least 
one lane of the bank enabled, either because the bank is supposed to be 
enabled, or because we need the clock from that bank enabled.

For erratum SERDES-A001, we don't want to modify srds_lpd_b[] when we
call enable_bank(), because that array is used elsewhere to determine if
the bank is available.

Note that the side effect of these changes is that the work-arounds for 
these two errata are now linked.  Specifically, if SERDES-A001 is enabled, 
then we need SERDES-8 enabled as well.

Because this was the only SERDES bank soft-reset, there is no need to 
implement a work-around for erratum SERDES-A003.

Also fix an off-by-one error in a printf().

-- 
Timur Tabi
Linux kernel developer at Freescale