[U-Boot] [PATCH] ARM: MX5: Fix broken leftover TO-2 errata workaround

[Stefano Babic <sbabic@denx.de>]

On 07/14/2011 01:56 PM, David Jander wrote:
> This check was broken. r3 does not contain the silicon revision anymore, so
> we need to reload it.
> 
> Signed-off-by: David Jander <david@protonic.nl>
> ---

Hi David,

>  arch/arm/cpu/armv7/mx5/lowlevel_init.S |    4 +++-
>  1 files changed, 3 insertions(+), 1 deletions(-)
> 
> diff --git a/arch/arm/cpu/armv7/mx5/lowlevel_init.S b/arch/arm/cpu/armv7/mx5/lowlevel_init.S
> index ee4150d..6bb398f 100644
> --- a/arch/arm/cpu/armv7/mx5/lowlevel_init.S
> +++ b/arch/arm/cpu/armv7/mx5/lowlevel_init.S
> @@ -39,7 +39,9 @@
>  	orr r0, r0, #(1 << 23)		/* disable write allocate combine */
>  	orr r0, r0, #(1 << 22)		/* disable write allocate */
>  
> -	cmp r3, #0x10    /* r3 contains the silicon rev */
> +	ldr r1, =0x0
> +	ldr r3, [r1, #ROM_SI_REV]
> +	cmp r3, #0x10

You have to protect the code related to TO2 with CONFIG_MX51. As I can
see, the macro is called for MX.53, too, and the test produces wrong
results.

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: office at denx.de
=====================================================================