From mboxrd@z Thu Jan 1 00:00:00 1970 From: Simon Schwarz Date: Tue, 26 Jul 2011 10:47:47 +0200 Subject: [U-Boot] [PATCH V2 3/5] nand spl: add NAND Library to new SPL In-Reply-To: <9EA2B940-2FB6-41DE-8B35-68C7C0D4786B@googlemail.com> References: <1309270480-31918-1-git-send-email-schwarz@corscience.de> <1311617138-17041-1-git-send-email-simonschwarzcor@gmail.com> <1311617138-17041-4-git-send-email-simonschwarzcor@gmail.com> <9EA2B940-2FB6-41DE-8B35-68C7C0D4786B@googlemail.com> Message-ID: <4E2E7F33.3030700@gmail.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Dear Andreas, On 07/26/2011 07:59 AM, Andreas Bie?mann wrote: > Dear Simon, > > Am 25.07.2011 um 20:05 schrieb Simon Schwarz: > >> Insert some NAND driver sources into NAND SPL library. >> >> --- >> V1 changes: >> CHG Default to HW ecc in SPL build >> ADD nand_read_buf16 function, read buffer >> ADD omap_dev_ready function, indicte if chip is ready >> >> V2 changes: >> DEL GPMC_WAIT0_PIN_ACTIVE define >> CHG omap_dev_ready() renamed to omap_spl_dev_ready(), does not use the >> GPMC_WAIT0_PIN_ACTIVE-define anymore >> CHG ogpmc_read_buf16 renamed omap_spl_read_buf16 >> ADD omap_spl_read_buf, 8x buf read function >> ADD CONFIG_SPL_POWER_SUPPORT and CONFIG_SPL_NAND_SUPPORT to SPL >> CHG cosmetic >> CHG nand_base and nand_bbt aren't needed for SPL anymore >> CHG omap_nand_switch_ecc is not compiled for SPL >> ADD entry for CONFIG_SPL_POWER_SUPPORT and CONFIG_SPL_NAND_SUPPORT to README.SPL >> >> Transition from V1 to V2 also includes that this patch is now based on >> - the new SPL layout by Aneesh V and Daniel Schwierzeck >> - the OMAP4 SPL patches by Aneesh V >> >> This Patch is related to "[U-Boot,4/5] devkit8000 nand_spl: Add SPL NAND support >> to omap_gpmc driver" >> (http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102115) in V1 >> >> Signed-off-by: Simon Schwarz >> --- >> doc/README.SPL | 2 + >> drivers/mtd/nand/Makefile | 6 +++- >> drivers/mtd/nand/omap_gpmc.c | 69 ++++++++++++++++++++++++++++++++++++++++++ >> spl/Makefile | 2 + >> 4 files changed, 78 insertions(+), 1 deletions(-) > > > >> --- a/drivers/mtd/nand/omap_gpmc.c >> +++ b/drivers/mtd/nand/omap_gpmc.c >> @@ -61,6 +61,55 @@ static void omap_nand_hwcontrol(struct mtd_info *mtd, int32_t cmd, >> writeb(cmd, this->IO_ADDR_W); >> } > > > >> @@ -224,6 +273,8 @@ static void omap_enable_hwecc(struct mtd_info *mtd, int32_t mode) >> } >> } >> >> + > > This single line is unnecessary. deleted... > >> +#ifndef CONFIG_SPL_BUILD >> /* >> * omap_nand_switch_ecc - switch the ECC operation b/w h/w ecc and s/w ecc. >> * The default is to come up on s/w ecc >> @@ -280,6 +331,7 @@ void omap_nand_switch_ecc(int32_t hardware) >> > > regards > > Andreas Bie?mann regards Simon