[U-Boot] [PATCH] ARM926ejs: Add routines to invalidate D-Cache

[Hong Xu <hong.xu@atmel.com>]

Hi Albert,

On 08/08/2011 04:01 PM, Albert ARIBAUD wrote:
> Hi Hong Xu,
>
> Le 08/08/2011 05:20, Hong Xu a ?crit :
>> After DMA operation, we need to maintain D-Cache coherency.
>> So that the DCache must be invalidated (hence CPU will fetch

[...]

>> unaligned buffer and only round up/down the buffer address
>
>> + mva = start;
>> + if ((mva& (cache_line_len - 1)) != 0) {
>> + printf("WARNING: %s - unaligned buffer detected, starting "
>
> I'd rather have a message about "cache", not "buffer", e.g.
>
> printf("WARNING: %s - start address %x is not aligned\n"
> __FUNCTION__, start);

OK

>> + mva&= ~(cache_line_len - 1);
>> + }
>> + if ((stop& (cache_line_len - 1)) != 0) {
>> + printf("WARNING: %s - unaligned buffer detected, ending "
>> + "address: 0x%08x\n", __FUNCTION__, stop);
>
> Ditto.

OK

>> + stop = (stop | (cache_line_len - 1)) + 1;
>> + }
>> +
>> + while (mva< stop) {
>> + asm("mcr p15, 0, %0, c7, c6, 1" : : "r"(mva));
>> + mva += cache_line_len;
>> + }
>
> Thinking more about the degenerate case -- why not round *up* the start
> address, and round *down* the stop address, that is, *reduce* the area
> to the aligned portion rather than *expand* it into the unknown? That
> would make data in "partially owned" cache lines safe from unwanted
> invalidation. OTOH, it would not completely invalidate the caller's
> data, but at least the malfunction would appear in the faulty calling
> code, not elsewhere.
>
> Opinions?

Agree :)

BR,
Eric