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From: Hong Xu <hong.xu@atmel.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v4] ARM926ejs: Add routines to invalidate D-Cache
Date: Wed, 10 Aug 2011 14:17:28 +0800	[thread overview]
Message-ID: <4E422278.6030102@atmel.com> (raw)
In-Reply-To: <201108100752.12813.marek.vasut@gmail.com>

Hi Marek Vasut,

On 08/10/2011 01:52 PM, Marek Vasut wrote:
> On Wednesday, August 10, 2011 04:49:25 AM Hong Xu wrote:
>> After DMA operation, we need to maintain D-Cache coherency.
>> So that the DCache must be invalidated (hence CPU will fetch
>> data written by DMA controller from RAM).
>>
>> Tested on AT91SAM9261EK with Peripheral DMA controller.
>
> Hi Hong,
>
> one more thing, not that I want to disappoint you.

Not at all ;-)

To raise such discussion is not bad actually.

> Try to take a look at arch/arm/cpu/armv7/cache_v7.c
>
> Maybe we should do the same for arm926ejs -- have arch/arm/cpu/arm926ejs/cache.c
> -- containing arm926ejs specific cache management functions. That way,
> arch/arm/lib/cache.c won't become mess.
>
> What do you think ?

Basically I'm not quite sure about the design of ARM cache part. I 
noticed the work for armv7, but I've thought it as a special case 
because armv7 cache part looks more complicated than ARM926.

There are some ARM926 specific code in arch/arm/lib/cache.c; So I also 
put the stuff there. ;-)  I think Albert Aribaud or the original 
contributor of cache part shall have clearer view.So, I'll keep neutral 
to hear more ideas.

BR,
Eric

>>
>> Signed-off-by: Hong Xu<hong.xu@atmel.com>
>> Tested-by: Elen Song<elen.song@atmel.com>
>> CC: Albert Aribaud<albert.u.boot@aribaud.net>
>> CC: Aneesh V<aneesh@ti.com>
>> CC: Marek Vasut<marek.vasut@gmail.com>
>> CC: Reinhard Meyer<u-boot@emk-elektronik.de>
>> CC: Heiko Schocher<hs@denx.de>
>> ---
>> V2:
>>    Per Albert's suggestion, add invalidate_dcache_range
>>
>> V3:
>>    invalidate_dcache_range emits warning when detecting unaligned buffer
>>
>>    invalidate_dcache_range won't clean any adjacent cache line when
>> detecting unaligned buffer and only round up/down the buffer address
>>
>> v4:
>>    invalidate_dcache_range will emit clearer warning message
>>
>>    Per Albert's suggestion, if not alighed to cache line size, round up
>>    start address, round down stop addres
>>
>>    Per Marek Vasut's suggestion, use __func__ stated in C99
>>
>>   arch/arm/lib/cache.c |   58
>> ++++++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 58
>> insertions(+), 0 deletions(-)
>>

[...]

  parent reply	other threads:[~2011-08-10  6:17 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-08-10  2:49 [U-Boot] [PATCH v4] ARM926ejs: Add routines to invalidate D-Cache Hong Xu
2011-08-10  5:52 ` Marek Vasut
2011-08-10  5:56   ` Heiko Schocher
2011-08-10  6:17   ` Hong Xu [this message]
2011-08-10  6:36     ` Albert ARIBAUD
2011-08-10  6:41       ` Hong Xu
2011-08-10  7:13         ` Marek Vasut
2011-08-11  7:02       ` Aneesh V
2011-08-11  7:30         ` Marek Vasut
2011-08-12  9:57           ` Albert ARIBAUD
2011-08-12 10:04             ` Marek Vasut

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