From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefano Babic Date: Thu, 11 Aug 2011 11:22:35 +0200 Subject: [U-Boot] [PATCH 6/9] mx1: improve PLL freq computation In-Reply-To: <20110810203330.21204.88742.stgit@shuttle2.etheralp.ch> References: <20110810200828.21204.60050.stgit@shuttle2.etheralp.ch> <20110810203330.21204.88742.stgit@shuttle2.etheralp.ch> Message-ID: <4E439F5B.8050504@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 08/10/2011 10:33 PM, Eric Jarrige wrote: > Improve PLL freq computation by using the full resolution of the PLL registers Hi Eric, > + return (2*(u64)sys_clk_freq * (mfi*(mfd+1) + mfn))/((mfd+1)*(pd+1)); > +} > > - return (2*(CONFIG_SYSPLL_CLK_FREQ>>10)*( (mfi<<10) + (mfn<<10)/(mfd+1)))/(pd+1); Please run checkpatch on your patches for V2. I have not yet done, but this line will report missing spaces. Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office@denx.de =====================================================================