From mboxrd@z Thu Jan 1 00:00:00 1970 From: Albert ARIBAUD Date: Fri, 12 Aug 2011 11:57:08 +0200 Subject: [U-Boot] [PATCH v4] ARM926ejs: Add routines to invalidate D-Cache In-Reply-To: <201108110930.46500.marek.vasut@gmail.com> References: <1312944565-3279-1-git-send-email-hong.xu@atmel.com> <4E4226FE.4010805@aribaud.net> <4E437E7C.8030203@ti.com> <201108110930.46500.marek.vasut@gmail.com> Message-ID: <4E44F8F4.7030901@aribaud.net> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 11/08/2011 09:30, Marek Vasut wrote: > That's actually not a bad idea, but we need to be definitelly 100% sure it'll > work for all these different v5 and v6 cores ! That's what I'm afraid of: not all v5 or v6 cores may have the same set of cache functions. I'll have a look at various ARMv5 based cores to get a feel of the risk. Amicalement, -- Albert.