From mboxrd@z Thu Jan  1 00:00:00 1970
From: Sergei Shtylyov <sshtylyov@mvista.com>
Date: Tue, 16 Aug 2011 15:24:38 +0400
Subject: [U-Boot] [PATCH v2] armv7:cache: D cache line size read method
In-Reply-To: <1313490709-20128-1-git-send-email-l.majewski@samsung.com>
References: <1313137442-8378-1-git-send-email-l.majewski@samsung.com>
	<1313490709-20128-1-git-send-email-l.majewski@samsung.com>
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To: u-boot@lists.denx.de

Hello.

On 16-08-2011 14:31, Lukasz Majewski wrote:

> This commit adds support for reading the D cache line size for armv7
> architecture.

> The get_dcache_line_size() function is supposed to work in conjunction
> with memalign call to provide D cache aligned DMA buffers.

> Signed-off-by: Lukasz Majewski<l.majewski@samsung.com>
> Signed-off-by: Kyungmin Park<kyungmin.park@samsung.com>
> CC: Aneesh V<aneesh@ti.com>
> CC: Albert ARIBAUD<albert.u.boot@aribaud.net>
> ---
> Changes for v2:
> - Weak function get_dcache_line_size added to lib/cache.c for non armv7
> architectures
> ---
>   arch/arm/cpu/armv7/cache_v7.c |   15 +++++++++++++++
>   arch/arm/lib/cache.c          |   11 +++++++++++
>   include/common.h              |    1 +
>   3 files changed, 27 insertions(+), 0 deletions(-)

> diff --git a/arch/arm/cpu/armv7/cache_v7.c b/arch/arm/cpu/armv7/cache_v7.c
> index 3e1e1bf..0ff9a97 100644
> --- a/arch/arm/cpu/armv7/cache_v7.c
> +++ b/arch/arm/cpu/armv7/cache_v7.c
> @@ -246,6 +246,21 @@ static void v7_inval_tlb(void)
>   	CP15ISB;
>   }
>
> +/* Read the cache line size (in bytes) */
> +int get_dcache_line_size(void)
> +{
> +	u32 ccsidr, log2_line_len;

    An empty line wounldn't hurt here.

> +	puts("222\n");

    Shouldn't that have been deleted?

WBR, Sergei