[U-Boot] [PATCH 3/3 v2] ARM: ARM926EJS - Add cache operations

Hong Xu
2011-08-22T02:14:15Z

Hi Aneesh,

On 08/19/2011 10:20 PM, Aneesh V wrote:
> Hi Hong,
>
> On Friday 19 August 2011 02:53 PM, Hong Xu wrote:
>> Add a new file arch/arm/cpu/arm926ejs/cache.c and put cache operations
>> into this file.
>>
>> Signed-off-by: Hong Xu<hong.xu@atmel.com>
>> Tested-by: Elen Song<elen.song@atmel.com>
>> CC: Albert Aribaud<albert.u.boot@aribaud.net>
>> ---
>> Since V1
>> Modified copyright line
>> Fix for compiling warnings
>> Changed the way to use CONFIG_SYS_CACHELINE_SIZE
>> When unaligned buffer detected, emit ERROR instead of WARNING
>>
>> Do not make a common v5,v6 cache file. It seems arm946 is lack of
>> Test-and-Clean DCache operation. And maybe more differents...
>>
>> arch/arm/cpu/arm926ejs/Makefile | 2 +-
>> arch/arm/cpu/arm926ejs/cache.c | 135 +++++++++++++++++++++++++++++++++++++++
>> 2 files changed, 136 insertions(+), 1 deletions(-)
>> create mode 100644 arch/arm/cpu/arm926ejs/cache.c
>>

[...]

>> +
>> +/*
>> + * The buffer range to be flushed is [start, stop)
>> + */
>> +void flush_dcache_range(unsigned long start, unsigned long stop)
>> +{
>> + cache_range_op(start, stop, FLUSH_CACHE_OP);
>> +}
>> +
>> +void flush_dcache_all(void)
>> +{
>> + /*
>> + * ARM926EJ-S Technical Reference Manual, Chap 2.3.8
>> + * Clean& Invalidate the entire DCache
>> + */
>> + asm("0: mrc p15, 0, r15, c7, c14, 3\n\t" "bne 0b\n" : : : "memory");
>> + /* Drain WB */
>> + asm("mcr p15, 0, %0, c7, c10, 4\n" : : "r" (0));
>
> While looking at the manuals for the armv5 compatibility I stumbled
> upon the following in Chapter 2.3.8. Are you sure your flush_dcache_all
> implementation is correct? I suspect the above is flushing only one
> line?
>
> "The test, clean, and invalidate DCache instruction is the same as test
> and clean DCache,
> except that when the entire cache has been cleaned, it is invalidated.
> This means that
> you can use the following loop to clean and invalidate the entire
> DCache:
>
> tci_loop: MRC p15, 0, r15, c7, c14, 3
> BNE tci_loop
> "

As stated in the manual, we can use a loop to clean and invalidate the
entire DCache.

The "asm" statement above is a loop, isn't it? ;-)

BR,
Eric

> best regards,
> Aneesh