From mboxrd@z Thu Jan 1 00:00:00 1970 From: Matt Waddel Date: Sun, 21 Aug 2011 22:17:52 -0600 Subject: [U-Boot] Urgent : Regd. Cortex A9 quad core versatile express ca9x4_ct_vxp support in U-Boot.. In-Reply-To: <75A1E7F608B992488E5CE8CC49B9A35508712717@uswinsxch.open-silicon.com> References: <1313672214.1782.9.camel@sandeepk-OSIN> <75A1E7F608B992488E5CE8CC49B9A35508712717@uswinsxch.open-silicon.com> Message-ID: <4E51D870.2080501@canonical.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Sandeep, On 08/21/2011 12:37 AM, Sandeep Kumar wrote: > Hi all, > > I am trying to use U-Boot for cortex A9 quad core versatile express board. I saw that the support is already added > for that board but i am not able to find out the DDR initialization code > anywhere before using the stack. In fact i didn't find the DDR > initialization code anywhere for this board. This board also comes along > with a CLCD (color LCD) controller which is also not initialized > anywhere for this board. Is the support for this board is tested as > without initializing the DDR how the code relocation and execution from > DDR is possible. Sorry for not responding sooner. Currently the DDR setup is handled by the ARM boot monitor code and u-boot runs as the 2nd stage bootloader. So DDR setup is not done in u-boot. Also, the CLCD is not setup in u-boot. --Matt > > Any kind of pointers will be very helpful. > > > > > _______________________________________________ > U-Boot mailing list > U-Boot at lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot