From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefano Babic Date: Mon, 22 Aug 2011 14:46:07 +0200 Subject: [U-Boot] [PATCH] mx53: ddr3: Update DD3 initialization In-Reply-To: <1313760490-4293-1-git-send-email-festevam@gmail.com> References: <1313760490-4293-1-git-send-email-festevam@gmail.com> Message-ID: <4E524F8F.2070500@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 08/19/2011 03:28 PM, Fabio Estevam wrote: > Updated mx53 ddr3 script in order to align with the latest Freescale version from July 8, 2011: > -change ESDREF[REF_SEL]=01 (for 32KHz), from incorrect setting of 00 (64KHz) > -change DDR3 MR0 write to "setmem /32 0x63fd901c = 0x052080b0" from > "0x092080b0". This changes write recovery from 8 clocks to 6 clocks > (in line with ESDCFG1[tWR]) Applied to u-boot-imx, thanks. Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de =====================================================================