From mboxrd@z Thu Jan 1 00:00:00 1970 From: Aneesh V Date: Wed, 07 Sep 2011 19:32:52 +0530 Subject: [U-Boot] [RFC] Long term ARM ISA/cpu/core code organization In-Reply-To: <4E660765.8000204@aribaud.net> References: <1313033257-19847-1-git-send-email-hong.xu@atmel.com> <1315252207.5146.2.camel@konomi> <4E65BB6E.9090600@aribaud.net> <201109060840.57653.marek.vasut@gmail.com> <4E660765.8000204@aribaud.net> Message-ID: <4E67798C.2010600@ti.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Albert, On Tuesday 06 September 2011 05:13 PM, Albert ARIBAUD wrote: > (splitting this discussion between the patch question and longer term [snip ...] >>> To sum it up, we would have >>> >>> arch/arm/isa/armv5 (where ARMv5t ISA common code would reside, including >>> cache ops) >>> >>> arch/arm/isa/armv5/arm926ejs (where ARM926EJ-S cpu common code would >>> reside, including cache ops) >>> >>> arch/arm/isa/armv5/arm926ejs/orion5x (a personal favorite :) where >>> Orion5x core code would reside, including cache ops) >>> >>> Maybe we could even make do without the .../isa/... level and put ISAs >>> directly under ARM -- I don't think any ARM ISA will ever be named >>> 'include' or 'lib' or 'Makefile'. :) >>> >>> Comments? Here is a rather wild thought. I am not sure whether we can do such a thing for ARM alone. Just ideating:-) arch/arm/cpu// arch/arm/soc// Reasoning: 1. SoCs in same SoC family typically share/can-share a lot of code. 2. SoCs in same SoC family need not necessarily have the same cpu. Usually a new SoC brings in a new CPU while maintaining a lot of peripheral IPs from the previous generation. best regards, Aneesh