[U-Boot] [PATCH 07/15] iMX28: Add SPI driver

Marek Vasut
2011-09-12T04:06:41Z

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
---
drivers/spi/Makefile | 1 +
drivers/spi/mxs_spi.c | 172 +++++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 173 insertions(+), 0 deletions(-)
create mode 100644 drivers/spi/mxs_spi.c

diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 96c9642..9a0c475 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -36,6 +36,7 @@ COBJS-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o
COBJS-$(CONFIG_MPC52XX_SPI) += mpc52xx_spi.o
COBJS-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o
COBJS-$(CONFIG_MXC_SPI) += mxc_spi.o
+COBJS-$(CONFIG_MXS_SPI) += mxs_spi.o
COBJS-$(CONFIG_OC_TINY_SPI) += oc_tiny_spi.o
COBJS-$(CONFIG_OMAP3_SPI) += omap3_spi.o
COBJS-$(CONFIG_SOFT_SPI) += soft_spi.o
diff --git a/drivers/spi/mxs_spi.c b/drivers/spi/mxs_spi.c
new file mode 100644
index 0000000..f0d60d7
--- /dev/null
+++ b/drivers/spi/mxs_spi.c
@@ -0,0 +1,172 @@
+/*
+ * Freescale i.MX28 SPI driver
+ *
+ * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
+ * on behalf of DENX Software Engineering GmbH
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ * NOTE: This driver only supports the SPI-controller chipselects,
+ * GPIO driven chipselects are not supported.
+ */
+
+#include <common.h>
+#include <malloc.h>
+#include <spi.h>
+#include <asm/errno.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/sys_proto.h>
+
+#define MXS_SPI_MAX_TIMEOUT 1000000
+
+static inline struct mx28_ssp_regs *to_mxs_regs(struct spi_slave *slave)
+{
+ return (struct mx28_ssp_regs *)(MXS_SSP0_BASE + (slave->bus * 0x2000));
+}
+
+void spi_init(void)
+{
+}
+
+struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
+ unsigned int max_hz, unsigned int mode)
+{
+ struct spi_slave *slave;
+ struct mx28_ssp_regs *ssp_regs;
+ uint32_t reg = 0;
+
+ if (bus > 3) {
+ printf("MXS SPI: Max bus number is 3\n");
+ return NULL;
+ }
+
+ slave = malloc(sizeof(struct spi_slave));
+ if (!slave)
+ return NULL;
+
+ slave->bus = bus;
+ slave->cs = cs;
+
+ ssp_regs = to_mxs_regs(slave);
+
+ mx28_reset_block(&ssp_regs->hw_ssp_ctrl0_reg);
+
+ writel(SSP_CTRL0_BUS_WIDTH_ONE_BIT, &ssp_regs->hw_ssp_ctrl0);
+
+ reg = SSP_CTRL1_SSP_MODE_SPI | SSP_CTRL1_WORD_LENGTH_EIGHT_BITS;
+ reg |= (mode & SPI_CPOL) ? SSP_CTRL1_POLARITY : 0;
+ reg |= (mode & SPI_CPHA) ? SSP_CTRL1_PHASE : 0;
+ writel(reg, &ssp_regs->hw_ssp_ctrl1);
+
+ writel(0, &ssp_regs->hw_ssp_cmd0);
+
+ mx28_set_ssp_busclock(bus, max_hz / 1000);
+
+ return slave;
+}
+
+void spi_free_slave(struct spi_slave *slave)
+{
+ free(slave);
+}
+
+int spi_claim_bus(struct spi_slave *slave)
+{
+ return 0;
+}
+
+void spi_release_bus(struct spi_slave *slave)
+{
+}
+
+void mxs_spi_start_xfer(struct spi_slave *slave)
+{
+ struct mx28_ssp_regs *ssp_regs = to_mxs_regs(slave);
+ writel(SSP_CTRL0_LOCK_CS, &ssp_regs->hw_ssp_ctrl0_set);
+ writel(SSP_CTRL0_IGNORE_CRC, &ssp_regs->hw_ssp_ctrl0_clr);
+}
+
+void mxs_spi_end_xfer(struct spi_slave *slave)
+{
+ struct mx28_ssp_regs *ssp_regs = to_mxs_regs(slave);
+ writel(SSP_CTRL0_LOCK_CS, &ssp_regs->hw_ssp_ctrl0_clr);
+ writel(SSP_CTRL0_IGNORE_CRC, &ssp_regs->hw_ssp_ctrl0_set);
+}
+
+int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
+ const void *dout, void *din, unsigned long flags)
+{
+ struct mx28_ssp_regs *ssp_regs = to_mxs_regs(slave);
+ int len = bitlen / 8;
+ const char *tx = dout;
+ char *rx = din;
+
+ if (bitlen == 0)
+ return 0;
+
+ if (!rx && !tx)
+ return 0;
+
+ if (flags & SPI_XFER_BEGIN)
+ mxs_spi_start_xfer(slave);
+
+ while (len--) {
+ /* We transfer 1 byte */
+ writel(1, &ssp_regs->hw_ssp_xfer_size);
+
+ if ((flags & SPI_XFER_END) && !len)
+ mxs_spi_end_xfer(slave);
+
+ if (tx)
+ writel(SSP_CTRL0_READ, &ssp_regs->hw_ssp_ctrl0_clr);
+ else
+ writel(SSP_CTRL0_READ, &ssp_regs->hw_ssp_ctrl0_set);
+
+ writel(SSP_CTRL0_RUN, &ssp_regs->hw_ssp_ctrl0_set);
+
+ if (mx28_wait_mask_set(&ssp_regs->hw_ssp_ctrl0_reg,
+ SSP_CTRL0_RUN, MXS_SPI_MAX_TIMEOUT)) {
+ printf("MXS SPI: Timeout waiting for start\n");
+ return -1;
+ }
+
+ if (tx)
+ writel(*tx++, &ssp_regs->hw_ssp_data);
+
+ writel(SSP_CTRL0_DATA_XFER, &ssp_regs->hw_ssp_ctrl0_set);
+
+ if (rx) {
+ if (mx28_wait_mask_clr(&ssp_regs->hw_ssp_status_reg,
+ SSP_STATUS_FIFO_EMPTY, MXS_SPI_MAX_TIMEOUT)) {
+ printf("MXS SPI: Timeout waiting for data\n");
+ return -1;
+ }
+
+ *rx = readl(&ssp_regs->hw_ssp_data);
+ rx++;
+ }
+
+ if (mx28_wait_mask_clr(&ssp_regs->hw_ssp_ctrl0_reg,
+ SSP_CTRL0_RUN, MXS_SPI_MAX_TIMEOUT)) {
+ printf("MXS SPI: Timeout waiting for finish\n");
+ return -1;
+ }
+ }
+
+ return 0;
+}
--
1.7.5.4