From mboxrd@z Thu Jan 1 00:00:00 1970 From: Aneesh V Date: Wed, 14 Sep 2011 18:40:25 +0530 Subject: [U-Boot] [PATCH] tegra2: Enable data cache In-Reply-To: <201109082025.47884.vapier@gentoo.org> References: <1315520416-6407-1-git-send-email-sjg@chromium.org> <201109082025.47884.vapier@gentoo.org> Message-ID: <4E70A7C1.7050208@ti.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Mike, On Friday 09 September 2011 05:55 AM, Mike Frysinger wrote: > On Thursday, September 08, 2011 18:20:16 Simon Glass wrote: >> --- a/board/nvidia/common/board.c >> +++ b/board/nvidia/common/board.c >> @@ -307,3 +307,11 @@ int board_mmc_getcd(u8 *cd, struct mmc *mmc) >> return 0; >> } >> #endif >> + >> +#ifndef CONFIG_SYS_DCACHE_OFF >> +void enable_caches(void) >> +{ >> + /* Enable D-cache. I-cache is already enabled in start.S */ >> + dcache_enable(); >> +} >> +#endif > > not specific to your patch, but this seems kind of dumb to copy & paste the > same thing between all the arm sub arches/boards. why cant the default > enable_caches() look like this for arm: > void enable_caches(void) > { > #ifndef CONFIG_SYS_DCACHE_OFF > dcache_enable(); > #endif > #ifndef CONFIG_SYS_ICACHE_OFF > icache_enable(); > #endif > } That was how it was earlier. But then many boards were not cache ready and still didn't define CONFIG_SYS_DCACHE_OFF, so they were broken. So, the current situation is that the absence of CONFIG_SYS_DCACHE_OFF doesn't mean that the board is cache-ready. I like the suggestion made by Jason Liu, that of using CONFIG_SYS_DCACHE_ON instead. In the present situation ARM cpus that properly support cache handling seems to be in the minority, so CONFIG_SYS_DCACHE_ON may be more appropriate. But Wolfgang doesn't seem to like this. best regards, Aneesh