[U-Boot] [PATCH v7 1/3] MIPS: Ingenic XBurst Jz4740 processor support

Wolfgang Denk
2011-10-06T21:12:59Z

Dear Shinya Kuribayashi,

In message <4E886D01.5090003@pobox.com> you wrote:
> From: Xiangfu Liu <xiangfu@openmobilefree.net>
> Date: Fri, 19 Aug 2011 14:35:29 +0800
>
> Jz4740 is a multimedia application processor targeting for mobile
> devices like e-Dictionary, eBook, portable media player (PMP) and
> GPS navigator. Jz4740 is powered by Ingenic 360 MHz XBurst CPU core
> (JzRISC), in which RISC/SIMD/DSP hybrid instruction set architecture
> provides high integration, high performance and low power consumption.
>
> JzRISC incorporated in Jz4740 is the advanced and power-efficient
> 32-bit RISC core, compatible with MIPS32, with 16K I-Cache and 16K
> D-Cache, and can operate at speeds up to 400 MHz.
>
> On-chip modules such as LCD controller, embedded audio codec, multi-
> channel SAR-ADC, AC97/I2S controller and camera I/F offer a rich
> suite of peripherals for multimedia application. NAND controller
> (SLC/MLC), USB (host 1.1 and device 2.0), UART, I2C, SPI, etc. are
> also available.
>
> For more info about Ingenic XBurst Jz4740:
> http://en.ingenic.cn/eng/
> http://www.linux-mips.org/wiki/Ingenic
>
> This patch introduces XBurst CPU support in U-Boot. It's compatible
> with MIPS32, but requires a bit different cache maintenance, timer
> routines, and boot mechanism using USB boot tool, so XBurst support
> can go into a separate new home, cpu/xburst/.
>
> Signed-off-by: Xiangfu Liu <xiangfu@openmobilefree.net>
> Acked-by: Daniel <zpxu@ingenic.cn>
> Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
> ---
>
> Changes since v6:
>
> * Rebased against the latest U-Boot/MIPS codebase (the previous patches
> up to v6 were based on v1.1.6). $gp usage, relocation code and so on
> are getting synced with the current MIPS support in U-Boot.
>
> * Use -mach=mips32, pass -EL specifiers in PLATFORM_CPPFLAGS and
> PLATFORM_LDFLAGS. This port works in Little-endian.
>
> * Remove NAND-boot stuff. Those bits will be submitted as a nand_spl
> support, once this Jz4740 base support is merged.
>
> * jzsoc_init() is removed. calc_clocks() and rtc_init() will be
> called through board_early_init_f().
>
> * jz_serial.c is almost the same with standard ns16550 driver, but
> we dont' use it, because it need a special tweak for jz4740 like
> this:
>
> @@ -39,7 +39,11 @@ void NS16550_init (NS16550_t com_port, int baud_divisor)
> serial_out(0, &com_port->dlm);
> serial_out(UART_LCRVAL, &com_port->lcr);
> serial_out(UART_MCRVAL, &com_port->mcr);
> +#if defined(CONFIG_JZ4740) /* 0x10: for JZ4740 UART Module Enable */
> + serial_out(UART_FCRVAL | 0x10, &com_port->fcr);
> +#else
> serial_out(UART_FCRVAL, &com_port->fcr);
> +#endif
> serial_out(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr);
> serial_out(baud_divisor & 0xff, &com_port->dll);
> serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);
>
> If this is acceptable, we'll change to use standard ns16550 later.
>
> * Coding styles and build warnings fixed
>
> README | 1 +
> arch/mips/cpu/xburst/Makefile | 49 ++
> arch/mips/cpu/xburst/config.mk | 24 +
> arch/mips/cpu/xburst/cpu.c | 152 +++++
> arch/mips/cpu/xburst/jz4740.c | 248 ++++++++
> arch/mips/cpu/xburst/jz_serial.c | 114 ++++
> arch/mips/cpu/xburst/start.S | 171 ++++++
> arch/mips/cpu/xburst/timer.c | 169 ++++++
> arch/mips/include/asm/global_data.h | 11 +
> arch/mips/include/asm/jz4740.h | 1115 +++++++++++++++++++++++++++++++++++
> 10 files changed, 2054 insertions(+), 0 deletions(-)
> create mode 100644 arch/mips/cpu/xburst/Makefile
> create mode 100644 arch/mips/cpu/xburst/config.mk
> create mode 100644 arch/mips/cpu/xburst/cpu.c
> create mode 100644 arch/mips/cpu/xburst/jz4740.c
> create mode 100644 arch/mips/cpu/xburst/jz_serial.c
> create mode 100644 arch/mips/cpu/xburst/start.S
> create mode 100644 arch/mips/cpu/xburst/timer.c
> create mode 100644 arch/mips/include/asm/jz4740.h

Checkpatch says:

total: 6 errors, 94 warnings, 2077 lines checked

Please clean up and resubmit. Thanks.

Best regards,

Wolfgang Denk

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