[U-Boot] [PATCH 2/2] TT-01: add basic board support for HALE TT-01

Stefano Babic
2011-09-22T13:51:14Z

On 09/22/2011 02:12 PM, Helmut Raiger wrote:
> This adds basic board support for TT-01 based on
> the bluetechnix i.MX31 SOM. Currently only NOR-Flash
> boot is supported.
>
> Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>

Hi Helmut,

> ---
> Makefile | 4 +
> board/hale/tt01/Makefile | 53 +++++++++
> board/hale/tt01/config.mk | 1 +
> board/hale/tt01/tt01.c | 98 ++++++++++++++++
> include/configs/tt01.h | 283 +++++++++++++++++++++++++++++++++++++++++++++
> 5 files changed, 439 insertions(+), 0 deletions(-)
> create mode 100644 board/hale/tt01/Makefile
> create mode 100644 board/hale/tt01/config.mk
> create mode 100644 board/hale/tt01/tt01.c
> create mode 100644 include/configs/tt01.h

Your entry in MAINTAINERS file is missing and you have not updated
boards.cfg.

>
> diff --git a/Makefile b/Makefile
> index e9ba6a4..aaed9e6 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -908,6 +908,10 @@ mx31pdk_nand_config : unconfig
> fi
> @$(MKCONFIG) -n $@ -a mx31pdk arm arm1136 mx31pdk freescale mx31
>
> +tt01_config : unconfig
> + @mkdir -p $(obj)include
> + @$(MKCONFIG) -n $@ -a tt01 arm arm1136 tt01 hale mx31
> +

There is no need anymore to change the main Makefile - new boards are
added only to voards.cfg.

> #########################################################################
> ## ARM1176 Systems
> #########################################################################
> diff --git a/board/hale/tt01/Makefile b/board/hale/tt01/Makefile
> new file mode 100644
> index 0000000..18c83bb
> --- /dev/null
> +++ b/board/hale/tt01/Makefile
> @@ -0,0 +1,53 @@
> +##

Double #

> +# (C) Copyright 2009 HALE electronic <helmut.raiger@hale.at>
> +# (C) Copyright 2000-2006
> +# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
> +#
> +# See file CREDITS for list of people who contributed to this
> +# project.
> +#
> +# This program is free software; you can redistribute it and/or
> +# modify it under the terms of the GNU General Public License as
> +# published by the Free Software Foundation; either version 2 of
> +# the License, or (at your option) any later version.
> +#
> +# This program is distributed in the hope that it will be useful,
> +# but WITHOUT ANY WARRANTY; without even the implied warranty of
> +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> +# GNU General Public License for more details.
> +#
> +# You should have received a copy of the GNU General Public License
> +# along with this program; if not, write to the Free Software
> +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> +# MA 02111-1307 USA
> +#
> +
> +include $(TOPDIR)/config.mk
> +
> +LIB = $(obj)lib$(BOARD).o
> +
> +COBJS := tt01.o
> +# reuse the mx31pdk low-level setup
> +SOBJS := ../../freescale/mx31pdk/lowlevel_init.o

It is always a good idea to reuse code, but taking it to another board
seems hackish. Your board could become broken if the mx31pdk's
maintainer change his code.

Reading this file I do not see (except setting the AIPS) no good reason
to write this part in assembly. Everything can be done for example in
board_early_init_f, and even better we can rationalize this code and put
it into arch/cpu/arm1136/mx31.

> +#########################################################################
> diff --git a/board/hale/tt01/config.mk b/board/hale/tt01/config.mk
> new file mode 100644
> index 0000000..a7887ba
> --- /dev/null
> +++ b/board/hale/tt01/config.mk
> @@ -0,0 +1 @@
> +CONFIG_SYS_TEXT_BASE = 0xa0000000

There is no need for a config.mk => move CONFIG_SYS_TEXT_BASE into tt01.h

> +#include <common.h>
> +#include <netdev.h>
> +#include <command.h>
> +#include <asm/arch/clock.h>
> +#include <asm/io.h>
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +#define BOARD_STRING "Board: HALE TT-01"
> +
> +void tt01_spi3_hw_init(void)
> +{
> + /* CSPI3 */
> + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_CSPI3_MISO, MUX_CTL_FUNC));
> + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_CSPI3_MOSI, MUX_CTL_FUNC));
> + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_CSPI3_SCLK, MUX_CTL_FUNC));
> + /* CSPI3, SS0 = Atlas */
^-spaces instead of TAB

> + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_CSPI2_SS0, MUX_CTL_ALT1));
> +
> + /* start CSPI3 clock (3 = always on except if PLL off) */
> + writel(readl(CCM_CGR0) | (3 << 16), CCM_CGR0);
> +}
> +
> +int dram_init(void)
> +{
> + /* dram_init must store complete ramsize in gd->ram_size */
> + gd->ram_size = get_ram_size((long *) CONFIG_SYS_SDRAM_BASE,
> + PHYS_SDRAM_1_SIZE);
> + return 0;
> +}
> +
> +void dram_init_banksize(void)
> +{
> + gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
> + gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
> +}

If, as in your case, you have only one bank and CONFIG_SYS_SDRAM_BASE =
PHYS_SDRAM_1, you can drop completely this function. This is a weak
function, and your code duplicates the "standard" behavior in
arch/arm/lib/board.c

> +
> +int board_early_init_f(void)
> +{
> + /* CS4: FPGA incl. network controller */
> + __REG(CSCR_U(4)) = 0x0000dcf6;
> + __REG(CSCR_L(4)) = 0x444A4541;
> + __REG(CSCR_A(4)) = 0x44443302;

Time to fix access to WEIM. As access via __REG are not allowed for new
code, please add a structure for WEIM and use accessors to write these
registers.

> +
> +int board_init(void)
> +{
> + /* board id for linux, not in mach-types.h yet */
> + gd->bd->bi_arch_number = 3726; /* MACH_TYPE_TT01 = 3726 */

Then define CONFIG_MACH_TYPE into tt01.h and drop the previous lines.
The MACH-ID is automatically set by common code if CONFIG_MACH_TYPE is set.

> diff --git a/include/configs/tt01.h b/include/configs/tt01.h
> new file mode 100644
> index 0000000..22fb806
> --- /dev/null
> +++ b/include/configs/tt01.h
> @@ -0,0 +1,283 @@
> +/*
> + * (C) Copyright 2011 HALE electronic <helmut.raiger@hale.at>
> + * (C) Copyright 2008 Magnus Lilja <lilja.magnus@gmail.com>
> + *
> + * Configuration settings for the HALE TT-01 board.
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#ifndef __CONFIG_H
> +#define __CONFIG_H
> +
> +#include <asm/arch/imx-regs.h>
> +
> +/* High Level Configuration Options */
> +#define CONFIG_ARM1136
> +#define CONFIG_MX31
> +#define CONFIG_MX31_HCLK_FREQ 26000000
> +#define CONFIG_MX31_CLK32 32768
> +
> +#define CONFIG_DISPLAY_CPUINFO
> +#define CONFIG_DISPLAY_BOARDINFO
> +
> +#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
> +#define CONFIG_SETUP_MEMORY_TAGS
> +#define CONFIG_INITRD_TAG
> +
> +/*-----------------------------------------------------------------------
> + * Physical Memory Map:
> + * CS settings are defined by i.MX31:
> + * - CSD0 and CDS1 are 256MB each, starting at 0x80000000 and 0x9000000
> + * - CS0 and CS1 are 128MB each, at A0000000 and A8000000
> + * - CS2 to CS5 are 32MB each, at B0.., B2.., B4.., B6..
> + *
> + * HALE set-up of the bluetechnix board for now is:
> + * - 128MB DDR (2x64MB, 2x16bit), connected to 32bit DDR ram interface
> + * - NOR-Flash (Spansion 32MB MCP, Flash+16MB PSRAM), 16bit interface at CS0
> + * - S71WS256ND0BFWYM (and CS1 for 64MB S71WS512ND0 without PSRAM)
> + * the flash chip is a mirrorbit S29WS256N !
> + * - the PSRAM is hooked to CS5 (0xB6000000)
> + * - Intel Strata Flash PF48F2000P0ZB00, 16bit interface at (CS0 or) CS1
> + * - 64Mbit = 8MByte (will go away in the production set-up)
> + * - NAND-Flash NAND01GR3B2BZA6 at NAND-FC:
> + * 1Gbit=128MB, 2048+64 bytes/page, 64pages x 1024 blocks
> + * - Ethernet controller SMC9118 at CS4 via FPGA, 16bit interface
> + *
> + * u-boot will support the 32MB nor flash and the 128MB NAND flash, the PSRAM
> + * is not used right now. We should be able to reduce the SOM to NAND flash
> + * only and boot from there.

Ok, understood. You will use the SPL framework later.

> + */
> +#define CONFIG_NR_DRAM_BANKS 1
> +#define PHYS_SDRAM_1 CSD0_BASE
> +#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
> +
> +#define CONFIG_BOARD_EARLY_INIT_F
> +
> +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
> +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
> +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
> +#define CONFIG_SYS_GBL_DATA_OFFSET \
> + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
> +#define CONFIG_SYS_INIT_SP_ADDR \
> + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)
> +
> +/* default load address, 1MB up the road */
> +#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1+0x100000)

> +
> +/*-----------------------------------------------------------------------
> + * Stack sizes
> + *
> + * The stack sizes are set up in start.S using the settings below
> + */
> +#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
> +
> +/*
> + * Size of malloc() pool, make sure possible frame buffer fits
> + */
> +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 10*1024*1024)

10 MB for heap in bootloader ? Is it ok ? I am only asking if it is
really wanted.

> +/* Bytes reserved for initial data */
> +#define CONFIG_SYS_GBL_DATA_SIZE 128

This is automatically generated. You should not set it.

> +#define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */
> +#define CONFIG_FLASH_CFI_DRIVER /* Use drivers/cfi_flash.c */
> +#define CONFIG_FLASH_SPANSION_S29WS_N
> +/* TODO: bluetechnix did undefine these for some purpose

if you do not need to undefine, you can drop this comment. Maybe there
is no issues with lock/unlock mechanism with the flash you have chosen.

> +#define CONFIG_SYS_FLASH_BASE CS0_BASE
> +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
> +#define CONFIG_SYS_MAX_FLASH_SECT (254+8) /* max number of sectors per chip */
> +
> +/*---------------------------------------------------------------------------
> + * FLASH and environment organization, only the Spansion chip is supported:
> + * - it has 254 * 128kB + 8 * 32kB blocks
> + * - this setup uses 4*32k+128k as monitor space = 0xA000 0000 to 0xA003 FFFF
> + * and as environment 2 sections with 128k =
> + * A004 0000 to 0xA005 FFFF and 0xA006 0000 to 0xA007 FFFF
> + * - this could be less, but no-one is going to use the NOR flash anyway.
> + *
> + * Monitor is at the beginning of the NOR-Flash, 1MB reserved
> + */
> +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
> +#define CONFIG_SYS_MONITOR_LEN (1024 * 1024)
> +
> +#define CONFIG_ENV_IS_IN_FLASH 1
> +#define CONFIG_ENV_SECT_SIZE (128 * 1024)
> +#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE

Regarding your previous comment: you could set CONFIG_ENV_SIZE to a
smaller value as CONFIG_ENV_SECT_SIZE, and this can speed up get/set of
the environment. Or you could save the environment in tha last (smaller)
sectors.

> +
> +/* S29WS256N (inside S71WS256ND0) has 4 32KiB small sectors at both ends. */
> +#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)

The comment is correct, but it has nothing to do with the defines,
because you are not putting the env in the 32KiB sectors.

> +
> +/* Hardware drivers */
> +
> +/*
> + * on TT-01 UART1 pins are used by Audio, so we use UART2
> + * make sure that the transceiver is enabled during PL=1 for testing!

What does it mean PL=1 ?

> +/***********************************************************
> + * Command definition
> + ***********************************************************/
> +
> +#include <config_cmd_default.h>
> +
> +/* this is currently not supported, mxc_nand.c is too incomplete for it */

Only for my understanding: Which is the issue with mxc_nand.c ? At the
moment, we have several boards using it, and I wonder it is incomplete.
What do you mean ?

> +/* currently a default setting for booting via script is implemented
> + * set user to login name and serverip to tftp host, define your
> + * boot behaviour in bootscript.loginname
> + */

Wrong multiline comment. This must be fixed globally.

Best regards,
Stefano Babic

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