[U-Boot] [PATCH V3 2/3] mx31: add ESD control registers

Stefano Babic
2011-10-27T12:49:51Z

On 10/27/2011 01:31 PM, Helmut Raiger wrote:
> This allows to initialize DDR memory in C code.
> Currently all mx31 boards use assembler code (lowlevel_init.S)
>
> Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
> ---
> V2: new in V2
> V3: no changes
>
> arch/arm/include/asm/arch-mx31/imx-regs.h | 13 +++++++++++++
> 1 files changed, 13 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h b/arch/arm/include/asm/arch-mx31/imx-regs.h
> index f487975..afdaa1c 100644
> --- a/arch/arm/include/asm/arch-mx31/imx-regs.h
> +++ b/arch/arm/include/asm/arch-mx31/imx-regs.h
> @@ -522,6 +522,17 @@ struct mx31_weim {
> struct mx31_weim_cscr cscr[6];
> };
>
> +/* ESD control registers */
> +struct esdc_regs {
> + u32 ctl0;
> + u32 cfg0;
> + u32 ctl1;
> + u32 cfg1;
> + u32 misc;
> + u32 dly[5];
> + u32 dlyl;
> +};
> +
> #endif
>
> #define __REG(x) (*((volatile u32 *)(x)))
> @@ -600,6 +611,8 @@ struct mx31_weim {
> #define ESDCTL_BL(x) ((x) << 7)
> #define ESDCTL_PRCT(x) ((x) << 0)
>
> +#define ESDCTL_BASE_ADDR 0xB8001000
> +
> /* 13 fields of the upper CS control register */
> #define CSCR_U(sp, wp, bcd, bcs, psz, pme, sync, dol, \
> cnc, wsc, ew, wws, edc) \

Acked-by: Stefano Babic <sbabic@denx.de>

Best regards,
Stefano Babic

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