* [U-Boot] [PATCH 1/2] VIDEO: MX5: Switch MX5 to CONFIG_VIDEO
@ 2011-09-26 8:15 Stefano Babic
2011-09-26 8:15 ` [U-Boot] [PATCH 2/2] MX5: Switch vision2 " Stefano Babic
` (7 more replies)
0 siblings, 8 replies; 20+ messages in thread
From: Stefano Babic @ 2011-09-26 8:15 UTC (permalink / raw)
To: u-boot
The framebuffer driver for MX5 is based on CONFIG_LCD.
In the current implementation, there is a serious bug
because the required memory is allocated before
relocation, but the driver knows only later which is
the resolution of the display. The patch switches the driver
to CONFIG_VIDEO and the memory is allocated by the driver itself.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Anatolij Gustschin <agust@denx.de>
---
drivers/video/mxc_ipuv3_fb.c | 110 ++++++++++++++----------------------------
1 files changed, 36 insertions(+), 74 deletions(-)
diff --git a/drivers/video/mxc_ipuv3_fb.c b/drivers/video/mxc_ipuv3_fb.c
index a66981c..7f1d46e 100644
--- a/drivers/video/mxc_ipuv3_fb.c
+++ b/drivers/video/mxc_ipuv3_fb.c
@@ -27,7 +27,6 @@
* MA 02111-1307 USA
*/
-/* #define DEBUG */
#include <common.h>
#include <asm/errno.h>
#include <linux/string.h>
@@ -35,43 +34,17 @@
#include <linux/fb.h>
#include <asm/io.h>
#include <malloc.h>
-#include <lcd.h>
+#include <video_fb.h>
#include "videomodes.h"
#include "ipu.h"
#include "mxcfb.h"
-DECLARE_GLOBAL_DATA_PTR;
-
-void *lcd_base; /* Start of framebuffer memory */
-void *lcd_console_address; /* Start of console buffer */
-
-int lcd_line_length;
-int lcd_color_fg;
-int lcd_color_bg;
-
-short console_col;
-short console_row;
-
-vidinfo_t panel_info;
-
static int mxcfb_map_video_memory(struct fb_info *fbi);
static int mxcfb_unmap_video_memory(struct fb_info *fbi);
-void lcd_initcolregs(void)
-{
-}
-
-void lcd_setcolreg(ushort regno, ushort red, ushort green, ushort blue)
-{
-}
-
-void lcd_disable(void)
-{
-}
-
-void lcd_panel_disable(void)
-{
-}
+/* graphics setup */
+static GraphicDevice panel;
+struct fb_videomode *gmode;
void fb_videomode_to_var(struct fb_var_screeninfo *var,
const struct fb_videomode *mode)
@@ -440,8 +413,8 @@ static int mxcfb_map_video_memory(struct fb_info *fbi)
fbi->fix.line_length;
}
- fbi->screen_base = (char *)lcd_base;
- fbi->fix.smem_start = (unsigned long)lcd_base;
+ fbi->screen_base = (char *)malloc(fbi->fix.smem_len);
+ fbi->fix.smem_start = (unsigned long)fbi->screen_base;
if (fbi->screen_base == 0) {
puts("Unable to allocate framebuffer memory\n");
fbi->fix.smem_len = 0;
@@ -561,12 +534,12 @@ static int mxcfb_probe(u32 interface_pix_fmt, struct fb_videomode *mode)
mxcfb_info[mxcfbi->ipu_di] = fbi;
/* Need dummy values until real panel is configured */
- fbi->var.xres = 640;
- fbi->var.yres = 480;
- fbi->var.bits_per_pixel = 16;
mxcfbi->ipu_di_pix_fmt = interface_pix_fmt;
fb_videomode_to_var(&fbi->var, mode);
+ fbi->var.bits_per_pixel = 16;
+ fbi->fix.line_length = fbi->var.xres * (fbi->var.bits_per_pixel / 8);
+ fbi->fix.smem_len = fbi->var.yres_virtual * fbi->fix.line_length;
mxcfb_check_var(&fbi->var, fbi);
@@ -581,19 +554,16 @@ static int mxcfb_probe(u32 interface_pix_fmt, struct fb_videomode *mode)
mxcfb_set_par(fbi);
- /* Setting panel_info for lcd */
- panel_info.cmap = NULL;
- panel_info.vl_col = fbi->var.xres;
- panel_info.vl_row = fbi->var.yres;
- panel_info.vl_bpix = LCD_BPP;
+ panel.winSizeX = mode->xres;
+ panel.winSizeY = mode->yres;
+ panel.plnSizeX = mode->xres;
+ panel.plnSizeY = mode->yres;
- lcd_line_length = (panel_info.vl_col * NBITS(panel_info.vl_bpix)) / 8;
+ panel.frameAdrs = (u32)fbi->screen_base;
+ panel.memSize = fbi->screen_size;
- debug("MXC IPUV3 configured\n"
- "XRES = %d YRES = %d BitsXpixel = %d\n",
- panel_info.vl_col,
- panel_info.vl_row,
- panel_info.vl_bpix);
+ panel.gdfBytesPP = 2;
+ panel.gdfIndex = GDF_16BIT_565RGB;
ipu_dump_registers();
@@ -603,29 +573,7 @@ err0:
return ret;
}
-int overwrite_console(void)
-{
- /* Keep stdout / stderr on serial, our LCD is for splashscreen only */
- return 1;
-}
-
-void lcd_ctrl_init(void *lcdbase)
-{
- u32 mem_len = panel_info.vl_col *
- panel_info.vl_row *
- NBITS(panel_info.vl_bpix) / 8;
-
- /*
- * We rely on lcdbase being a physical address, i.e., either MMU off,
- * or 1-to-1 mapping. Might want to add some virt2phys here.
- */
- if (!lcdbase)
- return;
-
- memset(lcdbase, 0, mem_len);
-}
-
-int mx51_fb_init(struct fb_videomode *mode)
+void *video_hw_init(void)
{
int ret;
@@ -633,10 +581,24 @@ int mx51_fb_init(struct fb_videomode *mode)
if (ret)
puts("Error initializing IPU\n");
- lcd_base += 56;
+ ret = mxcfb_probe(IPU_PIX_FMT_RGB666, gmode);
+ debug("Framebuffer at 0x%x\n", (unsigned int)panel.frameAdrs);
- debug("Framebuffer at 0x%x\n", (unsigned int)lcd_base);
- ret = mxcfb_probe(IPU_PIX_FMT_RGB666, mode);
+ return (void *)&panel;
+}
- return ret;
+void video_set_lut(unsigned int index, /* color number */
+ unsigned char r, /* red */
+ unsigned char g, /* green */
+ unsigned char b /* blue */
+ )
+{
+ return;
+}
+
+int mx51_fb_init(struct fb_videomode *mode)
+{
+ gmode = mode;
+
+ return 0;
}
--
1.7.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [U-Boot] [PATCH 2/2] MX5: Switch vision2 to CONFIG_VIDEO
2011-09-26 8:15 [U-Boot] [PATCH 1/2] VIDEO: MX5: Switch MX5 to CONFIG_VIDEO Stefano Babic
@ 2011-09-26 8:15 ` Stefano Babic
2011-09-28 9:21 ` [U-Boot] [PATCH V2 1/4] VIDEO: MX5: Switch MX5 " Stefano Babic
` (6 subsequent siblings)
7 siblings, 0 replies; 20+ messages in thread
From: Stefano Babic @ 2011-09-26 8:15 UTC (permalink / raw)
To: u-boot
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Anatolij Gustschin <agust@denx.de>
---
board/ttcontrol/vision2/vision2.c | 36 +++++++++++++++++++++---------------
include/configs/vision2.h | 11 +++++------
2 files changed, 26 insertions(+), 21 deletions(-)
diff --git a/board/ttcontrol/vision2/vision2.c b/board/ttcontrol/vision2/vision2.c
index ebca7b6..ca0c100 100644
--- a/board/ttcontrol/vision2/vision2.c
+++ b/board/ttcontrol/vision2/vision2.c
@@ -600,6 +600,21 @@ int board_mmc_init(bd_t *bis)
}
#endif
+void lcd_enable(void)
+{
+ int ret;
+
+ mxc_request_iomux(MX51_PIN_DI1_PIN2, IOMUX_CONFIG_ALT0);
+ mxc_request_iomux(MX51_PIN_DI1_PIN3, IOMUX_CONFIG_ALT0);
+
+ gpio_set_value(2, 1);
+ mxc_request_iomux(MX51_PIN_GPIO1_2, IOMUX_CONFIG_ALT0);
+
+ ret = mx51_fb_init(&nec_nl6448bc26_09c);
+ if (ret)
+ puts("LCD cannot be configured\n");
+}
+
int board_early_init_f(void)
{
@@ -636,26 +651,15 @@ static void backlight(int on)
}
}
-void lcd_enable(void)
-{
- int ret;
-
- mxc_request_iomux(MX51_PIN_DI1_PIN2, IOMUX_CONFIG_ALT0);
- mxc_request_iomux(MX51_PIN_DI1_PIN3, IOMUX_CONFIG_ALT0);
-
- gpio_set_value(2, 1);
- mxc_request_iomux(MX51_PIN_GPIO1_2, IOMUX_CONFIG_ALT0);
-
- ret = mx51_fb_init(&nec_nl6448bc26_09c);
- if (ret)
- puts("LCD cannot be configured\n");
-}
-
int board_init(void)
{
/* address of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
+ lcd_enable();
+
+ backlight(1);
+
return 0;
}
@@ -676,6 +680,8 @@ int board_late_init(void)
udelay(2000);
#endif
+ setenv("stdout", "serial");
+
return 0;
}
diff --git a/include/configs/vision2.h b/include/configs/vision2.h
index c07cee4..5f7f8c1 100644
--- a/include/configs/vision2.h
+++ b/include/configs/vision2.h
@@ -47,7 +47,7 @@
/*
* Size of malloc() pool
*/
-#define CONFIG_SYS_MALLOC_LEN (2048 * 1024)
+#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
/*
* Hardware drivers
@@ -234,12 +234,11 @@
* Framebuffer and LCD
*/
#define CONFIG_PREBOOT
-#define CONFIG_LCD
+#define CONFIG_VIDEO
#define CONFIG_VIDEO_MX5
-#define CONFIG_SYS_CONSOLE_ENV_OVERWRITE
-#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
-#define CONFIG_SYS_CONSOLE_IS_IN_ENV
-#define LCD_BPP LCD_COLOR16
+#define CONFIG_CFB_CONSOLE
+#define CONFIG_VGA_AS_SINGLE_DEVICE
+#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_SPLASH_SCREEN
#define CONFIG_CMD_BMP
#define CONFIG_BMP_16BPP
--
1.7.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [U-Boot] [PATCH V2 1/4] VIDEO: MX5: Switch MX5 to CONFIG_VIDEO
2011-09-26 8:15 [U-Boot] [PATCH 1/2] VIDEO: MX5: Switch MX5 to CONFIG_VIDEO Stefano Babic
2011-09-26 8:15 ` [U-Boot] [PATCH 2/2] MX5: Switch vision2 " Stefano Babic
@ 2011-09-28 9:21 ` Stefano Babic
2011-10-05 22:50 ` Anatolij Gustschin
2011-09-28 9:21 ` [U-Boot] [PATCH V2 2/4] VIDEO: MX5: export pix format Stefano Babic
` (5 subsequent siblings)
7 siblings, 1 reply; 20+ messages in thread
From: Stefano Babic @ 2011-09-28 9:21 UTC (permalink / raw)
To: u-boot
The framebuffer driver for MX5 is based on CONFIG_LCD.
In the current implementation, there is a serious bug
because the required memory is allocated before
relocation, but the driver knows only later which is
the resolution of the display. The patch switches the driver
to CONFIG_VIDEO and the memory is allocated by the driver itself.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Anatolij Gustschin <agust@denx.de>
---
V2: patchset with modified Marek's patch to select display
drivers/video/mxc_ipuv3_fb.c | 110 ++++++++++++++----------------------------
1 files changed, 36 insertions(+), 74 deletions(-)
diff --git a/drivers/video/mxc_ipuv3_fb.c b/drivers/video/mxc_ipuv3_fb.c
index a66981c..7f1d46e 100644
--- a/drivers/video/mxc_ipuv3_fb.c
+++ b/drivers/video/mxc_ipuv3_fb.c
@@ -27,7 +27,6 @@
* MA 02111-1307 USA
*/
-/* #define DEBUG */
#include <common.h>
#include <asm/errno.h>
#include <linux/string.h>
@@ -35,43 +34,17 @@
#include <linux/fb.h>
#include <asm/io.h>
#include <malloc.h>
-#include <lcd.h>
+#include <video_fb.h>
#include "videomodes.h"
#include "ipu.h"
#include "mxcfb.h"
-DECLARE_GLOBAL_DATA_PTR;
-
-void *lcd_base; /* Start of framebuffer memory */
-void *lcd_console_address; /* Start of console buffer */
-
-int lcd_line_length;
-int lcd_color_fg;
-int lcd_color_bg;
-
-short console_col;
-short console_row;
-
-vidinfo_t panel_info;
-
static int mxcfb_map_video_memory(struct fb_info *fbi);
static int mxcfb_unmap_video_memory(struct fb_info *fbi);
-void lcd_initcolregs(void)
-{
-}
-
-void lcd_setcolreg(ushort regno, ushort red, ushort green, ushort blue)
-{
-}
-
-void lcd_disable(void)
-{
-}
-
-void lcd_panel_disable(void)
-{
-}
+/* graphics setup */
+static GraphicDevice panel;
+struct fb_videomode *gmode;
void fb_videomode_to_var(struct fb_var_screeninfo *var,
const struct fb_videomode *mode)
@@ -440,8 +413,8 @@ static int mxcfb_map_video_memory(struct fb_info *fbi)
fbi->fix.line_length;
}
- fbi->screen_base = (char *)lcd_base;
- fbi->fix.smem_start = (unsigned long)lcd_base;
+ fbi->screen_base = (char *)malloc(fbi->fix.smem_len);
+ fbi->fix.smem_start = (unsigned long)fbi->screen_base;
if (fbi->screen_base == 0) {
puts("Unable to allocate framebuffer memory\n");
fbi->fix.smem_len = 0;
@@ -561,12 +534,12 @@ static int mxcfb_probe(u32 interface_pix_fmt, struct fb_videomode *mode)
mxcfb_info[mxcfbi->ipu_di] = fbi;
/* Need dummy values until real panel is configured */
- fbi->var.xres = 640;
- fbi->var.yres = 480;
- fbi->var.bits_per_pixel = 16;
mxcfbi->ipu_di_pix_fmt = interface_pix_fmt;
fb_videomode_to_var(&fbi->var, mode);
+ fbi->var.bits_per_pixel = 16;
+ fbi->fix.line_length = fbi->var.xres * (fbi->var.bits_per_pixel / 8);
+ fbi->fix.smem_len = fbi->var.yres_virtual * fbi->fix.line_length;
mxcfb_check_var(&fbi->var, fbi);
@@ -581,19 +554,16 @@ static int mxcfb_probe(u32 interface_pix_fmt, struct fb_videomode *mode)
mxcfb_set_par(fbi);
- /* Setting panel_info for lcd */
- panel_info.cmap = NULL;
- panel_info.vl_col = fbi->var.xres;
- panel_info.vl_row = fbi->var.yres;
- panel_info.vl_bpix = LCD_BPP;
+ panel.winSizeX = mode->xres;
+ panel.winSizeY = mode->yres;
+ panel.plnSizeX = mode->xres;
+ panel.plnSizeY = mode->yres;
- lcd_line_length = (panel_info.vl_col * NBITS(panel_info.vl_bpix)) / 8;
+ panel.frameAdrs = (u32)fbi->screen_base;
+ panel.memSize = fbi->screen_size;
- debug("MXC IPUV3 configured\n"
- "XRES = %d YRES = %d BitsXpixel = %d\n",
- panel_info.vl_col,
- panel_info.vl_row,
- panel_info.vl_bpix);
+ panel.gdfBytesPP = 2;
+ panel.gdfIndex = GDF_16BIT_565RGB;
ipu_dump_registers();
@@ -603,29 +573,7 @@ err0:
return ret;
}
-int overwrite_console(void)
-{
- /* Keep stdout / stderr on serial, our LCD is for splashscreen only */
- return 1;
-}
-
-void lcd_ctrl_init(void *lcdbase)
-{
- u32 mem_len = panel_info.vl_col *
- panel_info.vl_row *
- NBITS(panel_info.vl_bpix) / 8;
-
- /*
- * We rely on lcdbase being a physical address, i.e., either MMU off,
- * or 1-to-1 mapping. Might want to add some virt2phys here.
- */
- if (!lcdbase)
- return;
-
- memset(lcdbase, 0, mem_len);
-}
-
-int mx51_fb_init(struct fb_videomode *mode)
+void *video_hw_init(void)
{
int ret;
@@ -633,10 +581,24 @@ int mx51_fb_init(struct fb_videomode *mode)
if (ret)
puts("Error initializing IPU\n");
- lcd_base += 56;
+ ret = mxcfb_probe(IPU_PIX_FMT_RGB666, gmode);
+ debug("Framebuffer at 0x%x\n", (unsigned int)panel.frameAdrs);
- debug("Framebuffer at 0x%x\n", (unsigned int)lcd_base);
- ret = mxcfb_probe(IPU_PIX_FMT_RGB666, mode);
+ return (void *)&panel;
+}
- return ret;
+void video_set_lut(unsigned int index, /* color number */
+ unsigned char r, /* red */
+ unsigned char g, /* green */
+ unsigned char b /* blue */
+ )
+{
+ return;
+}
+
+int mx51_fb_init(struct fb_videomode *mode)
+{
+ gmode = mode;
+
+ return 0;
}
--
1.7.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [U-Boot] [PATCH V2 2/4] VIDEO: MX5: export pix format
2011-09-26 8:15 [U-Boot] [PATCH 1/2] VIDEO: MX5: Switch MX5 to CONFIG_VIDEO Stefano Babic
2011-09-26 8:15 ` [U-Boot] [PATCH 2/2] MX5: Switch vision2 " Stefano Babic
2011-09-28 9:21 ` [U-Boot] [PATCH V2 1/4] VIDEO: MX5: Switch MX5 " Stefano Babic
@ 2011-09-28 9:21 ` Stefano Babic
2011-09-28 10:52 ` Marek Vasut
2011-09-28 9:21 ` [U-Boot] [PATCH V2 3/4] MX5: Switch vision2 to CONFIG_VIDEO Stefano Babic
` (4 subsequent siblings)
7 siblings, 1 reply; 20+ messages in thread
From: Stefano Babic @ 2011-09-28 9:21 UTC (permalink / raw)
To: u-boot
Pixel Format defines must be available for boards to set up
the right display. Move them and export in a new file.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Anatolij Gustschin <agust@denx.de>
CC: Marek Vasut <marek.vasut@gmail.com>
---
drivers/video/ipu.h | 46 +----------------------------
include/ipu_pixfmt.h | 80 ++++++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 81 insertions(+), 45 deletions(-)
create mode 100644 include/ipu_pixfmt.h
diff --git a/drivers/video/ipu.h b/drivers/video/ipu.h
index d8bc287..99a2491 100644
--- a/drivers/video/ipu.h
+++ b/drivers/video/ipu.h
@@ -31,6 +31,7 @@
#define __ASM_ARCH_IPU_H__
#include <linux/types.h>
+#include <ipu_pixfmt.h>
#define IDMA_CHAN_INVALID 0xFF
#define HIGH_RESOLUTION_WIDTH 1024
@@ -89,51 +90,6 @@ typedef enum {
IPU_PANEL_TFT,
} ipu_panel_t;
-/* IPU Pixel format definitions */
-#define fourcc(a, b, c, d)\
- (((__u32)(a)<<0)|((__u32)(b)<<8)|((__u32)(c)<<16)|((__u32)(d)<<24))
-
-/*
- * Pixel formats are defined with ASCII FOURCC code. The pixel format codes are
- * the same used by V4L2 API.
- */
-
-#define IPU_PIX_FMT_GENERIC fourcc('I', 'P', 'U', '0')
-#define IPU_PIX_FMT_GENERIC_32 fourcc('I', 'P', 'U', '1')
-#define IPU_PIX_FMT_LVDS666 fourcc('L', 'V', 'D', '6')
-#define IPU_PIX_FMT_LVDS888 fourcc('L', 'V', 'D', '8')
-
-#define IPU_PIX_FMT_RGB332 fourcc('R', 'G', 'B', '1') /*< 8 RGB-3-3-2 */
-#define IPU_PIX_FMT_RGB555 fourcc('R', 'G', 'B', 'O') /*< 16 RGB-5-5-5 */
-#define IPU_PIX_FMT_RGB565 fourcc('R', 'G', 'B', 'P') /*< 1 6 RGB-5-6-5 */
-#define IPU_PIX_FMT_RGB666 fourcc('R', 'G', 'B', '6') /*< 18 RGB-6-6-6 */
-#define IPU_PIX_FMT_BGR666 fourcc('B', 'G', 'R', '6') /*< 18 BGR-6-6-6 */
-#define IPU_PIX_FMT_BGR24 fourcc('B', 'G', 'R', '3') /*< 24 BGR-8-8-8 */
-#define IPU_PIX_FMT_RGB24 fourcc('R', 'G', 'B', '3') /*< 24 RGB-8-8-8 */
-#define IPU_PIX_FMT_BGR32 fourcc('B', 'G', 'R', '4') /*< 32 BGR-8-8-8-8 */
-#define IPU_PIX_FMT_BGRA32 fourcc('B', 'G', 'R', 'A') /*< 32 BGR-8-8-8-8 */
-#define IPU_PIX_FMT_RGB32 fourcc('R', 'G', 'B', '4') /*< 32 RGB-8-8-8-8 */
-#define IPU_PIX_FMT_RGBA32 fourcc('R', 'G', 'B', 'A') /*< 32 RGB-8-8-8-8 */
-#define IPU_PIX_FMT_ABGR32 fourcc('A', 'B', 'G', 'R') /*< 32 ABGR-8-8-8-8 */
-
-/* YUV Interleaved Formats */
-#define IPU_PIX_FMT_YUYV fourcc('Y', 'U', 'Y', 'V') /*< 16 YUV 4:2:2 */
-#define IPU_PIX_FMT_UYVY fourcc('U', 'Y', 'V', 'Y') /*< 16 YUV 4:2:2 */
-#define IPU_PIX_FMT_Y41P fourcc('Y', '4', '1', 'P') /*< 12 YUV 4:1:1 */
-#define IPU_PIX_FMT_YUV444 fourcc('Y', '4', '4', '4') /*< 24 YUV 4:4:4 */
-
-/* two planes -- one Y, one Cb + Cr interleaved */
-#define IPU_PIX_FMT_NV12 fourcc('N', 'V', '1', '2') /* 12 Y/CbCr 4:2:0 */
-
-#define IPU_PIX_FMT_GREY fourcc('G', 'R', 'E', 'Y') /*< 8 Greyscale */
-#define IPU_PIX_FMT_YVU410P fourcc('Y', 'V', 'U', '9') /*< 9 YVU 4:1:0 */
-#define IPU_PIX_FMT_YUV410P fourcc('Y', 'U', 'V', '9') /*< 9 YUV 4:1:0 */
-#define IPU_PIX_FMT_YVU420P fourcc('Y', 'V', '1', '2') /*< 12 YVU 4:2:0 */
-#define IPU_PIX_FMT_YUV420P fourcc('I', '4', '2', '0') /*< 12 YUV 4:2:0 */
-#define IPU_PIX_FMT_YUV420P2 fourcc('Y', 'U', '1', '2') /*< 12 YUV 4:2:0 */
-#define IPU_PIX_FMT_YVU422P fourcc('Y', 'V', '1', '6') /*< 16 YVU 4:2:2 */
-#define IPU_PIX_FMT_YUV422P fourcc('4', '2', '2', 'P') /*< 16 YUV 4:2:2 */
-
/*
* IPU Driver channels definitions.
* Note these are different from IDMA channels
diff --git a/include/ipu_pixfmt.h b/include/ipu_pixfmt.h
new file mode 100644
index 0000000..4e49d72
--- /dev/null
+++ b/include/ipu_pixfmt.h
@@ -0,0 +1,80 @@
+/*
+ * (C) Copyright 2011
+ * Stefano Babic, DENX Software Engineering, sbabic@denx.de
+ *
+ * Based on Linux IPU driver for MX51 (ipu.h):
+ *
+ * (C) Copyright 2005-2010 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __IPU_PIXFMT_H__
+#define __IPU_PIXFMT_H__
+
+/* IPU Pixel format definitions */
+#define fourcc(a, b, c, d)\
+ (((__u32)(a)<<0)|((__u32)(b)<<8)|((__u32)(c)<<16)|((__u32)(d)<<24))
+
+/*
+ * Pixel formats are defined with ASCII FOURCC code. The pixel format codes are
+ * the same used by V4L2 API.
+ */
+
+#define IPU_PIX_FMT_GENERIC fourcc('I', 'P', 'U', '0')
+#define IPU_PIX_FMT_GENERIC_32 fourcc('I', 'P', 'U', '1')
+#define IPU_PIX_FMT_LVDS666 fourcc('L', 'V', 'D', '6')
+#define IPU_PIX_FMT_LVDS888 fourcc('L', 'V', 'D', '8')
+
+#define IPU_PIX_FMT_RGB332 fourcc('R', 'G', 'B', '1') /*< 8 RGB-3-3-2 */
+#define IPU_PIX_FMT_RGB555 fourcc('R', 'G', 'B', 'O') /*< 16 RGB-5-5-5 */
+#define IPU_PIX_FMT_RGB565 fourcc('R', 'G', 'B', 'P') /*< 1 6 RGB-5-6-5 */
+#define IPU_PIX_FMT_RGB666 fourcc('R', 'G', 'B', '6') /*< 18 RGB-6-6-6 */
+#define IPU_PIX_FMT_BGR666 fourcc('B', 'G', 'R', '6') /*< 18 BGR-6-6-6 */
+#define IPU_PIX_FMT_BGR24 fourcc('B', 'G', 'R', '3') /*< 24 BGR-8-8-8 */
+#define IPU_PIX_FMT_RGB24 fourcc('R', 'G', 'B', '3') /*< 24 RGB-8-8-8 */
+#define IPU_PIX_FMT_BGR32 fourcc('B', 'G', 'R', '4') /*< 32 BGR-8-8-8-8 */
+#define IPU_PIX_FMT_BGRA32 fourcc('B', 'G', 'R', 'A') /*< 32 BGR-8-8-8-8 */
+#define IPU_PIX_FMT_RGB32 fourcc('R', 'G', 'B', '4') /*< 32 RGB-8-8-8-8 */
+#define IPU_PIX_FMT_RGBA32 fourcc('R', 'G', 'B', 'A') /*< 32 RGB-8-8-8-8 */
+#define IPU_PIX_FMT_ABGR32 fourcc('A', 'B', 'G', 'R') /*< 32 ABGR-8-8-8-8 */
+
+/* YUV Interleaved Formats */
+#define IPU_PIX_FMT_YUYV fourcc('Y', 'U', 'Y', 'V') /*< 16 YUV 4:2:2 */
+#define IPU_PIX_FMT_UYVY fourcc('U', 'Y', 'V', 'Y') /*< 16 YUV 4:2:2 */
+#define IPU_PIX_FMT_Y41P fourcc('Y', '4', '1', 'P') /*< 12 YUV 4:1:1 */
+#define IPU_PIX_FMT_YUV444 fourcc('Y', '4', '4', '4') /*< 24 YUV 4:4:4 */
+
+/* two planes -- one Y, one Cb + Cr interleaved */
+#define IPU_PIX_FMT_NV12 fourcc('N', 'V', '1', '2') /* 12 Y/CbCr 4:2:0 */
+
+#define IPU_PIX_FMT_GREY fourcc('G', 'R', 'E', 'Y') /*< 8 Greyscale */
+#define IPU_PIX_FMT_YVU410P fourcc('Y', 'V', 'U', '9') /*< 9 YVU 4:1:0 */
+#define IPU_PIX_FMT_YUV410P fourcc('Y', 'U', 'V', '9') /*< 9 YUV 4:1:0 */
+#define IPU_PIX_FMT_YVU420P fourcc('Y', 'V', '1', '2') /*< 12 YVU 4:2:0 */
+#define IPU_PIX_FMT_YUV420P fourcc('I', '4', '2', '0') /*< 12 YUV 4:2:0 */
+#define IPU_PIX_FMT_YUV420P2 fourcc('Y', 'U', '1', '2') /*< 12 YUV 4:2:0 */
+#define IPU_PIX_FMT_YVU422P fourcc('Y', 'V', '1', '6') /*< 16 YVU 4:2:2 */
+#define IPU_PIX_FMT_YUV422P fourcc('4', '2', '2', 'P') /*< 16 YUV 4:2:2 */
+
+int mx51_fb_init(struct fb_videomode *mode, uint8_t disp, uint32_t pixfmt);
+
+#endif
+
+
--
1.7.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [U-Boot] [PATCH V2 3/4] MX5: Switch vision2 to CONFIG_VIDEO
2011-09-26 8:15 [U-Boot] [PATCH 1/2] VIDEO: MX5: Switch MX5 to CONFIG_VIDEO Stefano Babic
` (2 preceding siblings ...)
2011-09-28 9:21 ` [U-Boot] [PATCH V2 2/4] VIDEO: MX5: export pix format Stefano Babic
@ 2011-09-28 9:21 ` Stefano Babic
2011-09-28 9:21 ` [U-Boot] [PATCH V2 4/4] MX5: Make IPU display output and pixel format configurable Stefano Babic
` (3 subsequent siblings)
7 siblings, 0 replies; 20+ messages in thread
From: Stefano Babic @ 2011-09-28 9:21 UTC (permalink / raw)
To: u-boot
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Anatolij Gustschin <agust@denx.de>
---
board/ttcontrol/vision2/vision2.c | 38 ++++++++++++++++++++----------------
include/configs/vision2.h | 11 ++++-----
2 files changed, 26 insertions(+), 23 deletions(-)
diff --git a/board/ttcontrol/vision2/vision2.c b/board/ttcontrol/vision2/vision2.c
index ebca7b6..dad77f3 100644
--- a/board/ttcontrol/vision2/vision2.c
+++ b/board/ttcontrol/vision2/vision2.c
@@ -43,8 +43,6 @@ DECLARE_GLOBAL_DATA_PTR;
static u32 system_rev;
-extern int mx51_fb_init(struct fb_videomode *mode);
-
static struct fb_videomode nec_nl6448bc26_09c = {
"NEC_NL6448BC26-09C",
60, /* Refresh */
@@ -600,6 +598,21 @@ int board_mmc_init(bd_t *bis)
}
#endif
+void lcd_enable(void)
+{
+ int ret;
+
+ mxc_request_iomux(MX51_PIN_DI1_PIN2, IOMUX_CONFIG_ALT0);
+ mxc_request_iomux(MX51_PIN_DI1_PIN3, IOMUX_CONFIG_ALT0);
+
+ gpio_set_value(2, 1);
+ mxc_request_iomux(MX51_PIN_GPIO1_2, IOMUX_CONFIG_ALT0);
+
+ ret = mx51_fb_init(&nec_nl6448bc26_09c);
+ if (ret)
+ puts("LCD cannot be configured\n");
+}
+
int board_early_init_f(void)
{
@@ -636,26 +649,15 @@ static void backlight(int on)
}
}
-void lcd_enable(void)
-{
- int ret;
-
- mxc_request_iomux(MX51_PIN_DI1_PIN2, IOMUX_CONFIG_ALT0);
- mxc_request_iomux(MX51_PIN_DI1_PIN3, IOMUX_CONFIG_ALT0);
-
- gpio_set_value(2, 1);
- mxc_request_iomux(MX51_PIN_GPIO1_2, IOMUX_CONFIG_ALT0);
-
- ret = mx51_fb_init(&nec_nl6448bc26_09c);
- if (ret)
- puts("LCD cannot be configured\n");
-}
-
int board_init(void)
{
/* address of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
+ lcd_enable();
+
+ backlight(1);
+
return 0;
}
@@ -676,6 +678,8 @@ int board_late_init(void)
udelay(2000);
#endif
+ setenv("stdout", "serial");
+
return 0;
}
diff --git a/include/configs/vision2.h b/include/configs/vision2.h
index c07cee4..5f7f8c1 100644
--- a/include/configs/vision2.h
+++ b/include/configs/vision2.h
@@ -47,7 +47,7 @@
/*
* Size of malloc() pool
*/
-#define CONFIG_SYS_MALLOC_LEN (2048 * 1024)
+#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
/*
* Hardware drivers
@@ -234,12 +234,11 @@
* Framebuffer and LCD
*/
#define CONFIG_PREBOOT
-#define CONFIG_LCD
+#define CONFIG_VIDEO
#define CONFIG_VIDEO_MX5
-#define CONFIG_SYS_CONSOLE_ENV_OVERWRITE
-#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
-#define CONFIG_SYS_CONSOLE_IS_IN_ENV
-#define LCD_BPP LCD_COLOR16
+#define CONFIG_CFB_CONSOLE
+#define CONFIG_VGA_AS_SINGLE_DEVICE
+#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_SPLASH_SCREEN
#define CONFIG_CMD_BMP
#define CONFIG_BMP_16BPP
--
1.7.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [U-Boot] [PATCH V2 4/4] MX5: Make IPU display output and pixel format configurable
2011-09-26 8:15 [U-Boot] [PATCH 1/2] VIDEO: MX5: Switch MX5 to CONFIG_VIDEO Stefano Babic
` (3 preceding siblings ...)
2011-09-28 9:21 ` [U-Boot] [PATCH V2 3/4] MX5: Switch vision2 to CONFIG_VIDEO Stefano Babic
@ 2011-09-28 9:21 ` Stefano Babic
2011-09-28 10:53 ` Marek Vasut
2011-10-05 22:44 ` [U-Boot] [PATCH v3 1/3] VIDEO: MX5: Switch MX5 to CONFIG_VIDEO Anatolij Gustschin
` (2 subsequent siblings)
7 siblings, 1 reply; 20+ messages in thread
From: Stefano Babic @ 2011-09-28 9:21 UTC (permalink / raw)
To: u-boot
From: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Anatolij Gustschin <agust@denx.de>
---
board/ttcontrol/vision2/vision2.c | 4 +++-
drivers/video/mxc_ipuv3_fb.c | 15 ++++++++++-----
2 files changed, 13 insertions(+), 6 deletions(-)
diff --git a/board/ttcontrol/vision2/vision2.c b/board/ttcontrol/vision2/vision2.c
index dad77f3..e496f64 100644
--- a/board/ttcontrol/vision2/vision2.c
+++ b/board/ttcontrol/vision2/vision2.c
@@ -39,6 +39,8 @@
#include <mc13892.h>
#include <linux/fb.h>
+#include <ipu_pixfmt.h>
+
DECLARE_GLOBAL_DATA_PTR;
static u32 system_rev;
@@ -608,7 +610,7 @@ void lcd_enable(void)
gpio_set_value(2, 1);
mxc_request_iomux(MX51_PIN_GPIO1_2, IOMUX_CONFIG_ALT0);
- ret = mx51_fb_init(&nec_nl6448bc26_09c);
+ ret = mx51_fb_init(&nec_nl6448bc26_09c, 0, IPU_PIX_FMT_RGB666);
if (ret)
puts("LCD cannot be configured\n");
}
diff --git a/drivers/video/mxc_ipuv3_fb.c b/drivers/video/mxc_ipuv3_fb.c
index 7f1d46e..510da74 100644
--- a/drivers/video/mxc_ipuv3_fb.c
+++ b/drivers/video/mxc_ipuv3_fb.c
@@ -44,7 +44,9 @@ static int mxcfb_unmap_video_memory(struct fb_info *fbi);
/* graphics setup */
static GraphicDevice panel;
-struct fb_videomode *gmode;
+static struct fb_videomode *gmode;
+static uint8_t gdisp;
+static uint32_t gpixfmt;
void fb_videomode_to_var(struct fb_var_screeninfo *var,
const struct fb_videomode *mode)
@@ -499,7 +501,8 @@ static struct fb_info *mxcfb_init_fbinfo(void)
*
* @return Appropriate error code to the kernel common code
*/
-static int mxcfb_probe(u32 interface_pix_fmt, struct fb_videomode *mode)
+static int mxcfb_probe(u32 interface_pix_fmt, uint8_t disp,
+ struct fb_videomode *mode)
{
struct fb_info *fbi;
struct mxcfb_info *mxcfbi;
@@ -523,7 +526,7 @@ static int mxcfb_probe(u32 interface_pix_fmt, struct fb_videomode *mode)
mxcfbi->blank = FB_BLANK_POWERDOWN;
}
- mxcfbi->ipu_di = 0;
+ mxcfbi->ipu_di = disp;
ipu_disp_set_global_alpha(mxcfbi->ipu_ch, 1, 0x80);
ipu_disp_set_color_key(mxcfbi->ipu_ch, 0, 0);
@@ -581,7 +584,7 @@ void *video_hw_init(void)
if (ret)
puts("Error initializing IPU\n");
- ret = mxcfb_probe(IPU_PIX_FMT_RGB666, gmode);
+ ret = mxcfb_probe(gpixfmt, gdisp, gmode);
debug("Framebuffer at 0x%x\n", (unsigned int)panel.frameAdrs);
return (void *)&panel;
@@ -596,9 +599,11 @@ void video_set_lut(unsigned int index, /* color number */
return;
}
-int mx51_fb_init(struct fb_videomode *mode)
+int mx51_fb_init(struct fb_videomode *mode, uint8_t disp, uint32_t pixfmt)
{
gmode = mode;
+ gdisp = disp;
+ gpixfmt = pixfmt;
return 0;
}
--
1.7.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [U-Boot] [PATCH V2 2/4] VIDEO: MX5: export pix format
2011-09-28 9:21 ` [U-Boot] [PATCH V2 2/4] VIDEO: MX5: export pix format Stefano Babic
@ 2011-09-28 10:52 ` Marek Vasut
0 siblings, 0 replies; 20+ messages in thread
From: Marek Vasut @ 2011-09-28 10:52 UTC (permalink / raw)
To: u-boot
On Wednesday, September 28, 2011 11:21:16 AM Stefano Babic wrote:
> Pixel Format defines must be available for boards to set up
> the right display. Move them and export in a new file.
>
> Signed-off-by: Stefano Babic <sbabic@denx.de>
> CC: Anatolij Gustschin <agust@denx.de>
> CC: Marek Vasut <marek.vasut@gmail.com>
> ---
Thanks for this patch.
Acked-by: Marek Vasut <marek.vasut@gmail.com>
^ permalink raw reply [flat|nested] 20+ messages in thread
* [U-Boot] [PATCH V2 4/4] MX5: Make IPU display output and pixel format configurable
2011-09-28 9:21 ` [U-Boot] [PATCH V2 4/4] MX5: Make IPU display output and pixel format configurable Stefano Babic
@ 2011-09-28 10:53 ` Marek Vasut
0 siblings, 0 replies; 20+ messages in thread
From: Marek Vasut @ 2011-09-28 10:53 UTC (permalink / raw)
To: u-boot
On Wednesday, September 28, 2011 11:21:18 AM Stefano Babic wrote:
> From: Marek Vasut <marek.vasut@gmail.com>
>
> Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
> Signed-off-by: Stefano Babic <sbabic@denx.de>
> CC: Anatolij Gustschin <agust@denx.de>
> ---
Acked-by: Marek Vasut <marek.vasut@gmail.com>
^ permalink raw reply [flat|nested] 20+ messages in thread
* [U-Boot] [PATCH v3 1/3] VIDEO: MX5: Switch MX5 to CONFIG_VIDEO
2011-09-26 8:15 [U-Boot] [PATCH 1/2] VIDEO: MX5: Switch MX5 to CONFIG_VIDEO Stefano Babic
` (4 preceding siblings ...)
2011-09-28 9:21 ` [U-Boot] [PATCH V2 4/4] MX5: Make IPU display output and pixel format configurable Stefano Babic
@ 2011-10-05 22:44 ` Anatolij Gustschin
2011-10-06 7:56 ` Stefano Babic
2011-10-06 17:32 ` Anatolij Gustschin
2011-10-05 22:44 ` [U-Boot] [PATCH v3 2/3] VIDEO: MX5: export pix format Anatolij Gustschin
2011-10-05 22:44 ` [U-Boot] [PATCH v3 3/3] MX5: Make IPU display output and pixel format configurable Anatolij Gustschin
7 siblings, 2 replies; 20+ messages in thread
From: Anatolij Gustschin @ 2011-10-05 22:44 UTC (permalink / raw)
To: u-boot
From: Stefano Babic <sbabic@denx.de>
The framebuffer driver for MX5 is based on CONFIG_LCD.
In the current implementation, there is a serious bug
because the required memory is allocated before
relocation, but the driver knows only later which is
the resolution of the display. The patch switches the driver
to CONFIG_VIDEO and the memory is allocated by the driver itself.
We also need to switch the vision2 board code and config file
in the same commit so that this commit will be bisectable.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
---
V3: patches 1 and 3 of the previous patchset combined to single
patch to make this commit bisectable
V2: patchset with modified Marek's patch to select display
board/ttcontrol/vision2/vision2.c | 36 +++++++-----
drivers/video/mxc_ipuv3_fb.c | 110 ++++++++++++-------------------------
include/configs/vision2.h | 11 ++--
3 files changed, 62 insertions(+), 95 deletions(-)
diff --git a/board/ttcontrol/vision2/vision2.c b/board/ttcontrol/vision2/vision2.c
index ebca7b6..ca0c100 100644
--- a/board/ttcontrol/vision2/vision2.c
+++ b/board/ttcontrol/vision2/vision2.c
@@ -600,6 +600,21 @@ int board_mmc_init(bd_t *bis)
}
#endif
+void lcd_enable(void)
+{
+ int ret;
+
+ mxc_request_iomux(MX51_PIN_DI1_PIN2, IOMUX_CONFIG_ALT0);
+ mxc_request_iomux(MX51_PIN_DI1_PIN3, IOMUX_CONFIG_ALT0);
+
+ gpio_set_value(2, 1);
+ mxc_request_iomux(MX51_PIN_GPIO1_2, IOMUX_CONFIG_ALT0);
+
+ ret = mx51_fb_init(&nec_nl6448bc26_09c);
+ if (ret)
+ puts("LCD cannot be configured\n");
+}
+
int board_early_init_f(void)
{
@@ -636,26 +651,15 @@ static void backlight(int on)
}
}
-void lcd_enable(void)
-{
- int ret;
-
- mxc_request_iomux(MX51_PIN_DI1_PIN2, IOMUX_CONFIG_ALT0);
- mxc_request_iomux(MX51_PIN_DI1_PIN3, IOMUX_CONFIG_ALT0);
-
- gpio_set_value(2, 1);
- mxc_request_iomux(MX51_PIN_GPIO1_2, IOMUX_CONFIG_ALT0);
-
- ret = mx51_fb_init(&nec_nl6448bc26_09c);
- if (ret)
- puts("LCD cannot be configured\n");
-}
-
int board_init(void)
{
/* address of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
+ lcd_enable();
+
+ backlight(1);
+
return 0;
}
@@ -676,6 +680,8 @@ int board_late_init(void)
udelay(2000);
#endif
+ setenv("stdout", "serial");
+
return 0;
}
diff --git a/drivers/video/mxc_ipuv3_fb.c b/drivers/video/mxc_ipuv3_fb.c
index a66981c..eafacef 100644
--- a/drivers/video/mxc_ipuv3_fb.c
+++ b/drivers/video/mxc_ipuv3_fb.c
@@ -27,7 +27,6 @@
* MA 02111-1307 USA
*/
-/* #define DEBUG */
#include <common.h>
#include <asm/errno.h>
#include <linux/string.h>
@@ -35,43 +34,17 @@
#include <linux/fb.h>
#include <asm/io.h>
#include <malloc.h>
-#include <lcd.h>
+#include <video_fb.h>
#include "videomodes.h"
#include "ipu.h"
#include "mxcfb.h"
-DECLARE_GLOBAL_DATA_PTR;
-
-void *lcd_base; /* Start of framebuffer memory */
-void *lcd_console_address; /* Start of console buffer */
-
-int lcd_line_length;
-int lcd_color_fg;
-int lcd_color_bg;
-
-short console_col;
-short console_row;
-
-vidinfo_t panel_info;
-
static int mxcfb_map_video_memory(struct fb_info *fbi);
static int mxcfb_unmap_video_memory(struct fb_info *fbi);
-void lcd_initcolregs(void)
-{
-}
-
-void lcd_setcolreg(ushort regno, ushort red, ushort green, ushort blue)
-{
-}
-
-void lcd_disable(void)
-{
-}
-
-void lcd_panel_disable(void)
-{
-}
+/* graphics setup */
+static GraphicDevice panel;
+struct fb_videomode *gmode;
void fb_videomode_to_var(struct fb_var_screeninfo *var,
const struct fb_videomode *mode)
@@ -440,8 +413,8 @@ static int mxcfb_map_video_memory(struct fb_info *fbi)
fbi->fix.line_length;
}
- fbi->screen_base = (char *)lcd_base;
- fbi->fix.smem_start = (unsigned long)lcd_base;
+ fbi->screen_base = (char *)malloc(fbi->fix.smem_len);
+ fbi->fix.smem_start = (unsigned long)fbi->screen_base;
if (fbi->screen_base == 0) {
puts("Unable to allocate framebuffer memory\n");
fbi->fix.smem_len = 0;
@@ -561,12 +534,12 @@ static int mxcfb_probe(u32 interface_pix_fmt, struct fb_videomode *mode)
mxcfb_info[mxcfbi->ipu_di] = fbi;
/* Need dummy values until real panel is configured */
- fbi->var.xres = 640;
- fbi->var.yres = 480;
- fbi->var.bits_per_pixel = 16;
mxcfbi->ipu_di_pix_fmt = interface_pix_fmt;
fb_videomode_to_var(&fbi->var, mode);
+ fbi->var.bits_per_pixel = 16;
+ fbi->fix.line_length = fbi->var.xres * (fbi->var.bits_per_pixel / 8);
+ fbi->fix.smem_len = fbi->var.yres_virtual * fbi->fix.line_length;
mxcfb_check_var(&fbi->var, fbi);
@@ -581,19 +554,16 @@ static int mxcfb_probe(u32 interface_pix_fmt, struct fb_videomode *mode)
mxcfb_set_par(fbi);
- /* Setting panel_info for lcd */
- panel_info.cmap = NULL;
- panel_info.vl_col = fbi->var.xres;
- panel_info.vl_row = fbi->var.yres;
- panel_info.vl_bpix = LCD_BPP;
+ panel.winSizeX = mode->xres;
+ panel.winSizeY = mode->yres;
+ panel.plnSizeX = mode->xres;
+ panel.plnSizeY = mode->yres;
- lcd_line_length = (panel_info.vl_col * NBITS(panel_info.vl_bpix)) / 8;
+ panel.frameAdrs = (u32)fbi->screen_base;
+ panel.memSize = fbi->screen_size;
- debug("MXC IPUV3 configured\n"
- "XRES = %d YRES = %d BitsXpixel = %d\n",
- panel_info.vl_col,
- panel_info.vl_row,
- panel_info.vl_bpix);
+ panel.gdfBytesPP = 2;
+ panel.gdfIndex = GDF_16BIT_565RGB;
ipu_dump_registers();
@@ -603,29 +573,7 @@ err0:
return ret;
}
-int overwrite_console(void)
-{
- /* Keep stdout / stderr on serial, our LCD is for splashscreen only */
- return 1;
-}
-
-void lcd_ctrl_init(void *lcdbase)
-{
- u32 mem_len = panel_info.vl_col *
- panel_info.vl_row *
- NBITS(panel_info.vl_bpix) / 8;
-
- /*
- * We rely on lcdbase being a physical address, i.e., either MMU off,
- * or 1-to-1 mapping. Might want to add some virt2phys here.
- */
- if (!lcdbase)
- return;
-
- memset(lcdbase, 0, mem_len);
-}
-
-int mx51_fb_init(struct fb_videomode *mode)
+void *video_hw_init(void)
{
int ret;
@@ -633,10 +581,24 @@ int mx51_fb_init(struct fb_videomode *mode)
if (ret)
puts("Error initializing IPU\n");
- lcd_base += 56;
+ ret = mxcfb_probe(IPU_PIX_FMT_RGB666, gmode);
+ debug("Framebuffer at 0x%x\n", (unsigned int)panel.frameAdrs);
- debug("Framebuffer at 0x%x\n", (unsigned int)lcd_base);
- ret = mxcfb_probe(IPU_PIX_FMT_RGB666, mode);
+ return (void *)&panel;
+}
- return ret;
+void video_set_lut(unsigned int index, /* color number */
+ unsigned char r, /* red */
+ unsigned char g, /* green */
+ unsigned char b /* blue */
+ )
+{
+ return;
+}
+
+int mx51_fb_init(struct fb_videomode *mode)
+{
+ gmode = mode;
+
+ return 0;
}
diff --git a/include/configs/vision2.h b/include/configs/vision2.h
index 540dfa9..3b42afc 100644
--- a/include/configs/vision2.h
+++ b/include/configs/vision2.h
@@ -46,7 +46,7 @@
/*
* Size of malloc() pool
*/
-#define CONFIG_SYS_MALLOC_LEN (2048 * 1024)
+#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
/*
* Hardware drivers
@@ -207,12 +207,11 @@
* Framebuffer and LCD
*/
#define CONFIG_PREBOOT
-#define CONFIG_LCD
+#define CONFIG_VIDEO
#define CONFIG_VIDEO_MX5
-#define CONFIG_SYS_CONSOLE_ENV_OVERWRITE
-#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
-#define CONFIG_SYS_CONSOLE_IS_IN_ENV
-#define LCD_BPP LCD_COLOR16
+#define CONFIG_CFB_CONSOLE
+#define CONFIG_VGA_AS_SINGLE_DEVICE
+#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_SPLASH_SCREEN
#define CONFIG_CMD_BMP
#define CONFIG_BMP_16BPP
--
1.7.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [U-Boot] [PATCH v3 2/3] VIDEO: MX5: export pix format
2011-09-26 8:15 [U-Boot] [PATCH 1/2] VIDEO: MX5: Switch MX5 to CONFIG_VIDEO Stefano Babic
` (5 preceding siblings ...)
2011-10-05 22:44 ` [U-Boot] [PATCH v3 1/3] VIDEO: MX5: Switch MX5 to CONFIG_VIDEO Anatolij Gustschin
@ 2011-10-05 22:44 ` Anatolij Gustschin
2011-10-06 7:56 ` Stefano Babic
2011-10-06 17:33 ` Anatolij Gustschin
2011-10-05 22:44 ` [U-Boot] [PATCH v3 3/3] MX5: Make IPU display output and pixel format configurable Anatolij Gustschin
7 siblings, 2 replies; 20+ messages in thread
From: Anatolij Gustschin @ 2011-10-05 22:44 UTC (permalink / raw)
To: u-boot
From: Stefano Babic <sbabic@denx.de>
Pixel format defines must be available for boards to set up
the right display. Move them and export in a new file.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Anatolij Gustschin <agust@denx.de>
CC: Marek Vasut <marek.vasut@gmail.com>
---
V3: do not add new prototype of mx51_fb_init() so that this
commit doesn't break compiling
drivers/video/ipu.h | 46 +-----------------------------
include/ipu_pixfmt.h | 76 ++++++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 77 insertions(+), 45 deletions(-)
create mode 100644 include/ipu_pixfmt.h
diff --git a/drivers/video/ipu.h b/drivers/video/ipu.h
index d8bc287..99a2491 100644
--- a/drivers/video/ipu.h
+++ b/drivers/video/ipu.h
@@ -31,6 +31,7 @@
#define __ASM_ARCH_IPU_H__
#include <linux/types.h>
+#include <ipu_pixfmt.h>
#define IDMA_CHAN_INVALID 0xFF
#define HIGH_RESOLUTION_WIDTH 1024
@@ -89,51 +90,6 @@ typedef enum {
IPU_PANEL_TFT,
} ipu_panel_t;
-/* IPU Pixel format definitions */
-#define fourcc(a, b, c, d)\
- (((__u32)(a)<<0)|((__u32)(b)<<8)|((__u32)(c)<<16)|((__u32)(d)<<24))
-
-/*
- * Pixel formats are defined with ASCII FOURCC code. The pixel format codes are
- * the same used by V4L2 API.
- */
-
-#define IPU_PIX_FMT_GENERIC fourcc('I', 'P', 'U', '0')
-#define IPU_PIX_FMT_GENERIC_32 fourcc('I', 'P', 'U', '1')
-#define IPU_PIX_FMT_LVDS666 fourcc('L', 'V', 'D', '6')
-#define IPU_PIX_FMT_LVDS888 fourcc('L', 'V', 'D', '8')
-
-#define IPU_PIX_FMT_RGB332 fourcc('R', 'G', 'B', '1') /*< 8 RGB-3-3-2 */
-#define IPU_PIX_FMT_RGB555 fourcc('R', 'G', 'B', 'O') /*< 16 RGB-5-5-5 */
-#define IPU_PIX_FMT_RGB565 fourcc('R', 'G', 'B', 'P') /*< 1 6 RGB-5-6-5 */
-#define IPU_PIX_FMT_RGB666 fourcc('R', 'G', 'B', '6') /*< 18 RGB-6-6-6 */
-#define IPU_PIX_FMT_BGR666 fourcc('B', 'G', 'R', '6') /*< 18 BGR-6-6-6 */
-#define IPU_PIX_FMT_BGR24 fourcc('B', 'G', 'R', '3') /*< 24 BGR-8-8-8 */
-#define IPU_PIX_FMT_RGB24 fourcc('R', 'G', 'B', '3') /*< 24 RGB-8-8-8 */
-#define IPU_PIX_FMT_BGR32 fourcc('B', 'G', 'R', '4') /*< 32 BGR-8-8-8-8 */
-#define IPU_PIX_FMT_BGRA32 fourcc('B', 'G', 'R', 'A') /*< 32 BGR-8-8-8-8 */
-#define IPU_PIX_FMT_RGB32 fourcc('R', 'G', 'B', '4') /*< 32 RGB-8-8-8-8 */
-#define IPU_PIX_FMT_RGBA32 fourcc('R', 'G', 'B', 'A') /*< 32 RGB-8-8-8-8 */
-#define IPU_PIX_FMT_ABGR32 fourcc('A', 'B', 'G', 'R') /*< 32 ABGR-8-8-8-8 */
-
-/* YUV Interleaved Formats */
-#define IPU_PIX_FMT_YUYV fourcc('Y', 'U', 'Y', 'V') /*< 16 YUV 4:2:2 */
-#define IPU_PIX_FMT_UYVY fourcc('U', 'Y', 'V', 'Y') /*< 16 YUV 4:2:2 */
-#define IPU_PIX_FMT_Y41P fourcc('Y', '4', '1', 'P') /*< 12 YUV 4:1:1 */
-#define IPU_PIX_FMT_YUV444 fourcc('Y', '4', '4', '4') /*< 24 YUV 4:4:4 */
-
-/* two planes -- one Y, one Cb + Cr interleaved */
-#define IPU_PIX_FMT_NV12 fourcc('N', 'V', '1', '2') /* 12 Y/CbCr 4:2:0 */
-
-#define IPU_PIX_FMT_GREY fourcc('G', 'R', 'E', 'Y') /*< 8 Greyscale */
-#define IPU_PIX_FMT_YVU410P fourcc('Y', 'V', 'U', '9') /*< 9 YVU 4:1:0 */
-#define IPU_PIX_FMT_YUV410P fourcc('Y', 'U', 'V', '9') /*< 9 YUV 4:1:0 */
-#define IPU_PIX_FMT_YVU420P fourcc('Y', 'V', '1', '2') /*< 12 YVU 4:2:0 */
-#define IPU_PIX_FMT_YUV420P fourcc('I', '4', '2', '0') /*< 12 YUV 4:2:0 */
-#define IPU_PIX_FMT_YUV420P2 fourcc('Y', 'U', '1', '2') /*< 12 YUV 4:2:0 */
-#define IPU_PIX_FMT_YVU422P fourcc('Y', 'V', '1', '6') /*< 16 YVU 4:2:2 */
-#define IPU_PIX_FMT_YUV422P fourcc('4', '2', '2', 'P') /*< 16 YUV 4:2:2 */
-
/*
* IPU Driver channels definitions.
* Note these are different from IDMA channels
diff --git a/include/ipu_pixfmt.h b/include/ipu_pixfmt.h
new file mode 100644
index 0000000..0497bff
--- /dev/null
+++ b/include/ipu_pixfmt.h
@@ -0,0 +1,76 @@
+/*
+ * (C) Copyright 2011
+ * Stefano Babic, DENX Software Engineering, sbabic@denx.de
+ *
+ * Based on Linux IPU driver for MX51 (ipu.h):
+ *
+ * (C) Copyright 2005-2010 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __IPU_PIXFMT_H__
+#define __IPU_PIXFMT_H__
+
+/* IPU Pixel format definitions */
+#define fourcc(a, b, c, d)\
+ (((__u32)(a)<<0)|((__u32)(b)<<8)|((__u32)(c)<<16)|((__u32)(d)<<24))
+
+/*
+ * Pixel formats are defined with ASCII FOURCC code. The pixel format codes are
+ * the same used by V4L2 API.
+ */
+
+#define IPU_PIX_FMT_GENERIC fourcc('I', 'P', 'U', '0')
+#define IPU_PIX_FMT_GENERIC_32 fourcc('I', 'P', 'U', '1')
+#define IPU_PIX_FMT_LVDS666 fourcc('L', 'V', 'D', '6')
+#define IPU_PIX_FMT_LVDS888 fourcc('L', 'V', 'D', '8')
+
+#define IPU_PIX_FMT_RGB332 fourcc('R', 'G', 'B', '1') /*< 8 RGB-3-3-2 */
+#define IPU_PIX_FMT_RGB555 fourcc('R', 'G', 'B', 'O') /*< 16 RGB-5-5-5 */
+#define IPU_PIX_FMT_RGB565 fourcc('R', 'G', 'B', 'P') /*< 1 6 RGB-5-6-5 */
+#define IPU_PIX_FMT_RGB666 fourcc('R', 'G', 'B', '6') /*< 18 RGB-6-6-6 */
+#define IPU_PIX_FMT_BGR666 fourcc('B', 'G', 'R', '6') /*< 18 BGR-6-6-6 */
+#define IPU_PIX_FMT_BGR24 fourcc('B', 'G', 'R', '3') /*< 24 BGR-8-8-8 */
+#define IPU_PIX_FMT_RGB24 fourcc('R', 'G', 'B', '3') /*< 24 RGB-8-8-8 */
+#define IPU_PIX_FMT_BGR32 fourcc('B', 'G', 'R', '4') /*< 32 BGR-8-8-8-8 */
+#define IPU_PIX_FMT_BGRA32 fourcc('B', 'G', 'R', 'A') /*< 32 BGR-8-8-8-8 */
+#define IPU_PIX_FMT_RGB32 fourcc('R', 'G', 'B', '4') /*< 32 RGB-8-8-8-8 */
+#define IPU_PIX_FMT_RGBA32 fourcc('R', 'G', 'B', 'A') /*< 32 RGB-8-8-8-8 */
+#define IPU_PIX_FMT_ABGR32 fourcc('A', 'B', 'G', 'R') /*< 32 ABGR-8-8-8-8 */
+
+/* YUV Interleaved Formats */
+#define IPU_PIX_FMT_YUYV fourcc('Y', 'U', 'Y', 'V') /*< 16 YUV 4:2:2 */
+#define IPU_PIX_FMT_UYVY fourcc('U', 'Y', 'V', 'Y') /*< 16 YUV 4:2:2 */
+#define IPU_PIX_FMT_Y41P fourcc('Y', '4', '1', 'P') /*< 12 YUV 4:1:1 */
+#define IPU_PIX_FMT_YUV444 fourcc('Y', '4', '4', '4') /*< 24 YUV 4:4:4 */
+
+/* two planes -- one Y, one Cb + Cr interleaved */
+#define IPU_PIX_FMT_NV12 fourcc('N', 'V', '1', '2') /* 12 Y/CbCr 4:2:0 */
+
+#define IPU_PIX_FMT_GREY fourcc('G', 'R', 'E', 'Y') /*< 8 Greyscale */
+#define IPU_PIX_FMT_YVU410P fourcc('Y', 'V', 'U', '9') /*< 9 YVU 4:1:0 */
+#define IPU_PIX_FMT_YUV410P fourcc('Y', 'U', 'V', '9') /*< 9 YUV 4:1:0 */
+#define IPU_PIX_FMT_YVU420P fourcc('Y', 'V', '1', '2') /*< 12 YVU 4:2:0 */
+#define IPU_PIX_FMT_YUV420P fourcc('I', '4', '2', '0') /*< 12 YUV 4:2:0 */
+#define IPU_PIX_FMT_YUV420P2 fourcc('Y', 'U', '1', '2') /*< 12 YUV 4:2:0 */
+#define IPU_PIX_FMT_YVU422P fourcc('Y', 'V', '1', '6') /*< 16 YVU 4:2:2 */
+#define IPU_PIX_FMT_YUV422P fourcc('4', '2', '2', 'P') /*< 16 YUV 4:2:2 */
+
+#endif
--
1.7.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [U-Boot] [PATCH v3 3/3] MX5: Make IPU display output and pixel format configurable
2011-09-26 8:15 [U-Boot] [PATCH 1/2] VIDEO: MX5: Switch MX5 to CONFIG_VIDEO Stefano Babic
` (6 preceding siblings ...)
2011-10-05 22:44 ` [U-Boot] [PATCH v3 2/3] VIDEO: MX5: export pix format Anatolij Gustschin
@ 2011-10-05 22:44 ` Anatolij Gustschin
2011-10-06 7:57 ` Stefano Babic
2011-10-06 17:35 ` Anatolij Gustschin
7 siblings, 2 replies; 20+ messages in thread
From: Anatolij Gustschin @ 2011-10-05 22:44 UTC (permalink / raw)
To: u-boot
From: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
---
V3: rebased to apply on top of previous changes
board/ttcontrol/vision2/vision2.c | 6 +++---
drivers/video/mxc_ipuv3_fb.c | 15 ++++++++++-----
include/ipu_pixfmt.h | 5 +++++
3 files changed, 18 insertions(+), 8 deletions(-)
diff --git a/board/ttcontrol/vision2/vision2.c b/board/ttcontrol/vision2/vision2.c
index ca0c100..e496f64 100644
--- a/board/ttcontrol/vision2/vision2.c
+++ b/board/ttcontrol/vision2/vision2.c
@@ -39,12 +39,12 @@
#include <mc13892.h>
#include <linux/fb.h>
+#include <ipu_pixfmt.h>
+
DECLARE_GLOBAL_DATA_PTR;
static u32 system_rev;
-extern int mx51_fb_init(struct fb_videomode *mode);
-
static struct fb_videomode nec_nl6448bc26_09c = {
"NEC_NL6448BC26-09C",
60, /* Refresh */
@@ -610,7 +610,7 @@ void lcd_enable(void)
gpio_set_value(2, 1);
mxc_request_iomux(MX51_PIN_GPIO1_2, IOMUX_CONFIG_ALT0);
- ret = mx51_fb_init(&nec_nl6448bc26_09c);
+ ret = mx51_fb_init(&nec_nl6448bc26_09c, 0, IPU_PIX_FMT_RGB666);
if (ret)
puts("LCD cannot be configured\n");
}
diff --git a/drivers/video/mxc_ipuv3_fb.c b/drivers/video/mxc_ipuv3_fb.c
index eafacef..1bee54c 100644
--- a/drivers/video/mxc_ipuv3_fb.c
+++ b/drivers/video/mxc_ipuv3_fb.c
@@ -44,7 +44,9 @@ static int mxcfb_unmap_video_memory(struct fb_info *fbi);
/* graphics setup */
static GraphicDevice panel;
-struct fb_videomode *gmode;
+static struct fb_videomode *gmode;
+static uint8_t gdisp;
+static uint32_t gpixfmt;
void fb_videomode_to_var(struct fb_var_screeninfo *var,
const struct fb_videomode *mode)
@@ -499,7 +501,8 @@ static struct fb_info *mxcfb_init_fbinfo(void)
*
* @return Appropriate error code to the kernel common code
*/
-static int mxcfb_probe(u32 interface_pix_fmt, struct fb_videomode *mode)
+static int mxcfb_probe(u32 interface_pix_fmt, uint8_t disp,
+ struct fb_videomode *mode)
{
struct fb_info *fbi;
struct mxcfb_info *mxcfbi;
@@ -523,7 +526,7 @@ static int mxcfb_probe(u32 interface_pix_fmt, struct fb_videomode *mode)
mxcfbi->blank = FB_BLANK_POWERDOWN;
}
- mxcfbi->ipu_di = 0;
+ mxcfbi->ipu_di = disp;
ipu_disp_set_global_alpha(mxcfbi->ipu_ch, 1, 0x80);
ipu_disp_set_color_key(mxcfbi->ipu_ch, 0, 0);
@@ -581,7 +584,7 @@ void *video_hw_init(void)
if (ret)
puts("Error initializing IPU\n");
- ret = mxcfb_probe(IPU_PIX_FMT_RGB666, gmode);
+ ret = mxcfb_probe(gpixfmt, gdisp, gmode);
debug("Framebuffer at 0x%x\n", (unsigned int)panel.frameAdrs);
return (void *)&panel;
@@ -596,9 +599,11 @@ void video_set_lut(unsigned int index, /* color number */
return;
}
-int mx51_fb_init(struct fb_videomode *mode)
+int mx51_fb_init(struct fb_videomode *mode, uint8_t disp, uint32_t pixfmt)
{
gmode = mode;
+ gdisp = disp;
+ gpixfmt = pixfmt;
return 0;
}
diff --git a/include/ipu_pixfmt.h b/include/ipu_pixfmt.h
index 0497bff..656f605 100644
--- a/include/ipu_pixfmt.h
+++ b/include/ipu_pixfmt.h
@@ -28,6 +28,9 @@
#ifndef __IPU_PIXFMT_H__
#define __IPU_PIXFMT_H__
+#include <linux/list.h>
+#include <linux/fb.h>
+
/* IPU Pixel format definitions */
#define fourcc(a, b, c, d)\
(((__u32)(a)<<0)|((__u32)(b)<<8)|((__u32)(c)<<16)|((__u32)(d)<<24))
@@ -73,4 +76,6 @@
#define IPU_PIX_FMT_YVU422P fourcc('Y', 'V', '1', '6') /*< 16 YVU 4:2:2 */
#define IPU_PIX_FMT_YUV422P fourcc('4', '2', '2', 'P') /*< 16 YUV 4:2:2 */
+int mx51_fb_init(struct fb_videomode *mode, uint8_t disp, uint32_t pixfmt);
+
#endif
--
1.7.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [U-Boot] [PATCH V2 1/4] VIDEO: MX5: Switch MX5 to CONFIG_VIDEO
2011-09-28 9:21 ` [U-Boot] [PATCH V2 1/4] VIDEO: MX5: Switch MX5 " Stefano Babic
@ 2011-10-05 22:50 ` Anatolij Gustschin
2011-10-06 7:13 ` Stefano Babic
0 siblings, 1 reply; 20+ messages in thread
From: Anatolij Gustschin @ 2011-10-05 22:50 UTC (permalink / raw)
To: u-boot
Hi Stefano,
On Wed, 28 Sep 2011 11:21:15 +0200
Stefano Babic <sbabic@denx.de> wrote:
> The framebuffer driver for MX5 is based on CONFIG_LCD.
> In the current implementation, there is a serious bug
> because the required memory is allocated before
> relocation, but the driver knows only later which is
> the resolution of the display. The patch switches the driver
> to CONFIG_VIDEO and the memory is allocated by the driver itself.
>
> Signed-off-by: Stefano Babic <sbabic@denx.de>
> CC: Anatolij Gustschin <agust@denx.de>
> ---
>
> V2: patchset with modified Marek's patch to select display
thanks for the new patchset, but I think we should make
commits bisectable. Also there were some compile warnings so I
decided to slightly rework this patchset and have just sent v3.
Can you please test it?
Thanks,
Anatolij
^ permalink raw reply [flat|nested] 20+ messages in thread
* [U-Boot] [PATCH V2 1/4] VIDEO: MX5: Switch MX5 to CONFIG_VIDEO
2011-10-05 22:50 ` Anatolij Gustschin
@ 2011-10-06 7:13 ` Stefano Babic
0 siblings, 0 replies; 20+ messages in thread
From: Stefano Babic @ 2011-10-06 7:13 UTC (permalink / raw)
To: u-boot
On 10/06/2011 12:50 AM, Anatolij Gustschin wrote:
> Hi Stefano,
>
> On Wed, 28 Sep 2011 11:21:15 +0200
> Stefano Babic <sbabic@denx.de> wrote:
>
>> The framebuffer driver for MX5 is based on CONFIG_LCD.
>> In the current implementation, there is a serious bug
>> because the required memory is allocated before
>> relocation, but the driver knows only later which is
>> the resolution of the display. The patch switches the driver
>> to CONFIG_VIDEO and the memory is allocated by the driver itself.
>>
>> Signed-off-by: Stefano Babic <sbabic@denx.de>
>> CC: Anatolij Gustschin <agust@denx.de>
>> ---
>>
>> V2: patchset with modified Marek's patch to select display
>
> thanks for the new patchset, but I think we should make
> commits bisectable. Also there were some compile warnings so I
> decided to slightly rework this patchset and have just sent v3.
> Can you please test it?
>
Of course, yes !
Stefano
--
=====================================================================
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de
=====================================================================
^ permalink raw reply [flat|nested] 20+ messages in thread
* [U-Boot] [PATCH v3 1/3] VIDEO: MX5: Switch MX5 to CONFIG_VIDEO
2011-10-05 22:44 ` [U-Boot] [PATCH v3 1/3] VIDEO: MX5: Switch MX5 to CONFIG_VIDEO Anatolij Gustschin
@ 2011-10-06 7:56 ` Stefano Babic
2011-10-06 17:32 ` Anatolij Gustschin
1 sibling, 0 replies; 20+ messages in thread
From: Stefano Babic @ 2011-10-06 7:56 UTC (permalink / raw)
To: u-boot
On 10/06/2011 12:44 AM, Anatolij Gustschin wrote:
> From: Stefano Babic <sbabic@denx.de>
>
> The framebuffer driver for MX5 is based on CONFIG_LCD.
> In the current implementation, there is a serious bug
> because the required memory is allocated before
> relocation, but the driver knows only later which is
> the resolution of the display. The patch switches the driver
> to CONFIG_VIDEO and the memory is allocated by the driver itself.
>
> We also need to switch the vision2 board code and config file
> in the same commit so that this commit will be bisectable.
>
> Signed-off-by: Stefano Babic <sbabic@denx.de>
> CC: Anatolij Gustschin <agust@denx.de>
> Signed-off-by: Anatolij Gustschin <agust@denx.de>
> ---
> V3: patches 1 and 3 of the previous patchset combined to single
> patch to make this commit bisectable
> V2: patchset with modified Marek's patch to select display
>
Tested-by: Stefano Babic <sbabic@denx.de>
Best regards,
Stefano Babic
--
=====================================================================
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de
=====================================================================
^ permalink raw reply [flat|nested] 20+ messages in thread
* [U-Boot] [PATCH v3 2/3] VIDEO: MX5: export pix format
2011-10-05 22:44 ` [U-Boot] [PATCH v3 2/3] VIDEO: MX5: export pix format Anatolij Gustschin
@ 2011-10-06 7:56 ` Stefano Babic
2011-10-06 17:33 ` Anatolij Gustschin
1 sibling, 0 replies; 20+ messages in thread
From: Stefano Babic @ 2011-10-06 7:56 UTC (permalink / raw)
To: u-boot
On 10/06/2011 12:44 AM, Anatolij Gustschin wrote:
> From: Stefano Babic <sbabic@denx.de>
>
> Pixel format defines must be available for boards to set up
> the right display. Move them and export in a new file.
>
> Signed-off-by: Stefano Babic <sbabic@denx.de>
> CC: Anatolij Gustschin <agust@denx.de>
> CC: Marek Vasut <marek.vasut@gmail.com>
> ---
> V3: do not add new prototype of mx51_fb_init() so that this
> commit doesn't break compiling
Tested-by: Stefano Babic <sbabic@denx.de>
Best regards,
Stefano Babic
--
=====================================================================
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de
=====================================================================
^ permalink raw reply [flat|nested] 20+ messages in thread
* [U-Boot] [PATCH v3 3/3] MX5: Make IPU display output and pixel format configurable
2011-10-05 22:44 ` [U-Boot] [PATCH v3 3/3] MX5: Make IPU display output and pixel format configurable Anatolij Gustschin
@ 2011-10-06 7:57 ` Stefano Babic
2011-10-06 8:08 ` Anatolij Gustschin
2011-10-06 17:35 ` Anatolij Gustschin
1 sibling, 1 reply; 20+ messages in thread
From: Stefano Babic @ 2011-10-06 7:57 UTC (permalink / raw)
To: u-boot
On 10/06/2011 12:44 AM, Anatolij Gustschin wrote:
> From: Marek Vasut <marek.vasut@gmail.com>
>
> Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
> Signed-off-by: Stefano Babic <sbabic@denx.de>
> Signed-off-by: Anatolij Gustschin <agust@denx.de>
> ---
> V3: rebased to apply on top of previous changes
>
Thanks for your changes !
Tested-by: Stefano Babic <sbabic@denx.de>
Best regards,
Stefano Babic
--
=====================================================================
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de
=====================================================================
^ permalink raw reply [flat|nested] 20+ messages in thread
* [U-Boot] [PATCH v3 3/3] MX5: Make IPU display output and pixel format configurable
2011-10-06 7:57 ` Stefano Babic
@ 2011-10-06 8:08 ` Anatolij Gustschin
0 siblings, 0 replies; 20+ messages in thread
From: Anatolij Gustschin @ 2011-10-06 8:08 UTC (permalink / raw)
To: u-boot
Hi Stefano,
On Thu, 06 Oct 2011 09:57:44 +0200
Stefano Babic <sbabic@denx.de> wrote:
> On 10/06/2011 12:44 AM, Anatolij Gustschin wrote:
> > From: Marek Vasut <marek.vasut@gmail.com>
> >
> > Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
> > Signed-off-by: Stefano Babic <sbabic@denx.de>
> > Signed-off-by: Anatolij Gustschin <agust@denx.de>
> > ---
> > V3: rebased to apply on top of previous changes
> >
>
> Thanks for your changes !
>
> Tested-by: Stefano Babic <sbabic@denx.de>
Thanks for testing! I'll apply these patches soon.
Best regards,
Anatolij
^ permalink raw reply [flat|nested] 20+ messages in thread
* [U-Boot] [PATCH v3 1/3] VIDEO: MX5: Switch MX5 to CONFIG_VIDEO
2011-10-05 22:44 ` [U-Boot] [PATCH v3 1/3] VIDEO: MX5: Switch MX5 to CONFIG_VIDEO Anatolij Gustschin
2011-10-06 7:56 ` Stefano Babic
@ 2011-10-06 17:32 ` Anatolij Gustschin
1 sibling, 0 replies; 20+ messages in thread
From: Anatolij Gustschin @ 2011-10-06 17:32 UTC (permalink / raw)
To: u-boot
On Thu, 6 Oct 2011 00:44:14 +0200
Anatolij Gustschin <agust@denx.de> wrote:
> From: Stefano Babic <sbabic@denx.de>
>
> The framebuffer driver for MX5 is based on CONFIG_LCD.
> In the current implementation, there is a serious bug
> because the required memory is allocated before
> relocation, but the driver knows only later which is
> the resolution of the display. The patch switches the driver
> to CONFIG_VIDEO and the memory is allocated by the driver itself.
>
> We also need to switch the vision2 board code and config file
> in the same commit so that this commit will be bisectable.
>
> Signed-off-by: Stefano Babic <sbabic@denx.de>
> CC: Anatolij Gustschin <agust@denx.de>
> Signed-off-by: Anatolij Gustschin <agust@denx.de>
> ---
> V3: patches 1 and 3 of the previous patchset combined to single
> patch to make this commit bisectable
> V2: patchset with modified Marek's patch to select display
>
> board/ttcontrol/vision2/vision2.c | 36 +++++++-----
> drivers/video/mxc_ipuv3_fb.c | 110 ++++++++++++-------------------------
> include/configs/vision2.h | 11 ++--
> 3 files changed, 62 insertions(+), 95 deletions(-)
Applied, thanks!
Anatolij
^ permalink raw reply [flat|nested] 20+ messages in thread
* [U-Boot] [PATCH v3 2/3] VIDEO: MX5: export pix format
2011-10-05 22:44 ` [U-Boot] [PATCH v3 2/3] VIDEO: MX5: export pix format Anatolij Gustschin
2011-10-06 7:56 ` Stefano Babic
@ 2011-10-06 17:33 ` Anatolij Gustschin
1 sibling, 0 replies; 20+ messages in thread
From: Anatolij Gustschin @ 2011-10-06 17:33 UTC (permalink / raw)
To: u-boot
On Thu, 6 Oct 2011 00:44:15 +0200
Anatolij Gustschin <agust@denx.de> wrote:
> From: Stefano Babic <sbabic@denx.de>
>
> Pixel format defines must be available for boards to set up
> the right display. Move them and export in a new file.
>
> Signed-off-by: Stefano Babic <sbabic@denx.de>
> CC: Anatolij Gustschin <agust@denx.de>
> CC: Marek Vasut <marek.vasut@gmail.com>
> ---
> V3: do not add new prototype of mx51_fb_init() so that this
> commit doesn't break compiling
>
> drivers/video/ipu.h | 46 +-----------------------------
> include/ipu_pixfmt.h | 76 ++++++++++++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 77 insertions(+), 45 deletions(-)
> create mode 100644 include/ipu_pixfmt.h
applied, thanks!
Anatolij
^ permalink raw reply [flat|nested] 20+ messages in thread
* [U-Boot] [PATCH v3 3/3] MX5: Make IPU display output and pixel format configurable
2011-10-05 22:44 ` [U-Boot] [PATCH v3 3/3] MX5: Make IPU display output and pixel format configurable Anatolij Gustschin
2011-10-06 7:57 ` Stefano Babic
@ 2011-10-06 17:35 ` Anatolij Gustschin
1 sibling, 0 replies; 20+ messages in thread
From: Anatolij Gustschin @ 2011-10-06 17:35 UTC (permalink / raw)
To: u-boot
On Thu, 6 Oct 2011 00:44:16 +0200
Anatolij Gustschin <agust@denx.de> wrote:
> From: Marek Vasut <marek.vasut@gmail.com>
>
> Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
> Signed-off-by: Stefano Babic <sbabic@denx.de>
> Signed-off-by: Anatolij Gustschin <agust@denx.de>
> ---
> V3: rebased to apply on top of previous changes
>
> board/ttcontrol/vision2/vision2.c | 6 +++---
> drivers/video/mxc_ipuv3_fb.c | 15 ++++++++++-----
> include/ipu_pixfmt.h | 5 +++++
> 3 files changed, 18 insertions(+), 8 deletions(-)
applied, thanks,
Anatolij
^ permalink raw reply [flat|nested] 20+ messages in thread
end of thread, other threads:[~2011-10-06 17:35 UTC | newest]
Thread overview: 20+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2011-09-26 8:15 [U-Boot] [PATCH 1/2] VIDEO: MX5: Switch MX5 to CONFIG_VIDEO Stefano Babic
2011-09-26 8:15 ` [U-Boot] [PATCH 2/2] MX5: Switch vision2 " Stefano Babic
2011-09-28 9:21 ` [U-Boot] [PATCH V2 1/4] VIDEO: MX5: Switch MX5 " Stefano Babic
2011-10-05 22:50 ` Anatolij Gustschin
2011-10-06 7:13 ` Stefano Babic
2011-09-28 9:21 ` [U-Boot] [PATCH V2 2/4] VIDEO: MX5: export pix format Stefano Babic
2011-09-28 10:52 ` Marek Vasut
2011-09-28 9:21 ` [U-Boot] [PATCH V2 3/4] MX5: Switch vision2 to CONFIG_VIDEO Stefano Babic
2011-09-28 9:21 ` [U-Boot] [PATCH V2 4/4] MX5: Make IPU display output and pixel format configurable Stefano Babic
2011-09-28 10:53 ` Marek Vasut
2011-10-05 22:44 ` [U-Boot] [PATCH v3 1/3] VIDEO: MX5: Switch MX5 to CONFIG_VIDEO Anatolij Gustschin
2011-10-06 7:56 ` Stefano Babic
2011-10-06 17:32 ` Anatolij Gustschin
2011-10-05 22:44 ` [U-Boot] [PATCH v3 2/3] VIDEO: MX5: export pix format Anatolij Gustschin
2011-10-06 7:56 ` Stefano Babic
2011-10-06 17:33 ` Anatolij Gustschin
2011-10-05 22:44 ` [U-Boot] [PATCH v3 3/3] MX5: Make IPU display output and pixel format configurable Anatolij Gustschin
2011-10-06 7:57 ` Stefano Babic
2011-10-06 8:08 ` Anatolij Gustschin
2011-10-06 17:35 ` Anatolij Gustschin
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