From mboxrd@z Thu Jan  1 00:00:00 1970
From: Stefano Babic <sbabic@denx.de>
Date: Mon, 10 Oct 2011 15:17:19 +0200
Subject: [U-Boot] [PATCH 4/6] davinci_emac: fix for running with dcache
 enabled
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	<4E92E675.1090900@denx.de> <4E92ED38.3010103@emcraft.com>
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On 10/10/2011 03:03 PM, Ilya Yanok wrote:
> Hi Stefano,
> 

Hi Ilya,

> On 10.10.2011 16:35, Stefano Babic wrote:
>>> +#ifdef DAVINCI_EMAC_DCACHE
>>> +static inline void davinci_flush(void *addr, int size)
>>> +{
>>> +	flush_dcache_range((unsigned long)addr,
>>> +			(unsigned long)addr + size);
>>> +}
>>
>> There is no check with the cache linesize. I get this error:
>>
>> ERROR: v7_dcache_inval_range - stop address is not aligned - 0x5c0200a0
>>
>> Should we not be sure that size is rounded up to align with the cache
>> line size ?
> 
> Surely we should. Actually it's not the size that has to be aligned but
> the buffer itself. Is there any generic API to get the cache line size?

There is a CONFIG_SYS_CACHELINE_SIZE. However, I see recent patches that
can help in our case ( cache: add ALLOC_CACHE_ALIGN_BUFFER macro):

http://patchwork.ozlabs.org/patch/117698/

Wolfgang replied he has already applied, but I have not yet seen on
u-boot TOT.

Regards,
Stefano

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