[U-Boot] [PATCH 05/10 v3] spl, nand: add 4bit HW ecc oob first nand_read_page function

[Scott Wood <scottwood@freescale.com>]

On 10/11/2011 12:41 AM, Heiko Schocher wrote:
> Hello Scott,
> 
> Scott Wood wrote:
>> On 10/06/2011 12:45 AM, Heiko Schocher wrote:
>>> similiar to commit dc7cd8e59ba077f3b4c1a4557c9cd86a31b9ab1f, only
>>> adapted for the new spl framework.
>>>
>>> Signed-off-by: Heiko Schocher <hs@denx.de>
>>> Cc: Scott Wood <scottwood@freescale.com>
>>> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
>>> Cc: Sandeep Paulraj <s-paulraj@ti.com>
>>>
>>> ---
>>> changes for v3:
>>> - add comment from Scott Wood:
>>>   as BSS is cleared, no need for intializing vars with 0
>>>   remove this.
>>>
>>>  drivers/mtd/nand/nand_spl_simple.c |   43 +++++++++++++++++++++++++++++++++++-
>>>  1 files changed, 42 insertions(+), 1 deletions(-)
>>>
>>> diff --git a/drivers/mtd/nand/nand_spl_simple.c b/drivers/mtd/nand/nand_spl_simple.c
>>> index 71491d4..622a9b5 100644
>>> --- a/drivers/mtd/nand/nand_spl_simple.c
>>> +++ b/drivers/mtd/nand/nand_spl_simple.c
>>> @@ -140,6 +140,47 @@ static int nand_is_bad_block(int block)
>>>  	return 0;
>>>  }
>>>  
>>> +#if defined(CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST)
>>
>> Change the name to not be 4BIT-specific, and add documentation for this
>> config option.
> 
> Hmm.. this is no new config option, it enables on davinci socs the
> 4Bit NAND HW ECC generation ... and I need this in spl code too ...

It's not new, but it is misnamed (there's nothing 4-bit specific in the
#ifdeffed code), and we now have someone that wants this for 8-bit ECC.

-Scott