From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefano Babic Date: Wed, 02 Nov 2011 09:41:00 +0100 Subject: [U-Boot] [PATCH] mx31pdk: Enable D and I caches In-Reply-To: <1320171397-28477-1-git-send-email-fabio.estevam@freescale.com> References: <1320171397-28477-1-git-send-email-fabio.estevam@freescale.com> Message-ID: <4EB1021C.4090101@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 11/01/2011 07:16 PM, Fabio Estevam wrote: > Enable D and I caches on mx31pdk. > > Signed-off-by: Fabio Estevam > --- > Stefano, > > You explained that enabling cache may cause some drivers like FEC and MMC not to work properly. > As mx31pdk does not have FEC or MMC driver I thought this should be OK. Ok, understood. > > Tested by booting Linux kernel via TFTP and mounting a NFS rootfs. Good. To be sure, do you have also tested NAND in u-boot ? I do not expect problems, but... > > board/freescale/mx31pdk/mx31pdk.c | 8 ++++++++ > 1 files changed, 8 insertions(+), 0 deletions(-) > > diff --git a/board/freescale/mx31pdk/mx31pdk.c b/board/freescale/mx31pdk/mx31pdk.c > index 9f8bc53..1d7b4f6 100644 > --- a/board/freescale/mx31pdk/mx31pdk.c > +++ b/board/freescale/mx31pdk/mx31pdk.c > @@ -71,11 +71,19 @@ int board_early_init_f(void) > return 0; > } > > +void enable_caches(void) > +{ > + icache_enable(); > + dcache_enable(); > +} > + > int board_init(void) > { > /* adress of boot parameters */ > gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; > > + enable_caches(); > + > return 0; > } > Acked-by: Stefano Babic Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de =====================================================================