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From: Stefano Babic <sbabic@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] NAND: Let NAND_NO_SUBPAGE_WRITE through
Date: Sun, 06 Nov 2011 10:01:22 +0100	[thread overview]
Message-ID: <4EB64CE2.4090702@denx.de> (raw)
In-Reply-To: <1320459844-18243-1-git-send-email-marek.vasut@gmail.com>

On 11/05/2011 03:24 AM, Marek Vasut wrote:
> There is a problem reported that the NAND_NO_SUBPAGE_WRITE, set by some drivers,
> is silently ignored by NAND core. This causes UBI to malfunction on these
> drivers, because UBI tries to use subpage writes.
> 

Hi Marek,

> This was discussed already with no conclusion, see thread:
> Message-Id: <1302372335-30232-6-git-send-email-sbabic@denx.de>

Right, there was some discussion also comparing what it is done on the
Linux Kernel. There is a discrepancy for the usage of the
NAND_NO_SUBPAGE_WRITE, because it belongs to the chip options, but in
this case (and in the patch I submitted) it is used as "controller"
option. Same case here.

> 
> The bug was recently retriggered by Veli-Pekka Peltola, causing him trouble with
> UBI on the MX28 CPU:
> Message-ID: <4EB3E4EA.9080509@bluegiga.com>

>  drivers/mtd/nand/nand_base.c |   11 +++++++++++
>  1 files changed, 11 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
> index 6aac6a2..7ecd5a3 100644
> --- a/drivers/mtd/nand/nand_base.c
> +++ b/drivers/mtd/nand/nand_base.c
> @@ -2548,6 +2548,7 @@ static const struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
>  {
>  	int ret, maf_idx;
>  	int tmp_id, tmp_manf;
> +	int no_subpage = 0;
>  
>  	/* Select the device */
>  	chip->select_chip(mtd, 0);
> @@ -2612,10 +2613,20 @@ static const struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
>  	if (!ret)
>  		nand_flash_detect_non_onfi(mtd, chip, type, &busw);
>  
> +	/*
> +	 * If the controller is incapable of subpage writes, force no subpage
> +	 * writes. This has to be done here, otherwise UBI will complain.
> +	 */
> +	if (chip->options & NAND_NO_SUBPAGE_WRITE)
> +		no_subpage = 1;
> +

The patch does not convince me. This relies only if the SUBPAGE_WRITE is
supported by the chip, and this is half problem. What happens if we have
a SLC (that generally supports subpage mode) connected to a controller
that does not support it ? NAND_NO_SUBPAGE_WRITE is not set, but the
controller can't manage it.
I think your patch fix only a particular case, and it is not general enough.

Best regards,
Stefano Babic

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  reply	other threads:[~2011-11-06  9:01 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-11-05  2:24 [U-Boot] [PATCH] NAND: Let NAND_NO_SUBPAGE_WRITE through Marek Vasut
2011-11-06  9:01 ` Stefano Babic [this message]
2011-11-06 12:43   ` Marek Vasut
2011-11-06 14:54     ` Stefano Babic
2011-11-06 15:16       ` Marek Vasut
2011-11-10 17:02 ` Marek Vasut
2011-11-10 17:10   ` Scott Wood
2011-11-10 17:44     ` Marek Vasut
2011-11-11 12:52       ` Veli-Pekka Peltola
2011-11-11 17:50         ` Marek Vasut

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