From mboxrd@z Thu Jan 1 00:00:00 1970 From: Hugo Holgersson Date: Mon, 7 Nov 2011 11:09:08 +0100 Subject: [U-Boot] No power on USB host of IMX25 PDK In-Reply-To: References: Message-ID: <4EB7AE44.9030405@student.chalmers.se> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 11/04/2011 05:24 PM, Fabio Estevam wrote: > On Fri, Nov 4, 2011 at 2:06 PM, Hugo Holgersson > wrote: >> Thanks for the input! >> >> Putting the mux code to generic.c, as it was done for the UART's pins, did not change anything... >> >> I write MXC_EHCI_MODE_SERIAL to&ehci->portsc. Exactly the same behavior. Same log. >> >> But the question (1) remains; which is the register (the address) of where mxc_set_usbcontrol() >> is supposed to write to? I understand Linux use http://lxr.linux.no/#linux+v3.1/arch/arm/mach-imx/ehci-imx25.c >> uses the IMX_USB_BASE + 0x600 address... But, to me this is outside the usb_ehci-struct, so I >> cannot figure out what register that is located at that address. >> >> Guessing, what about the following possible candidates inside the usb_echi-struct? >> usb_ehci->usbgenctrl >> usb_ehci->hwgeneral >> usb_ehci->control >> usb_ehci->isiphyctrl >> >> I need to find some docs on the controller's registers to understand that. > > You need to check MX25RM (Reference Manual) available at > http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=i.MX257&nodeId=018rH3ZrDR6B45&fpsp=1&tab=Documentation_Tab > > Regards, > > Fabio Estevam > #define USBCTRL_OTGBASE_OFFSET 0x600 should maybe be called just USB_CTRL_OFFSET. According to the reference manual, it is a "USBOH"-register. Concerning both of the two, independent cores (OTG and "Host") of the chip. (Page 1747) So, it is indeed outside the usb_ehci struct! Sorry! Best regards, Hugo Holgersson