From mboxrd@z Thu Jan 1 00:00:00 1970 From: Timur Tabi Date: Thu, 10 Nov 2011 13:28:42 -0600 Subject: [U-Boot] Is CCSRBAR relocation broken on P2020? In-Reply-To: References: <20111110165447.GA1801@ovro.caltech.edu> <4EBC0609.2030709@freescale.com> <20111110173356.GC1801@ovro.caltech.edu> <4EBC0E40.3050403@freescale.com> Message-ID: <4EBC25EA.7010608@freescale.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de McClintock Matthew-B29882 wrote: > Did you test your CCSRBAR changes with a board that uses the on chip > rom as well as L2SRAM to boot? No, just the on-chip ROM. Kumar later noticed that NAND booting was broken, so I fixed that too. That's why I'm saying the latest set of patches should fix it for everyone. I didn't consider the combination of multi-stage with SRAM, but since normal U-Boot runs from SRAM first, I expect that to work as well. > Does the COME board load from SDCARD to > DDR or to L2SRAM? I suspect it's L2SRAM since this board has 512kB > which is large enough for a stock u-boot image. Ira says that early boot loader sets of DDR, so I presume it's running from that, not SRAM. -- Timur Tabi Linux kernel developer at Freescale