[U-Boot] [PATCH 0/4] Move ehci headers, add Efika USB support

[U-Boot] [PATCH 0/4] Move ehci headers, add Efika USB support

[Jana Rapava]

This patchset moves header files ehci.h and ehci-core.h 
from drivers/usb/host/ to /include/usb and adds USB support for Efika
with cleanup of file /drivers/usb/host/ehci-mxc.c.

In the previous revisions I messed up versioning and some From: and
In-Reply-To: headers, so I want to bury this mess and start with a clean
plate. Version of patches in this patchset will then be 1.

Fabio Estevam (1):
  usb: Move ehci.h and ehci-core.h to include/usb directory

Jana Rapava (3):
  EHCI: add callback ehci_fixup
  EHCI: adjust for mx5
  Add USB support for Efika

 board/efikamx/Makefile           |    3 +
 board/efikamx/efika.h            |   30 +++
 board/efikamx/efikamx-usb.c      |  420 ++++++++++++++++++++++++++++++++++++++
 board/efikamx/efikamx.c          |    3 +
 drivers/usb/host/ehci-core.h     |   29 ---
 drivers/usb/host/ehci-fsl.c      |    4 +-
 drivers/usb/host/ehci-hcd.c      |   16 ++-
 drivers/usb/host/ehci-ixp4xx.c   |    4 +-
 drivers/usb/host/ehci-kirkwood.c |    4 +-
 drivers/usb/host/ehci-mpc512x.c  |    4 +-
 drivers/usb/host/ehci-mxc.c      |   35 +---
 drivers/usb/host/ehci-pci.c      |    4 +-
 drivers/usb/host/ehci-ppc4xx.c   |    4 +-
 drivers/usb/host/ehci-vct.c      |    4 +-
 drivers/usb/host/ehci.h          |  203 ------------------
 include/configs/efikamx.h        |   16 ++
 include/usb/ehci-core.h          |   29 +++
 include/usb/ehci-fsl.h           |  146 +++++++++++++-
 include/usb/ehci.h               |  203 ++++++++++++++++++
 19 files changed, 882 insertions(+), 279 deletions(-)
 create mode 100644 board/efikamx/efika.h
 create mode 100644 board/efikamx/efikamx-usb.c
 delete mode 100644 drivers/usb/host/ehci-core.h
 delete mode 100644 drivers/usb/host/ehci.h
 create mode 100644 include/usb/ehci-core.h
 create mode 100644 include/usb/ehci.h

-- 
1.7.6.3

[U-Boot] [PATCH 1/4] usb: Move ehci.h and ehci-core.h to include/usb directory

[Jana Rapava]

From: Fabio Estevam <festevam@gmail.com>

Move ehci.h and ehci-core.h to include/usb directory.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Marek Vasut <marek.vasut@gmail.com>
---
 drivers/usb/host/ehci-core.h     |   29 ------
 drivers/usb/host/ehci-fsl.c      |    4 +-
 drivers/usb/host/ehci-hcd.c      |    2 +-
 drivers/usb/host/ehci-ixp4xx.c   |    4 +-
 drivers/usb/host/ehci-kirkwood.c |    4 +-
 drivers/usb/host/ehci-mpc512x.c  |    4 +-
 drivers/usb/host/ehci-mxc.c      |    4 +-
 drivers/usb/host/ehci-pci.c      |    4 +-
 drivers/usb/host/ehci-ppc4xx.c   |    4 +-
 drivers/usb/host/ehci-vct.c      |    4 +-
 drivers/usb/host/ehci.h          |  203 --------------------------------------
 include/usb/ehci-core.h          |   29 ++++++
 include/usb/ehci.h               |  203 ++++++++++++++++++++++++++++++++++++++
 13 files changed, 249 insertions(+), 249 deletions(-)
 delete mode 100644 drivers/usb/host/ehci-core.h
 delete mode 100644 drivers/usb/host/ehci.h
 create mode 100644 include/usb/ehci-core.h
 create mode 100644 include/usb/ehci.h

diff --git a/drivers/usb/host/ehci-core.h b/drivers/usb/host/ehci-core.h
deleted file mode 100644
index 39e5c5e..0000000
--- a/drivers/usb/host/ehci-core.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/*-
- * Copyright (c) 2007-2008, Juniper Networks, Inc.
- * Copyright (c) 2008, Excito Elektronik i Sk?ne AB
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef USB_EHCI_CORE_H
-#define USB_EHCI_CORE_H
-
-extern int rootdev;
-extern struct ehci_hccr *hccr;
-extern volatile struct ehci_hcor *hcor;
-
-#endif
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 6e0043a..19b97ee 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -27,8 +27,8 @@
 #include <asm/io.h>
 #include <usb/ehci-fsl.h>
 
-#include "ehci.h"
-#include "ehci-core.h"
+#include <usb/ehci.h>
+#include <usb/ehci-core.h>
 
 /*
  * Create the appropriate control structures to manage
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index 2197119..bdadd46 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -27,7 +27,7 @@
 #include <malloc.h>
 #include <watchdog.h>
 
-#include "ehci.h"
+#include <usb/ehci.h>
 
 int rootdev;
 struct ehci_hccr *hccr;	/* R/O registers, not need for volatile */
diff --git a/drivers/usb/host/ehci-ixp4xx.c b/drivers/usb/host/ehci-ixp4xx.c
index b8f15ae..d15237b 100644
--- a/drivers/usb/host/ehci-ixp4xx.c
+++ b/drivers/usb/host/ehci-ixp4xx.c
@@ -22,8 +22,8 @@
 #include <common.h>
 #include <usb.h>
 
-#include "ehci.h"
-#include "ehci-core.h"
+#include <usb/ehci.h>
+#include <usb/ehci-core.h>
 /*
  * Create the appropriate control structures to manage
  * a new EHCI host controller.
diff --git a/drivers/usb/host/ehci-kirkwood.c b/drivers/usb/host/ehci-kirkwood.c
index 5570fc6..ab75acd 100644
--- a/drivers/usb/host/ehci-kirkwood.c
+++ b/drivers/usb/host/ehci-kirkwood.c
@@ -25,8 +25,8 @@
 #include <common.h>
 #include <asm/io.h>
 #include <usb.h>
-#include "ehci.h"
-#include "ehci-core.h"
+#include <usb/ehci.h>
+#include <usb/ehci-core.h>
 #include <asm/arch/kirkwood.h>
 
 #define rdl(off)	readl(KW_USB20_BASE + (off))
diff --git a/drivers/usb/host/ehci-mpc512x.c b/drivers/usb/host/ehci-mpc512x.c
index d360108..8d2c93b 100644
--- a/drivers/usb/host/ehci-mpc512x.c
+++ b/drivers/usb/host/ehci-mpc512x.c
@@ -32,8 +32,8 @@
 #include <asm/io.h>
 #include <usb/ehci-fsl.h>
 
-#include "ehci.h"
-#include "ehci-core.h"
+#include <usb/ehci.h>
+#include <usb/ehci-core.h>
 
 static void fsl_setup_phy(volatile struct ehci_hcor *);
 static void fsl_platform_set_host_mode(volatile struct usb_ehci *ehci);
diff --git a/drivers/usb/host/ehci-mxc.c b/drivers/usb/host/ehci-mxc.c
index a0cfbb7..fde1f0f 100644
--- a/drivers/usb/host/ehci-mxc.c
+++ b/drivers/usb/host/ehci-mxc.c
@@ -24,8 +24,8 @@
 #include <usb/ehci-fsl.h>
 #include <errno.h>
 
-#include "ehci.h"
-#include "ehci-core.h"
+#include <usb/ehci.h>
+#include <usb/ehci-core.h>
 
 #define USBCTRL_OTGBASE_OFFSET	0x600
 
diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c
index 020ab11..e1f84d9 100644
--- a/drivers/usb/host/ehci-pci.c
+++ b/drivers/usb/host/ehci-pci.c
@@ -22,8 +22,8 @@
 #include <pci.h>
 #include <usb.h>
 
-#include "ehci.h"
-#include "ehci-core.h"
+#include <usb/ehci.h>
+#include <usb/ehci-core.h>
 
 #ifdef CONFIG_PCI_EHCI_DEVICE
 static struct pci_device_id ehci_pci_ids[] = {
diff --git a/drivers/usb/host/ehci-ppc4xx.c b/drivers/usb/host/ehci-ppc4xx.c
index 1179919..1a1fae1 100644
--- a/drivers/usb/host/ehci-ppc4xx.c
+++ b/drivers/usb/host/ehci-ppc4xx.c
@@ -22,8 +22,8 @@
 #include <common.h>
 #include <usb.h>
 
-#include "ehci.h"
-#include "ehci-core.h"
+#include <usb/ehci.h>
+#include <usb/ehci-core.h>
 
 /*
  * Create the appropriate control structures to manage
diff --git a/drivers/usb/host/ehci-vct.c b/drivers/usb/host/ehci-vct.c
index 3063dd1..e73cf38 100644
--- a/drivers/usb/host/ehci-vct.c
+++ b/drivers/usb/host/ehci-vct.c
@@ -20,8 +20,8 @@
 #include <common.h>
 #include <usb.h>
 
-#include "ehci.h"
-#include "ehci-core.h"
+#include <usb/ehci.h>
+#include <usb/ehci-core.h>
 
 int vct_ehci_hcd_init(u32 *hccr, u32 *hcor);
 
diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h
deleted file mode 100644
index 3d0ad0c..0000000
--- a/drivers/usb/host/ehci.h
+++ /dev/null
@@ -1,203 +0,0 @@
-/*-
- * Copyright (c) 2007-2008, Juniper Networks, Inc.
- * Copyright (c) 2008, Michael Trimarchi <trimarchimichael@yahoo.it>
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef USB_EHCI_H
-#define USB_EHCI_H
-
-#if !defined(CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS)
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	2
-#endif
-
-/* (shifted) direction/type/recipient from the USB 2.0 spec, table 9.2 */
-#define DeviceRequest \
-	((USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE) << 8)
-
-#define DeviceOutRequest \
-	((USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE) << 8)
-
-#define InterfaceRequest \
-	((USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_INTERFACE) << 8)
-
-#define EndpointRequest \
-	((USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_INTERFACE) << 8)
-
-#define EndpointOutRequest \
-	((USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_INTERFACE) << 8)
-
-/*
- * Register Space.
- */
-struct ehci_hccr {
-	uint32_t cr_capbase;
-#define HC_LENGTH(p)		(((p) >> 0) & 0x00ff)
-#define HC_VERSION(p)		(((p) >> 16) & 0xffff)
-	uint32_t cr_hcsparams;
-#define HCS_PPC(p)		((p) & (1 << 4))
-#define HCS_INDICATOR(p)	((p) & (1 << 16)) /* Port indicators */
-#define HCS_N_PORTS(p)		(((p) >> 0) & 0xf)
-	uint32_t cr_hccparams;
-	uint8_t cr_hcsp_portrt[8];
-} __attribute__ ((packed, aligned(4)));
-
-struct ehci_hcor {
-	uint32_t or_usbcmd;
-#define CMD_PARK	(1 << 11)		/* enable "park" */
-#define CMD_PARK_CNT(c)	(((c) >> 8) & 3)	/* how many transfers to park */
-#define CMD_ASE		(1 << 5)		/* async schedule enable */
-#define CMD_LRESET	(1 << 7)		/* partial reset */
-#define CMD_IAAD	(1 << 5)		/* "doorbell" interrupt */
-#define CMD_PSE		(1 << 4)		/* periodic schedule enable */
-#define CMD_RESET	(1 << 1)		/* reset HC not bus */
-#define CMD_RUN		(1 << 0)		/* start/stop HC */
-	uint32_t or_usbsts;
-#define	STD_ASS		(1 << 15)
-#define STS_HALT	(1 << 12)
-	uint32_t or_usbintr;
-#define INTR_UE         (1 << 0)                /* USB interrupt enable */
-#define INTR_UEE        (1 << 1)                /* USB error interrupt enable */
-#define INTR_PCE        (1 << 2)                /* Port change detect enable */
-#define INTR_SEE        (1 << 4)                /* system error enable */
-#define INTR_AAE        (1 << 5)                /* Interrupt on async adavance enable */
-	uint32_t or_frindex;
-	uint32_t or_ctrldssegment;
-	uint32_t or_periodiclistbase;
-	uint32_t or_asynclistaddr;
-	uint32_t _reserved_[9];
-	uint32_t or_configflag;
-#define FLAG_CF		(1 << 0)	/* true:  we'll support "high speed" */
-	uint32_t or_portsc[CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS];
-	uint32_t or_systune;
-} __attribute__ ((packed, aligned(4)));
-
-#define USBMODE		0x68		/* USB Device mode */
-#define USBMODE_SDIS	(1 << 3)	/* Stream disable */
-#define USBMODE_BE	(1 << 2)	/* BE/LE endiannes select */
-#define USBMODE_CM_HC	(3 << 0)	/* host controller mode */
-#define USBMODE_CM_IDLE	(0 << 0)	/* idle state */
-
-/* Interface descriptor */
-struct usb_linux_interface_descriptor {
-	unsigned char	bLength;
-	unsigned char	bDescriptorType;
-	unsigned char	bInterfaceNumber;
-	unsigned char	bAlternateSetting;
-	unsigned char	bNumEndpoints;
-	unsigned char	bInterfaceClass;
-	unsigned char	bInterfaceSubClass;
-	unsigned char	bInterfaceProtocol;
-	unsigned char	iInterface;
-} __attribute__ ((packed));
-
-/* Configuration descriptor information.. */
-struct usb_linux_config_descriptor {
-	unsigned char	bLength;
-	unsigned char	bDescriptorType;
-	unsigned short	wTotalLength;
-	unsigned char	bNumInterfaces;
-	unsigned char	bConfigurationValue;
-	unsigned char	iConfiguration;
-	unsigned char	bmAttributes;
-	unsigned char	MaxPower;
-} __attribute__ ((packed));
-
-#if defined CONFIG_EHCI_DESC_BIG_ENDIAN
-#define	ehci_readl(x)		(*((volatile u32 *)(x)))
-#define ehci_writel(a, b)	(*((volatile u32 *)(a)) = ((volatile u32)b))
-#else
-#define ehci_readl(x)		cpu_to_le32((*((volatile u32 *)(x))))
-#define ehci_writel(a, b)	(*((volatile u32 *)(a)) = \
-					cpu_to_le32(((volatile u32)b)))
-#endif
-
-#if defined CONFIG_EHCI_MMIO_BIG_ENDIAN
-#define hc32_to_cpu(x)		be32_to_cpu((x))
-#define cpu_to_hc32(x)		cpu_to_be32((x))
-#else
-#define hc32_to_cpu(x)		le32_to_cpu((x))
-#define cpu_to_hc32(x)		cpu_to_le32((x))
-#endif
-
-#define EHCI_PS_WKOC_E		(1 << 22)	/* RW wake on over current */
-#define EHCI_PS_WKDSCNNT_E	(1 << 21)	/* RW wake on disconnect */
-#define EHCI_PS_WKCNNT_E	(1 << 20)	/* RW wake on connect */
-#define EHCI_PS_PO		(1 << 13)	/* RW port owner */
-#define EHCI_PS_PP		(1 << 12)	/* RW,RO port power */
-#define EHCI_PS_LS		(3 << 10)	/* RO line status */
-#define EHCI_PS_PR		(1 << 8)	/* RW port reset */
-#define EHCI_PS_SUSP		(1 << 7)	/* RW suspend */
-#define EHCI_PS_FPR		(1 << 6)	/* RW force port resume */
-#define EHCI_PS_OCC		(1 << 5)	/* RWC over current change */
-#define EHCI_PS_OCA		(1 << 4)	/* RO over current active */
-#define EHCI_PS_PEC		(1 << 3)	/* RWC port enable change */
-#define EHCI_PS_PE		(1 << 2)	/* RW port enable */
-#define EHCI_PS_CSC		(1 << 1)	/* RWC connect status change */
-#define EHCI_PS_CS		(1 << 0)	/* RO connect status */
-#define EHCI_PS_CLEAR		(EHCI_PS_OCC | EHCI_PS_PEC | EHCI_PS_CSC)
-
-#define EHCI_PS_IS_LOWSPEED(x)	(((x) & EHCI_PS_LS) == (1 << 10))
-
-/*
- * Schedule Interface Space.
- *
- * IMPORTANT: Software must ensure that no interface data structure
- * reachable by the EHCI host controller spans a 4K page boundary!
- *
- * Periodic transfers (i.e. isochronous and interrupt transfers) are
- * not supported.
- */
-
-/* Queue Element Transfer Descriptor (qTD). */
-struct qTD {
-	/* this part defined by EHCI spec */
-	uint32_t qt_next;		/* see EHCI 3.5.1 */
-#define	QT_NEXT_TERMINATE	1
-	uint32_t qt_altnext;		/* see EHCI 3.5.2 */
-	uint32_t qt_token;		/* see EHCI 3.5.3 */
-	uint32_t qt_buffer[5];		/* see EHCI 3.5.4 */
-	uint32_t qt_buffer_hi[5];	/* Appendix B */
-	/* pad struct for 32 byte alignment */
-	uint32_t unused[3];
-};
-
-/* Queue Head (QH). */
-struct QH {
-	uint32_t qh_link;
-#define	QH_LINK_TERMINATE	1
-#define	QH_LINK_TYPE_ITD	0
-#define	QH_LINK_TYPE_QH		2
-#define	QH_LINK_TYPE_SITD	4
-#define	QH_LINK_TYPE_FSTN	6
-	uint32_t qh_endpt1;
-	uint32_t qh_endpt2;
-	uint32_t qh_curtd;
-	struct qTD qh_overlay;
-	/*
-	 * Add dummy fill value to make the size of this struct
-	 * aligned to 32 bytes
-	 */
-	uint8_t fill[16];
-};
-
-/* Low level init functions */
-int ehci_hcd_init(void);
-int ehci_hcd_stop(void);
-
-#endif /* USB_EHCI_H */
diff --git a/include/usb/ehci-core.h b/include/usb/ehci-core.h
new file mode 100644
index 0000000..39e5c5e
--- /dev/null
+++ b/include/usb/ehci-core.h
@@ -0,0 +1,29 @@
+/*-
+ * Copyright (c) 2007-2008, Juniper Networks, Inc.
+ * Copyright (c) 2008, Excito Elektronik i Sk?ne AB
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef USB_EHCI_CORE_H
+#define USB_EHCI_CORE_H
+
+extern int rootdev;
+extern struct ehci_hccr *hccr;
+extern volatile struct ehci_hcor *hcor;
+
+#endif
diff --git a/include/usb/ehci.h b/include/usb/ehci.h
new file mode 100644
index 0000000..3d0ad0c
--- /dev/null
+++ b/include/usb/ehci.h
@@ -0,0 +1,203 @@
+/*-
+ * Copyright (c) 2007-2008, Juniper Networks, Inc.
+ * Copyright (c) 2008, Michael Trimarchi <trimarchimichael@yahoo.it>
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef USB_EHCI_H
+#define USB_EHCI_H
+
+#if !defined(CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS)
+#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	2
+#endif
+
+/* (shifted) direction/type/recipient from the USB 2.0 spec, table 9.2 */
+#define DeviceRequest \
+	((USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE) << 8)
+
+#define DeviceOutRequest \
+	((USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE) << 8)
+
+#define InterfaceRequest \
+	((USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_INTERFACE) << 8)
+
+#define EndpointRequest \
+	((USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_INTERFACE) << 8)
+
+#define EndpointOutRequest \
+	((USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_INTERFACE) << 8)
+
+/*
+ * Register Space.
+ */
+struct ehci_hccr {
+	uint32_t cr_capbase;
+#define HC_LENGTH(p)		(((p) >> 0) & 0x00ff)
+#define HC_VERSION(p)		(((p) >> 16) & 0xffff)
+	uint32_t cr_hcsparams;
+#define HCS_PPC(p)		((p) & (1 << 4))
+#define HCS_INDICATOR(p)	((p) & (1 << 16)) /* Port indicators */
+#define HCS_N_PORTS(p)		(((p) >> 0) & 0xf)
+	uint32_t cr_hccparams;
+	uint8_t cr_hcsp_portrt[8];
+} __attribute__ ((packed, aligned(4)));
+
+struct ehci_hcor {
+	uint32_t or_usbcmd;
+#define CMD_PARK	(1 << 11)		/* enable "park" */
+#define CMD_PARK_CNT(c)	(((c) >> 8) & 3)	/* how many transfers to park */
+#define CMD_ASE		(1 << 5)		/* async schedule enable */
+#define CMD_LRESET	(1 << 7)		/* partial reset */
+#define CMD_IAAD	(1 << 5)		/* "doorbell" interrupt */
+#define CMD_PSE		(1 << 4)		/* periodic schedule enable */
+#define CMD_RESET	(1 << 1)		/* reset HC not bus */
+#define CMD_RUN		(1 << 0)		/* start/stop HC */
+	uint32_t or_usbsts;
+#define	STD_ASS		(1 << 15)
+#define STS_HALT	(1 << 12)
+	uint32_t or_usbintr;
+#define INTR_UE         (1 << 0)                /* USB interrupt enable */
+#define INTR_UEE        (1 << 1)                /* USB error interrupt enable */
+#define INTR_PCE        (1 << 2)                /* Port change detect enable */
+#define INTR_SEE        (1 << 4)                /* system error enable */
+#define INTR_AAE        (1 << 5)                /* Interrupt on async adavance enable */
+	uint32_t or_frindex;
+	uint32_t or_ctrldssegment;
+	uint32_t or_periodiclistbase;
+	uint32_t or_asynclistaddr;
+	uint32_t _reserved_[9];
+	uint32_t or_configflag;
+#define FLAG_CF		(1 << 0)	/* true:  we'll support "high speed" */
+	uint32_t or_portsc[CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS];
+	uint32_t or_systune;
+} __attribute__ ((packed, aligned(4)));
+
+#define USBMODE		0x68		/* USB Device mode */
+#define USBMODE_SDIS	(1 << 3)	/* Stream disable */
+#define USBMODE_BE	(1 << 2)	/* BE/LE endiannes select */
+#define USBMODE_CM_HC	(3 << 0)	/* host controller mode */
+#define USBMODE_CM_IDLE	(0 << 0)	/* idle state */
+
+/* Interface descriptor */
+struct usb_linux_interface_descriptor {
+	unsigned char	bLength;
+	unsigned char	bDescriptorType;
+	unsigned char	bInterfaceNumber;
+	unsigned char	bAlternateSetting;
+	unsigned char	bNumEndpoints;
+	unsigned char	bInterfaceClass;
+	unsigned char	bInterfaceSubClass;
+	unsigned char	bInterfaceProtocol;
+	unsigned char	iInterface;
+} __attribute__ ((packed));
+
+/* Configuration descriptor information.. */
+struct usb_linux_config_descriptor {
+	unsigned char	bLength;
+	unsigned char	bDescriptorType;
+	unsigned short	wTotalLength;
+	unsigned char	bNumInterfaces;
+	unsigned char	bConfigurationValue;
+	unsigned char	iConfiguration;
+	unsigned char	bmAttributes;
+	unsigned char	MaxPower;
+} __attribute__ ((packed));
+
+#if defined CONFIG_EHCI_DESC_BIG_ENDIAN
+#define	ehci_readl(x)		(*((volatile u32 *)(x)))
+#define ehci_writel(a, b)	(*((volatile u32 *)(a)) = ((volatile u32)b))
+#else
+#define ehci_readl(x)		cpu_to_le32((*((volatile u32 *)(x))))
+#define ehci_writel(a, b)	(*((volatile u32 *)(a)) = \
+					cpu_to_le32(((volatile u32)b)))
+#endif
+
+#if defined CONFIG_EHCI_MMIO_BIG_ENDIAN
+#define hc32_to_cpu(x)		be32_to_cpu((x))
+#define cpu_to_hc32(x)		cpu_to_be32((x))
+#else
+#define hc32_to_cpu(x)		le32_to_cpu((x))
+#define cpu_to_hc32(x)		cpu_to_le32((x))
+#endif
+
+#define EHCI_PS_WKOC_E		(1 << 22)	/* RW wake on over current */
+#define EHCI_PS_WKDSCNNT_E	(1 << 21)	/* RW wake on disconnect */
+#define EHCI_PS_WKCNNT_E	(1 << 20)	/* RW wake on connect */
+#define EHCI_PS_PO		(1 << 13)	/* RW port owner */
+#define EHCI_PS_PP		(1 << 12)	/* RW,RO port power */
+#define EHCI_PS_LS		(3 << 10)	/* RO line status */
+#define EHCI_PS_PR		(1 << 8)	/* RW port reset */
+#define EHCI_PS_SUSP		(1 << 7)	/* RW suspend */
+#define EHCI_PS_FPR		(1 << 6)	/* RW force port resume */
+#define EHCI_PS_OCC		(1 << 5)	/* RWC over current change */
+#define EHCI_PS_OCA		(1 << 4)	/* RO over current active */
+#define EHCI_PS_PEC		(1 << 3)	/* RWC port enable change */
+#define EHCI_PS_PE		(1 << 2)	/* RW port enable */
+#define EHCI_PS_CSC		(1 << 1)	/* RWC connect status change */
+#define EHCI_PS_CS		(1 << 0)	/* RO connect status */
+#define EHCI_PS_CLEAR		(EHCI_PS_OCC | EHCI_PS_PEC | EHCI_PS_CSC)
+
+#define EHCI_PS_IS_LOWSPEED(x)	(((x) & EHCI_PS_LS) == (1 << 10))
+
+/*
+ * Schedule Interface Space.
+ *
+ * IMPORTANT: Software must ensure that no interface data structure
+ * reachable by the EHCI host controller spans a 4K page boundary!
+ *
+ * Periodic transfers (i.e. isochronous and interrupt transfers) are
+ * not supported.
+ */
+
+/* Queue Element Transfer Descriptor (qTD). */
+struct qTD {
+	/* this part defined by EHCI spec */
+	uint32_t qt_next;		/* see EHCI 3.5.1 */
+#define	QT_NEXT_TERMINATE	1
+	uint32_t qt_altnext;		/* see EHCI 3.5.2 */
+	uint32_t qt_token;		/* see EHCI 3.5.3 */
+	uint32_t qt_buffer[5];		/* see EHCI 3.5.4 */
+	uint32_t qt_buffer_hi[5];	/* Appendix B */
+	/* pad struct for 32 byte alignment */
+	uint32_t unused[3];
+};
+
+/* Queue Head (QH). */
+struct QH {
+	uint32_t qh_link;
+#define	QH_LINK_TERMINATE	1
+#define	QH_LINK_TYPE_ITD	0
+#define	QH_LINK_TYPE_QH		2
+#define	QH_LINK_TYPE_SITD	4
+#define	QH_LINK_TYPE_FSTN	6
+	uint32_t qh_endpt1;
+	uint32_t qh_endpt2;
+	uint32_t qh_curtd;
+	struct qTD qh_overlay;
+	/*
+	 * Add dummy fill value to make the size of this struct
+	 * aligned to 32 bytes
+	 */
+	uint8_t fill[16];
+};
+
+/* Low level init functions */
+int ehci_hcd_init(void);
+int ehci_hcd_stop(void);
+
+#endif /* USB_EHCI_H */
-- 
1.7.6.3

[U-Boot] [PATCH 1/4] usb: Move ehci.h and ehci-core.h to include/usb directory

[Marek Vasut]

On Thursday, September 29, 2011 01:52:48 AM Jana Rapava wrote:
> From: Fabio Estevam <festevam@gmail.com>
> 
> Move ehci.h and ehci-core.h to include/usb directory.
> 
> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
> Cc: Remy Bohmer <linux@bohmer.net>
> Cc: Marek Vasut <marek.vasut@gmail.com>

Dear Jana Rapava,

the cover letter is missing and it's sent as a set of separate patches. Why?

Cheers

[U-Boot] [PATCH 1/4] usb: Move ehci.h and ehci-core.h to include/usb directory

[Jana Rapava]

2011/9/29 Marek Vasut <marek.vasut@gmail.com>


> the cover letter is missing


sorry, I forgot to Cc: you


> and it's sent as a set of separate patches. Why?
>

I thought this should be a patchset, it doesn't look like one logical change
to me...

Regards,
Jana Rapava

[U-Boot] [PATCH 2/4] EHCI: add callback ehci_fixup

[Jana Rapava]

Add callback to ehci_hcd.c to prepare
for solving the problem with VBUS reset on Efika.

Signed-off-by: Jana Rapava <fermata7@gmail.com>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Stefano Babic <sbabic@denx.de>

Acked-by: Marek Vasut <marek.vasut@gmail.com>
---
 drivers/usb/host/ehci-hcd.c |   14 +++++++++++++-
 1 files changed, 13 insertions(+), 1 deletions(-)

diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index bdadd46..c548276 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -536,6 +536,18 @@ static inline int min3(int a, int b, int c)
 	return a;
 }
 
+inline void __ehci_fixup(uint32_t *status_reg, uint32_t *reg_ref)
+{
+	wait_ms(50);
+}
+
+/*
+ * This is an alias to __ehci_fixup() unless user provides other definition
+ * of ehci_fixup function.
+ */
+void ehci_fixup(uint32_t *status_reg, uint32_t *reg_ref)
+	 __attribute__((weak, alias("__ehci_fixup")));
+
 int
 ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer,
 		 int length, struct devrequest *req)
@@ -709,7 +721,7 @@ ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer,
 				 * usb 2.0 specification say 50 ms resets on
 				 * root
 				 */
-				wait_ms(50);
+				ehci_fixup(status_reg, &reg);
 				/* terminate the reset */
 				ehci_writel(status_reg, reg & ~EHCI_PS_PR);
 				/*
-- 
1.7.6.3

[U-Boot] [PATCH 3/4] EHCI: adjust for mx5

[Jana Rapava]

Add macros and structures needed by Efika USB support code.
Move shared offset and bits definitions into common header file.

Signed-off-by: Jana Rapava <fermata7@gmail.com>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Stefano Babic <sbabic@denx.de>
---
 drivers/usb/host/ehci-mxc.c |   31 +--------
 include/usb/ehci-fsl.h      |  146 ++++++++++++++++++++++++++++++++++++++++++-
 2 files changed, 148 insertions(+), 29 deletions(-)

diff --git a/drivers/usb/host/ehci-mxc.c b/drivers/usb/host/ehci-mxc.c
index fde1f0f..2c1295f 100644
--- a/drivers/usb/host/ehci-mxc.c
+++ b/drivers/usb/host/ehci-mxc.c
@@ -27,31 +27,6 @@
 #include <usb/ehci.h>
 #include <usb/ehci-core.h>
 
-#define USBCTRL_OTGBASE_OFFSET	0x600
-
-#ifdef CONFIG_MX25
-#define MX25_USB_CTRL_IP_PUE_DOWN_BIT	(1<<6)
-#define MX25_USB_CTRL_HSTD_BIT		(1<<5)
-#define MX25_USB_CTRL_USBTE_BIT		(1<<4)
-#define MX25_USB_CTRL_OCPOL_OTG_BIT	(1<<3)
-#endif
-
-#ifdef CONFIG_MX31
-#define MX31_OTG_SIC_SHIFT	29
-#define MX31_OTG_SIC_MASK	(0x3 << MX31_OTG_SIC_SHIFT)
-#define MX31_OTG_PM_BIT		(1 << 24)
-
-#define MX31_H2_SIC_SHIFT	21
-#define MX31_H2_SIC_MASK	(0x3 << MX31_H2_SIC_SHIFT)
-#define MX31_H2_PM_BIT		(1 << 16)
-#define MX31_H2_DT_BIT		(1 << 5)
-
-#define MX31_H1_SIC_SHIFT	13
-#define MX31_H1_SIC_MASK	(0x3 << MX31_H1_SIC_SHIFT)
-#define MX31_H1_PM_BIT		(1 << 8)
-#define MX31_H1_DT_BIT		(1 << 4)
-#endif
-
 static int mxc_set_usbcontrol(int port, unsigned int flags)
 {
 	unsigned int v;
@@ -66,11 +41,11 @@ static int mxc_set_usbcontrol(int port, unsigned int flags)
 
 		switch (port) {
 		case 0:	/* OTG port */
-			v &= ~(MX31_OTG_SIC_MASK | MX31_OTG_PM_BIT);
+			v &= ~(MXC_OTG_SIC_MASK | MXC_OTG_PM_BIT);
 			v |= (flags & MXC_EHCI_INTERFACE_MASK)
-					<< MX31_OTG_SIC_SHIFT;
+					<< MXC_OTG_SIC_SHIFT;
 			if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
-				v |= MX31_OTG_PM_BIT;
+				v |= MXC_OTG_PM_BIT;
 
 			break;
 		case 1: /* H1 port */
diff --git a/include/usb/ehci-fsl.h b/include/usb/ehci-fsl.h
index 67600ed..727134f 100644
--- a/include/usb/ehci-fsl.h
+++ b/include/usb/ehci-fsl.h
@@ -169,6 +169,106 @@
 #define CONFIG_SYS_FSL_USB_ADDR CONFIG_SYS_MPC512x_USB_ADDR
 #endif
 
+#if defined(CONFIG_MX25) || defined(CONFIG_MX31)
+#define USBCTRL_OTGBASE_OFFSET	0x600
+#endif
+
+#ifdef CONFIG_MX25
+#define MX25_USB_CTRL_IP_PUE_DOWN_BIT	(1<<6)
+#define MX25_USB_CTRL_HSTD_BIT		(1<<5)
+#define MX25_USB_CTRL_USBTE_BIT	(1<<4)
+#define MX25_USB_CTRL_OCPOL_OTG_BIT	(1<<3)
+#endif
+
+#ifdef CONFIG_MX31
+#define MX31_H2_SIC_SHIFT	21
+#define MX31_H2_SIC_MASK	(0x3 << MX31_H2_SIC_SHIFT)
+#define MX31_H2_PM_BIT		(1 << 16)
+#define MX31_H2_DT_BIT		(1 << 5)
+
+#define MX31_H1_SIC_SHIFT	13
+#define MX31_H1_SIC_MASK	(0x3 << MX31_H1_SIC_SHIFT)
+#define MX31_H1_PM_BIT		(1 << 8)
+#define MX31_H1_DT_BIT		(1 << 4)
+#endif
+
+#if defined(CONFIG_MX51) || defined(CONFIG_MX53)
+/* offset for first USB CTRL register */
+#define MX5_CTRL_REGS_OFFSET	0x800
+#endif
+
+#if defined(CONFIG_MX51) || defined(CONFIG_MX31)
+/* USB_CTRL register bits of interest*/
+#define MXC_OTG_SIC_SHIFT	29
+#define MXC_OTG_SIC_MASK	(0x3 << MX31_OTG_SIC_SHIFT)
+#define MXC_OTG_WUE		(1 << 27)
+#define MXC_OTG_PM		(1 << 24)
+#endif
+
+#ifdef CONFIG_MX51
+#define MX51_REGISTER_LAYOUT_LENGTH	0x200
+
+/* Register offsets for MX51 */
+#define MX51_OTG_ID	0x000
+#define MX51_UH1_ID	0x200
+#define MX51_UH2_ID	0x400
+
+/* USB_CTRL register bits of interest*/
+#define MX51_OTG_PM		(1 << 24)
+#define MX51_H1_ULPI_IE	(1 << 12)
+#define MX51_H1_WUE		(1 << 11)
+#define MX51_H1_PM		(1 << 8)
+
+/* PHY_CTRL_0 register bits of interest */
+#define MX51_OTG_OVERCURD	(1 << 8)
+#define MX51_EHCI_POWERPINSE	(1 << 5)
+
+/* PHY_CTRL_1 register bits of interest */
+#define MX51_SYSCLOCK_24_MHZ	(1 << 0)
+#define MX51_SYSCLOCK_MASK	(~(0xffffffff << 2))
+
+/* USB_CTRL_1 register bits of interest */
+#define MX51_H1_EXTCLKE	(1 << 25)
+
+/* USB Host 2 CTRL register bits of interest */
+#define MX51_H2_ULPI_IE	(1 << 8)
+#define MX51_H2_WUE		(1 << 7)
+#define MX51_H2_PM		(1 << 4)
+
+/* PORTSCx bits of interest */
+#define MX51_ULPI_MODE_MASK	(2 << 30)
+#define MX51_16BIT_UTMI	(1 << 28)
+
+/* USBCMD bits of interest */
+#define MX51_ITC_IMMEDIATE_MASK	(0xff << 16)
+#endif
+
+/*
+* ULPI
+*/
+#define ULPI_ID_REGS_COUNT	4
+#define ULPI_TEST_VALUE	0x55
+#define ULPI_TIMEOUT		1000 /* some reasonable value */
+
+/* ULPI viewport control bits */
+#define ULPI_WU	(1 << 31)
+#define ULPI_SS	(1 << 27)
+#define ULPI_RWRUN	(1 << 30)
+#define ULPI_RWCTRL	(1 << 29)
+
+/* ULPI OTG Control bits of interest */
+#define ULPI_OTG_EXT_VBUS_IND	(1 << 7)
+#define ULPI_OTG_DM_PULLDOWN	(1 << 2)
+#define ULPI_OTG_DP_PULLDOWN	(1 << 1)
+#define ULPI_OTG_DRV_VBUS	(1 << 5)
+#define ULPI_OTG_DRV_VBUS_EXT	(1 << 6)
+#define ULPI_OTG_CHRG_VBUS	(1 << 4)
+
+/* ULPI Function Control bits of interest */
+#define ULPI_FC_XCVR_SELECT	(1 << 0)
+#define ULPI_FC_OPMODE_NORMAL	(0 << 3)
+#define ULPI_FC_SUSPENDM_PWRED	(1 << 6)
+
 /*
  * USB Registers
  */
@@ -210,7 +310,7 @@ struct usb_ehci {
 	u32	txfilltuning;	/* 0x164 - Host TT Transmit
 					   pre-buffer packet tuning */
 	u8	res7[0x8];
-	u32	ulpi_viewpoint;	/* 0x170 - ULPI Reister Access */
+	u32	ulpi_viewpoint;	/* 0x170 - ULPI Register Access */
 	u8	res8[0xc];
 	u32	config_flag;	/* 0x180 - Configured Flag Register */
 	u32	portsc;		/* 0x184 - Port status/control */
@@ -242,4 +342,48 @@ struct usb_ehci {
 	u8	res13[0xafc];
 };
 
+struct mx5_usb_control_regs {
+	u32	usbctrl;	/* 0x800 - USB Control */
+	u32	otgmirror;	/* 0x804 - OTG Port Mirror */
+	u32	phyctrl0;	/* 0x808 - UTMI PHY Control Register 0 */
+	u32	phyctrl1;	/* 0x80C - UTMI PHY Control Register 1 */
+	u32	usbctrl1;	/* 0x810 - USB Control Register 1 */
+	u32	uh2ctrl;	/* 0x814 - USB Host2 Control */
+	u32	uh3ctrl;	/* 0x818 - USB Host3 Control */
+};
+
+struct mxc_ulpi_regs {
+	u8	vendor_id_low;		/* 0x00 - Vendor ID lower byte */
+	u8	vendor_id_high;		/* 0x01 - Vendor ID upper byte */
+	u8	product_id_low;		/* 0x02 - Product ID lower byte */
+	u8	product_id_high;	/* 0x03 - Product ID higher byte */
+	/* Function Control; 0x04 - 0x06 Read, 0x04 Write */
+	u8	function_ctrl_write;
+	u8	function_ctrl_set;	/* 0x05 Set */
+	u8	function_ctrl_clear;	/* 0x06 Clear */
+	/* Interface Control; 0x07 - 0x09 Read, 0x07 Write */
+	u8	iface_ctrl_write;
+	u8	iface_ctrl_set;		/* 0x08 Set */
+	u8	iface_ctrl_clear;	/* 0x09 Clear */
+	/* OTG Control; 0x0A - 0x0C Read, 0x0A Write */
+	u8	otg_ctrl_write;
+	u8	otg_ctrl_set;		/* 0x0B Set */
+	u8	otg_ctrl_clear;		/* 0x0C Clear */
+	/* USB Interrupt Enable Rising; 0x0D - 0x0F Read, 0x0D Write */
+	u8	usb_ie_rising_write;
+	u8	usb_ie_rising_set;	/* 0x0E Set */
+	u8	usb_ie_rising_clear;	/* 0x0F Clear */
+	/* USB Interrupt Enable Falling; 0x10 - 0x12 Read, 0x10 Write */
+	u8	usb_ie_falling_write;
+	u8	usb_ie_falling_set;	/* 0x11 Set */
+	u8	usb_ie_falling_clear;	/* 0x12 Clear */
+	u8	usb_int_status;		/* 0x13 - USB Interrupt Status */
+	u8	usb_int_latch;		/* 0x14 - USB Interrupt Latch */
+	u8	debug;			/* 0x15 - Debug */
+	/* Scratch Register; 0x16 - 0x18 Read, 0x16 Write */
+	u8	scratch_write;
+	u8	scratch_set;		/* 0x17 Set */
+	u8	scratch_clear;		/* 0x18 Clear*/
+};
+
 #endif /* _EHCI_FSL_H */
-- 
1.7.6.3

[U-Boot] [PATCH 3/4] EHCI: adjust for mx5

[Igor Grinberg]

Hi Jana,

On 09/29/11 02:52, Jana Rapava wrote:
> Add macros and structures needed by Efika USB support code.
> Move shared offset and bits definitions into common header file.
> 
> Signed-off-by: Jana Rapava <fermata7@gmail.com>
> Cc: Marek Vasut <marek.vasut@gmail.com>
> Cc: Remy Bohmer <linux@bohmer.net>
> Cc: Stefano Babic <sbabic@denx.de>
> ---
>  drivers/usb/host/ehci-mxc.c |   31 +--------
>  include/usb/ehci-fsl.h      |  146 ++++++++++++++++++++++++++++++++++++++++++-
>  2 files changed, 148 insertions(+), 29 deletions(-)
> 

[...]

> diff --git a/include/usb/ehci-fsl.h b/include/usb/ehci-fsl.h
> index 67600ed..727134f 100644
> --- a/include/usb/ehci-fsl.h
> +++ b/include/usb/ehci-fsl.h

[...]

> @@ -169,6 +169,106 @@
>  #define CONFIG_SYS_FSL_USB_ADDR CONFIG_SYS_MPC512x_USB_ADDR
>  #endif
>  
> +#if defined(CONFIG_MX25) || defined(CONFIG_MX31)
> +#define USBCTRL_OTGBASE_OFFSET	0x600
> +#endif
> +
> +#ifdef CONFIG_MX25
> +#define MX25_USB_CTRL_IP_PUE_DOWN_BIT	(1<<6)
> +#define MX25_USB_CTRL_HSTD_BIT		(1<<5)
> +#define MX25_USB_CTRL_USBTE_BIT	(1<<4)
> +#define MX25_USB_CTRL_OCPOL_OTG_BIT	(1<<3)

Why not align the above?
Also, there should be spaces around the shift operators.

> +#endif
> +
> +#ifdef CONFIG_MX31
> +#define MX31_H2_SIC_SHIFT	21
> +#define MX31_H2_SIC_MASK	(0x3 << MX31_H2_SIC_SHIFT)
> +#define MX31_H2_PM_BIT		(1 << 16)
> +#define MX31_H2_DT_BIT		(1 << 5)

Alignment?

> +
> +#define MX31_H1_SIC_SHIFT	13
> +#define MX31_H1_SIC_MASK	(0x3 << MX31_H1_SIC_SHIFT)
> +#define MX31_H1_PM_BIT		(1 << 8)
> +#define MX31_H1_DT_BIT		(1 << 4)

ditto

> +#endif
> +
> +#if defined(CONFIG_MX51) || defined(CONFIG_MX53)
> +/* offset for first USB CTRL register */
> +#define MX5_CTRL_REGS_OFFSET	0x800
> +#endif
> +
> +#if defined(CONFIG_MX51) || defined(CONFIG_MX31)
> +/* USB_CTRL register bits of interest*/
> +#define MXC_OTG_SIC_SHIFT	29
> +#define MXC_OTG_SIC_MASK	(0x3 << MX31_OTG_SIC_SHIFT)
> +#define MXC_OTG_WUE		(1 << 27)
> +#define MXC_OTG_PM		(1 << 24)
> +#endif
> +
> +#ifdef CONFIG_MX51
> +#define MX51_REGISTER_LAYOUT_LENGTH	0x200
> +
> +/* Register offsets for MX51 */
> +#define MX51_OTG_ID	0x000
> +#define MX51_UH1_ID	0x200
> +#define MX51_UH2_ID	0x400
> +
> +/* USB_CTRL register bits of interest*/
> +#define MX51_OTG_PM		(1 << 24)
> +#define MX51_H1_ULPI_IE	(1 << 12)
> +#define MX51_H1_WUE		(1 << 11)
> +#define MX51_H1_PM		(1 << 8)
> +
> +/* PHY_CTRL_0 register bits of interest */
> +#define MX51_OTG_OVERCURD	(1 << 8)
> +#define MX51_EHCI_POWERPINSE	(1 << 5)
> +
> +/* PHY_CTRL_1 register bits of interest */
> +#define MX51_SYSCLOCK_24_MHZ	(1 << 0)
> +#define MX51_SYSCLOCK_MASK	(~(0xffffffff << 2))

This is something, I don't understand.
Isn't it just 0x3?

> +
> +/* USB_CTRL_1 register bits of interest */
> +#define MX51_H1_EXTCLKE	(1 << 25)
> +
> +/* USB Host 2 CTRL register bits of interest */
> +#define MX51_H2_ULPI_IE	(1 << 8)
> +#define MX51_H2_WUE		(1 << 7)
> +#define MX51_H2_PM		(1 << 4)
> +
> +/* PORTSCx bits of interest */
> +#define MX51_ULPI_MODE_MASK	(2 << 30)
> +#define MX51_16BIT_UTMI	(1 << 28)
> +
> +/* USBCMD bits of interest */
> +#define MX51_ITC_IMMEDIATE_MASK	(0xff << 16)
> +#endif
> +
> +/*
> +* ULPI
> +*/

Something went wrong with the comment formatting here...

> +#define ULPI_ID_REGS_COUNT	4
> +#define ULPI_TEST_VALUE	0x55
> +#define ULPI_TIMEOUT		1000 /* some reasonable value */
> +
> +/* ULPI viewport control bits */
> +#define ULPI_WU	(1 << 31)
> +#define ULPI_SS	(1 << 27)
> +#define ULPI_RWRUN	(1 << 30)
> +#define ULPI_RWCTRL	(1 << 29)
> +
> +/* ULPI OTG Control bits of interest */
> +#define ULPI_OTG_EXT_VBUS_IND	(1 << 7)
> +#define ULPI_OTG_DM_PULLDOWN	(1 << 2)
> +#define ULPI_OTG_DP_PULLDOWN	(1 << 1)
> +#define ULPI_OTG_DRV_VBUS	(1 << 5)
> +#define ULPI_OTG_DRV_VBUS_EXT	(1 << 6)
> +#define ULPI_OTG_CHRG_VBUS	(1 << 4)

alignment

> +
> +/* ULPI Function Control bits of interest */
> +#define ULPI_FC_XCVR_SELECT	(1 << 0)
> +#define ULPI_FC_OPMODE_NORMAL	(0 << 3)
> +#define ULPI_FC_SUSPENDM_PWRED	(1 << 6)

ditto

[...]

> +
> +struct mxc_ulpi_regs {
> +	u8	vendor_id_low;		/* 0x00 - Vendor ID lower byte */
> +	u8	vendor_id_high;		/* 0x01 - Vendor ID upper byte */
> +	u8	product_id_low;		/* 0x02 - Product ID lower byte */
> +	u8	product_id_high;	/* 0x03 - Product ID higher byte */
> +	/* Function Control; 0x04 - 0x06 Read, 0x04 Write */
> +	u8	function_ctrl_write;
> +	u8	function_ctrl_set;	/* 0x05 Set */
> +	u8	function_ctrl_clear;	/* 0x06 Clear */
> +	/* Interface Control; 0x07 - 0x09 Read, 0x07 Write */
> +	u8	iface_ctrl_write;
> +	u8	iface_ctrl_set;		/* 0x08 Set */
> +	u8	iface_ctrl_clear;	/* 0x09 Clear */
> +	/* OTG Control; 0x0A - 0x0C Read, 0x0A Write */
> +	u8	otg_ctrl_write;
> +	u8	otg_ctrl_set;		/* 0x0B Set */
> +	u8	otg_ctrl_clear;		/* 0x0C Clear */
> +	/* USB Interrupt Enable Rising; 0x0D - 0x0F Read, 0x0D Write */
> +	u8	usb_ie_rising_write;
> +	u8	usb_ie_rising_set;	/* 0x0E Set */
> +	u8	usb_ie_rising_clear;	/* 0x0F Clear */
> +	/* USB Interrupt Enable Falling; 0x10 - 0x12 Read, 0x10 Write */
> +	u8	usb_ie_falling_write;
> +	u8	usb_ie_falling_set;	/* 0x11 Set */
> +	u8	usb_ie_falling_clear;	/* 0x12 Clear */
> +	u8	usb_int_status;		/* 0x13 - USB Interrupt Status */
> +	u8	usb_int_latch;		/* 0x14 - USB Interrupt Latch */
> +	u8	debug;			/* 0x15 - Debug */
> +	/* Scratch Register; 0x16 - 0x18 Read, 0x16 Write */
> +	u8	scratch_write;
> +	u8	scratch_set;		/* 0x17 Set */
> +	u8	scratch_clear;		/* 0x18 Clear*/
> +};

These are the generic ULPI specification registers
and not mxc specific.
I'd expect to have them in a more generic location.

> +
>  #endif /* _EHCI_FSL_H */

-- 
Regards,
Igor.

[U-Boot] [PATCH 3/4] EHCI: adjust for mx5

[Jana Rapava]

2011/10/31 Igor Grinberg <grinberg@compulab.co.il>


> > +struct mxc_ulpi_regs {
> > +     u8      vendor_id_low;          /* 0x00 - Vendor ID lower byte */
> > +     u8      vendor_id_high;         /* 0x01 - Vendor ID upper byte */
> > +     u8      product_id_low;         /* 0x02 - Product ID lower byte */
> > +     u8      product_id_high;        /* 0x03 - Product ID higher byte */
> > +     /* Function Control; 0x04 - 0x06 Read, 0x04 Write */
> > +     u8      function_ctrl_write;
> > +     u8      function_ctrl_set;      /* 0x05 Set */
> > +     u8      function_ctrl_clear;    /* 0x06 Clear */
> > +     /* Interface Control; 0x07 - 0x09 Read, 0x07 Write */
> > +     u8      iface_ctrl_write;
> > +     u8      iface_ctrl_set;         /* 0x08 Set */
> > +     u8      iface_ctrl_clear;       /* 0x09 Clear */
> > +     /* OTG Control; 0x0A - 0x0C Read, 0x0A Write */
> > +     u8      otg_ctrl_write;
> > +     u8      otg_ctrl_set;           /* 0x0B Set */
> > +     u8      otg_ctrl_clear;         /* 0x0C Clear */
> > +     /* USB Interrupt Enable Rising; 0x0D - 0x0F Read, 0x0D Write */
> > +     u8      usb_ie_rising_write;
> > +     u8      usb_ie_rising_set;      /* 0x0E Set */
> > +     u8      usb_ie_rising_clear;    /* 0x0F Clear */
> > +     /* USB Interrupt Enable Falling; 0x10 - 0x12 Read, 0x10 Write */
> > +     u8      usb_ie_falling_write;
> > +     u8      usb_ie_falling_set;     /* 0x11 Set */
> > +     u8      usb_ie_falling_clear;   /* 0x12 Clear */
> > +     u8      usb_int_status;         /* 0x13 - USB Interrupt Status */
> > +     u8      usb_int_latch;          /* 0x14 - USB Interrupt Latch */
> > +     u8      debug;                  /* 0x15 - Debug */
> > +     /* Scratch Register; 0x16 - 0x18 Read, 0x16 Write */
> > +     u8      scratch_write;
> > +     u8      scratch_set;            /* 0x17 Set */
> > +     u8      scratch_clear;          /* 0x18 Clear*/
> > +};
>
>
> These are the generic ULPI specification registers
> and not mxc specific.
> I'd expect to have them in a more generic location.
>

This would be fixed in general ULPI support patch I'm working on. It should
be ready for posting in a few days.


> --
>
Regards,
> Igor.
>

[U-Boot] [PATCH 3/4] EHCI: adjust for mx5

[Igor Grinberg]

Hi Jana,

On 10/31/11 22:46, Jana Rapava wrote:
> 
> 
> 2011/10/31 Igor Grinberg <grinberg at compulab.co.il <mailto:grinberg@compulab.co.il>>
>  
> 
>     > +struct mxc_ulpi_regs {
>     > +     u8      vendor_id_low;          /* 0x00 - Vendor ID lower byte */
>     > +     u8      vendor_id_high;         /* 0x01 - Vendor ID upper byte */
>     > +     u8      product_id_low;         /* 0x02 - Product ID lower byte */
>     > +     u8      product_id_high;        /* 0x03 - Product ID higher byte */
>     > +     /* Function Control; 0x04 - 0x06 Read, 0x04 Write */
>     > +     u8      function_ctrl_write;
>     > +     u8      function_ctrl_set;      /* 0x05 Set */
>     > +     u8      function_ctrl_clear;    /* 0x06 Clear */
>     > +     /* Interface Control; 0x07 - 0x09 Read, 0x07 Write */
>     > +     u8      iface_ctrl_write;
>     > +     u8      iface_ctrl_set;         /* 0x08 Set */
>     > +     u8      iface_ctrl_clear;       /* 0x09 Clear */
>     > +     /* OTG Control; 0x0A - 0x0C Read, 0x0A Write */
>     > +     u8      otg_ctrl_write;
>     > +     u8      otg_ctrl_set;           /* 0x0B Set */
>     > +     u8      otg_ctrl_clear;         /* 0x0C Clear */
>     > +     /* USB Interrupt Enable Rising; 0x0D - 0x0F Read, 0x0D Write */
>     > +     u8      usb_ie_rising_write;
>     > +     u8      usb_ie_rising_set;      /* 0x0E Set */
>     > +     u8      usb_ie_rising_clear;    /* 0x0F Clear */
>     > +     /* USB Interrupt Enable Falling; 0x10 - 0x12 Read, 0x10 Write */
>     > +     u8      usb_ie_falling_write;
>     > +     u8      usb_ie_falling_set;     /* 0x11 Set */
>     > +     u8      usb_ie_falling_clear;   /* 0x12 Clear */
>     > +     u8      usb_int_status;         /* 0x13 - USB Interrupt Status */
>     > +     u8      usb_int_latch;          /* 0x14 - USB Interrupt Latch */
>     > +     u8      debug;                  /* 0x15 - Debug */
>     > +     /* Scratch Register; 0x16 - 0x18 Read, 0x16 Write */
>     > +     u8      scratch_write;
>     > +     u8      scratch_set;            /* 0x17 Set */
>     > +     u8      scratch_clear;          /* 0x18 Clear*/
>     > +};
> 
> 
>     These are the generic ULPI specification registers
>     and not mxc specific.
>     I'd expect to have them in a more generic location.
> 
> 
> This would be fixed in general ULPI support patch I'm working on. It should be ready for posting in a few days.

Good!
Still, I'd expect this to be put in a separate location.
This way, your general ULPI support patch will introduce
less changes to this file.
Submitting something and then moving it around is not
a good idea.

Another way would be to wait for the general ULPI support patch
and then resubmit this patch set on top of the ULPI patch.

You choose, what works best for you :)

-- 
Regards,
Igor.

[U-Boot] [PATCH v2 3/4] EHCI: adjust for mx5

[Jana Rapava]

Add macros and structures needed by Efika USB support code.
Move shared offset and bits definitions into common header file.

Signed-off-by: Jana Rapava <fermata7@gmail.com>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
---
Changes for v2:
	- whitespace and coding style changes (no actual changes)

 drivers/usb/host/ehci-mxc.c |   31 +--------
 include/usb/ehci-fsl.h      |  146 ++++++++++++++++++++++++++++++++++++++++++-
 2 files changed, 148 insertions(+), 29 deletions(-)

diff --git a/drivers/usb/host/ehci-mxc.c b/drivers/usb/host/ehci-mxc.c
index fde1f0f..2c1295f 100644
--- a/drivers/usb/host/ehci-mxc.c
+++ b/drivers/usb/host/ehci-mxc.c
@@ -27,31 +27,6 @@
 #include <usb/ehci.h>
 #include <usb/ehci-core.h>
 
-#define USBCTRL_OTGBASE_OFFSET	0x600
-
-#ifdef CONFIG_MX25
-#define MX25_USB_CTRL_IP_PUE_DOWN_BIT	(1<<6)
-#define MX25_USB_CTRL_HSTD_BIT		(1<<5)
-#define MX25_USB_CTRL_USBTE_BIT		(1<<4)
-#define MX25_USB_CTRL_OCPOL_OTG_BIT	(1<<3)
-#endif
-
-#ifdef CONFIG_MX31
-#define MX31_OTG_SIC_SHIFT	29
-#define MX31_OTG_SIC_MASK	(0x3 << MX31_OTG_SIC_SHIFT)
-#define MX31_OTG_PM_BIT		(1 << 24)
-
-#define MX31_H2_SIC_SHIFT	21
-#define MX31_H2_SIC_MASK	(0x3 << MX31_H2_SIC_SHIFT)
-#define MX31_H2_PM_BIT		(1 << 16)
-#define MX31_H2_DT_BIT		(1 << 5)
-
-#define MX31_H1_SIC_SHIFT	13
-#define MX31_H1_SIC_MASK	(0x3 << MX31_H1_SIC_SHIFT)
-#define MX31_H1_PM_BIT		(1 << 8)
-#define MX31_H1_DT_BIT		(1 << 4)
-#endif
-
 static int mxc_set_usbcontrol(int port, unsigned int flags)
 {
 	unsigned int v;
@@ -66,11 +41,11 @@ static int mxc_set_usbcontrol(int port, unsigned int flags)
 
 		switch (port) {
 		case 0:	/* OTG port */
-			v &= ~(MX31_OTG_SIC_MASK | MX31_OTG_PM_BIT);
+			v &= ~(MXC_OTG_SIC_MASK | MXC_OTG_PM_BIT);
 			v |= (flags & MXC_EHCI_INTERFACE_MASK)
-					<< MX31_OTG_SIC_SHIFT;
+					<< MXC_OTG_SIC_SHIFT;
 			if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
-				v |= MX31_OTG_PM_BIT;
+				v |= MXC_OTG_PM_BIT;
 
 			break;
 		case 1: /* H1 port */
diff --git a/include/usb/ehci-fsl.h b/include/usb/ehci-fsl.h
index 67600ed..f957c65 100644
--- a/include/usb/ehci-fsl.h
+++ b/include/usb/ehci-fsl.h
@@ -169,6 +169,106 @@
 #define CONFIG_SYS_FSL_USB_ADDR CONFIG_SYS_MPC512x_USB_ADDR
 #endif
 
+#if defined(CONFIG_MX25) || defined(CONFIG_MX31)
+#define USBCTRL_OTGBASE_OFFSET	0x600
+#endif
+
+#ifdef CONFIG_MX25
+#define MX25_USB_CTRL_IP_PUE_DOWN_BIT	(1 << 6)
+#define MX25_USB_CTRL_HSTD_BIT		(1 << 5)
+#define MX25_USB_CTRL_USBTE_BIT		(1 << 4)
+#define MX25_USB_CTRL_OCPOL_OTG_BIT	(1 << 3)
+#endif
+
+#ifdef CONFIG_MX31
+#define MX31_H2_SIC_SHIFT	21
+#define MX31_H2_SIC_MASK	(0x3 << MX31_H2_SIC_SHIFT)
+#define MX31_H2_PM_BIT		(1 << 16)
+#define MX31_H2_DT_BIT		(1 << 5)
+
+#define MX31_H1_SIC_SHIFT	13
+#define MX31_H1_SIC_MASK	(0x3 << MX31_H1_SIC_SHIFT)
+#define MX31_H1_PM_BIT		(1 << 8)
+#define MX31_H1_DT_BIT		(1 << 4)
+#endif
+
+#if defined(CONFIG_MX51) || defined(CONFIG_MX53)
+/* offset for first USB CTRL register */
+#define MX5_CTRL_REGS_OFFSET	0x800
+#endif
+
+#if defined(CONFIG_MX51) || defined(CONFIG_MX31)
+/* USB_CTRL register bits of interest */
+#define MXC_OTG_SIC_SHIFT	29
+#define MXC_OTG_SIC_MASK	(0x3 << MX31_OTG_SIC_SHIFT)
+#define MXC_OTG_WUE		(1 << 27)
+#define MXC_OTG_PM		(1 << 24)
+#endif
+
+#ifdef CONFIG_MX51
+#define MX51_REGISTER_LAYOUT_LENGTH	0x200
+
+/* Register offsets for MX51 */
+#define MX51_OTG_ID	0x000
+#define MX51_UH1_ID	0x200
+#define MX51_UH2_ID	0x400
+
+/* USB_CTRL register bits of interest */
+#define MX51_OTG_PM		(1 << 24)
+#define MX51_H1_ULPI_IE		(1 << 12)
+#define MX51_H1_WUE		(1 << 11)
+#define MX51_H1_PM		(1 << 8)
+
+/* PHY_CTRL_0 register bits of interest */
+#define MX51_OTG_OVERCURD	(1 << 8)
+#define MX51_EHCI_POWERPINSE	(1 << 5)
+
+/* PHY_CTRL_1 register bits of interest */
+#define MX51_SYSCLOCK_24_MHZ	(1 << 0)
+#define MX51_SYSCLOCK_MASK	(0x3)
+
+/* USB_CTRL_1 register bits of interest */
+#define MX51_H1_EXTCLKE		(1 << 25)
+
+/* USB Host 2 CTRL register bits of interest */
+#define MX51_H2_ULPI_IE		(1 << 8)
+#define MX51_H2_WUE		(1 << 7)
+#define MX51_H2_PM		(1 << 4)
+
+/* PORTSCx bits of interest */
+#define MX51_ULPI_MODE_MASK	(2 << 30)
+#define MX51_16BIT_UTMI		(1 << 28)
+
+/* USBCMD bits of interest */
+#define MX51_ITC_IMMEDIATE_MASK	(0xff << 16)
+#endif
+
+/*
+* ULPI
+*/
+#define ULPI_ID_REGS_COUNT	4
+#define ULPI_TEST_VALUE		0x55
+#define ULPI_TIMEOUT		1000 /* some reasonable value */
+
+/* ULPI viewport control bits */
+#define ULPI_WU		(1 << 31)
+#define ULPI_SS		(1 << 27)
+#define ULPI_RWRUN	(1 << 30)
+#define ULPI_RWCTRL	(1 << 29)
+
+/* ULPI OTG Control bits of interest */
+#define ULPI_OTG_EXT_VBUS_IND	(1 << 7)
+#define ULPI_OTG_DM_PULLDOWN	(1 << 2)
+#define ULPI_OTG_DP_PULLDOWN	(1 << 1)
+#define ULPI_OTG_DRV_VBUS	(1 << 5)
+#define ULPI_OTG_DRV_VBUS_EXT	(1 << 6)
+#define ULPI_OTG_CHRG_VBUS	(1 << 4)
+
+/* ULPI Function Control bits of interest */
+#define ULPI_FC_XCVR_SELECT	(1 << 0)
+#define ULPI_FC_OPMODE_NORMAL	(0 << 3)
+#define ULPI_FC_SUSPENDM_PWRED	(1 << 6)
+
 /*
  * USB Registers
  */
@@ -210,7 +310,7 @@ struct usb_ehci {
 	u32	txfilltuning;	/* 0x164 - Host TT Transmit
 					   pre-buffer packet tuning */
 	u8	res7[0x8];
-	u32	ulpi_viewpoint;	/* 0x170 - ULPI Reister Access */
+	u32	ulpi_viewpoint;	/* 0x170 - ULPI Register Access */
 	u8	res8[0xc];
 	u32	config_flag;	/* 0x180 - Configured Flag Register */
 	u32	portsc;		/* 0x184 - Port status/control */
@@ -242,4 +342,48 @@ struct usb_ehci {
 	u8	res13[0xafc];
 };
 
+struct mx5_usb_control_regs {
+	u32	usbctrl;	/* 0x800 - USB Control */
+	u32	otgmirror;	/* 0x804 - OTG Port Mirror */
+	u32	phyctrl0;	/* 0x808 - UTMI PHY Control Register 0 */
+	u32	phyctrl1;	/* 0x80C - UTMI PHY Control Register 1 */
+	u32	usbctrl1;	/* 0x810 - USB Control Register 1 */
+	u32	uh2ctrl;	/* 0x814 - USB Host2 Control */
+	u32	uh3ctrl;	/* 0x818 - USB Host3 Control */
+};
+
+struct mxc_ulpi_regs {
+	u8	vendor_id_low;		/* 0x00 - Vendor ID lower byte */
+	u8	vendor_id_high;		/* 0x01 - Vendor ID upper byte */
+	u8	product_id_low;		/* 0x02 - Product ID lower byte */
+	u8	product_id_high;	/* 0x03 - Product ID higher byte */
+	/* Function Control; 0x04 - 0x06 Read, 0x04 Write */
+	u8	function_ctrl_write;
+	u8	function_ctrl_set;	/* 0x05 Set */
+	u8	function_ctrl_clear;	/* 0x06 Clear */
+	/* Interface Control; 0x07 - 0x09 Read, 0x07 Write */
+	u8	iface_ctrl_write;
+	u8	iface_ctrl_set;		/* 0x08 Set */
+	u8	iface_ctrl_clear;	/* 0x09 Clear */
+	/* OTG Control; 0x0A - 0x0C Read, 0x0A Write */
+	u8	otg_ctrl_write;
+	u8	otg_ctrl_set;		/* 0x0B Set */
+	u8	otg_ctrl_clear;		/* 0x0C Clear */
+	/* USB Interrupt Enable Rising; 0x0D - 0x0F Read, 0x0D Write */
+	u8	usb_ie_rising_write;
+	u8	usb_ie_rising_set;	/* 0x0E Set */
+	u8	usb_ie_rising_clear;	/* 0x0F Clear */
+	/* USB Interrupt Enable Falling; 0x10 - 0x12 Read, 0x10 Write */
+	u8	usb_ie_falling_write;
+	u8	usb_ie_falling_set;	/* 0x11 Set */
+	u8	usb_ie_falling_clear;	/* 0x12 Clear */
+	u8	usb_int_status;		/* 0x13 - USB Interrupt Status */
+	u8	usb_int_latch;		/* 0x14 - USB Interrupt Latch */
+	u8	debug;			/* 0x15 - Debug */
+	/* Scratch Register; 0x16 - 0x18 Read, 0x16 Write */
+	u8	scratch_write;
+	u8	scratch_set;		/* 0x17 Set */
+	u8	scratch_clear;		/* 0x18 Clear*/
+};
+
 #endif /* _EHCI_FSL_H */
-- 
1.7.6.3

[U-Boot] [PATCH v2 3/4] EHCI: adjust for mx5

[Marek Vasut]

> Add macros and structures needed by Efika USB support code.
> Move shared offset and bits definitions into common header file.
> 
> Signed-off-by: Jana Rapava <fermata7@gmail.com>
> Cc: Marek Vasut <marek.vasut@gmail.com>
> Cc: Remy Bohmer <linux@bohmer.net>
> Cc: Stefano Babic <sbabic@denx.de>
> Cc: Igor Grinberg <grinberg@compulab.co.il>
> ---
> Changes for v2:
> 	- whitespace and coding style changes (no actual changes)

Do you see the contradiction here ?

M

[U-Boot] [PATCH v2 3/4] EHCI: adjust for mx5

[Igor Grinberg]

On 11/01/11 01:35, Jana Rapava wrote:
> Add macros and structures needed by Efika USB support code.
> Move shared offset and bits definitions into common header file.
> 
> Signed-off-by: Jana Rapava <fermata7@gmail.com>
> Cc: Marek Vasut <marek.vasut@gmail.com>
> Cc: Remy Bohmer <linux@bohmer.net>
> Cc: Stefano Babic <sbabic@denx.de>
> Cc: Igor Grinberg <grinberg@compulab.co.il>
> ---
> Changes for v2:
> 	- whitespace and coding style changes (no actual changes)
> 
>  drivers/usb/host/ehci-mxc.c |   31 +--------
>  include/usb/ehci-fsl.h      |  146 ++++++++++++++++++++++++++++++++++++++++++-
>  2 files changed, 148 insertions(+), 29 deletions(-)

[...]

> diff --git a/include/usb/ehci-fsl.h b/include/usb/ehci-fsl.h
> index 67600ed..f957c65 100644
> --- a/include/usb/ehci-fsl.h
> +++ b/include/usb/ehci-fsl.h

[...]

> +
> +/*
> +* ULPI
> +*/

missed this one?

> +#define ULPI_ID_REGS_COUNT	4
> +#define ULPI_TEST_VALUE		0x55
> +#define ULPI_TIMEOUT		1000 /* some reasonable value */
> +
> +/* ULPI viewport control bits */
> +#define ULPI_WU		(1 << 31)
> +#define ULPI_SS		(1 << 27)
> +#define ULPI_RWRUN	(1 << 30)
> +#define ULPI_RWCTRL	(1 << 29)
> +
> +/* ULPI OTG Control bits of interest */
> +#define ULPI_OTG_EXT_VBUS_IND	(1 << 7)
> +#define ULPI_OTG_DM_PULLDOWN	(1 << 2)
> +#define ULPI_OTG_DP_PULLDOWN	(1 << 1)
> +#define ULPI_OTG_DRV_VBUS	(1 << 5)
> +#define ULPI_OTG_DRV_VBUS_EXT	(1 << 6)
> +#define ULPI_OTG_CHRG_VBUS	(1 << 4)
> +
> +/* ULPI Function Control bits of interest */
> +#define ULPI_FC_XCVR_SELECT	(1 << 0)
> +#define ULPI_FC_OPMODE_NORMAL	(0 << 3)
> +#define ULPI_FC_SUSPENDM_PWRED	(1 << 6)

These are also ULPI specification defined offsets, right?
So the same as for the below, should apply.

[...]

> +
> +struct mxc_ulpi_regs {
> +	u8	vendor_id_low;		/* 0x00 - Vendor ID lower byte */
> +	u8	vendor_id_high;		/* 0x01 - Vendor ID upper byte */
> +	u8	product_id_low;		/* 0x02 - Product ID lower byte */
> +	u8	product_id_high;	/* 0x03 - Product ID higher byte */
> +	/* Function Control; 0x04 - 0x06 Read, 0x04 Write */
> +	u8	function_ctrl_write;
> +	u8	function_ctrl_set;	/* 0x05 Set */
> +	u8	function_ctrl_clear;	/* 0x06 Clear */
> +	/* Interface Control; 0x07 - 0x09 Read, 0x07 Write */
> +	u8	iface_ctrl_write;
> +	u8	iface_ctrl_set;		/* 0x08 Set */
> +	u8	iface_ctrl_clear;	/* 0x09 Clear */
> +	/* OTG Control; 0x0A - 0x0C Read, 0x0A Write */
> +	u8	otg_ctrl_write;
> +	u8	otg_ctrl_set;		/* 0x0B Set */
> +	u8	otg_ctrl_clear;		/* 0x0C Clear */
> +	/* USB Interrupt Enable Rising; 0x0D - 0x0F Read, 0x0D Write */
> +	u8	usb_ie_rising_write;
> +	u8	usb_ie_rising_set;	/* 0x0E Set */
> +	u8	usb_ie_rising_clear;	/* 0x0F Clear */
> +	/* USB Interrupt Enable Falling; 0x10 - 0x12 Read, 0x10 Write */
> +	u8	usb_ie_falling_write;
> +	u8	usb_ie_falling_set;	/* 0x11 Set */
> +	u8	usb_ie_falling_clear;	/* 0x12 Clear */
> +	u8	usb_int_status;		/* 0x13 - USB Interrupt Status */
> +	u8	usb_int_latch;		/* 0x14 - USB Interrupt Latch */
> +	u8	debug;			/* 0x15 - Debug */
> +	/* Scratch Register; 0x16 - 0x18 Read, 0x16 Write */
> +	u8	scratch_write;
> +	u8	scratch_set;		/* 0x17 Set */
> +	u8	scratch_clear;		/* 0x18 Clear*/
> +};

Do you already have a header for the generic ULPI support?
Can't the above be put in that header and the next patch set
(ULPI) will just extend this?


-- 
Regards,
Igor.

[U-Boot] [PATCH v2 3/4] EHCI: adjust for mx5

[Jana Rapava]

2011/11/1 Igor Grinberg <grinberg@compulab.co.il>

>
> Do you already have a header for the generic ULPI support?
> Can't the above be put in that header and the next patch set
> (ULPI) will just extend this?
>

Ok, I'll send ulpi header as a separate patch, thanks for suggestion.

>
>
> --
> Regards,
> Igor.
>

[U-Boot] [PATCH v3 3/4] EHCI: adjust for mx5

[Jana Rapava]

Add macros and structures needed by Efika USB support code.
Move shared offset and bits definitions into common header file.

Signed-off-by: Jana Rapava <fermata7@gmail.com>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
---
Changes for v2:
	- whitespace and coding style changes
Changes for v3:
	- ULPI-related definitions moved to ULPI header file
 
 drivers/usb/host/ehci-mxc.c |   31 +--------------
 include/usb/ehci-fsl.h      |   86 ++++++++++++++++++++++++++++++++++++++++++-
 2 files changed, 88 insertions(+), 29 deletions(-)

diff --git a/drivers/usb/host/ehci-mxc.c b/drivers/usb/host/ehci-mxc.c
index fde1f0f..2c1295f 100644
--- a/drivers/usb/host/ehci-mxc.c
+++ b/drivers/usb/host/ehci-mxc.c
@@ -27,31 +27,6 @@
 #include <usb/ehci.h>
 #include <usb/ehci-core.h>
 
-#define USBCTRL_OTGBASE_OFFSET	0x600
-
-#ifdef CONFIG_MX25
-#define MX25_USB_CTRL_IP_PUE_DOWN_BIT	(1<<6)
-#define MX25_USB_CTRL_HSTD_BIT		(1<<5)
-#define MX25_USB_CTRL_USBTE_BIT		(1<<4)
-#define MX25_USB_CTRL_OCPOL_OTG_BIT	(1<<3)
-#endif
-
-#ifdef CONFIG_MX31
-#define MX31_OTG_SIC_SHIFT	29
-#define MX31_OTG_SIC_MASK	(0x3 << MX31_OTG_SIC_SHIFT)
-#define MX31_OTG_PM_BIT		(1 << 24)
-
-#define MX31_H2_SIC_SHIFT	21
-#define MX31_H2_SIC_MASK	(0x3 << MX31_H2_SIC_SHIFT)
-#define MX31_H2_PM_BIT		(1 << 16)
-#define MX31_H2_DT_BIT		(1 << 5)
-
-#define MX31_H1_SIC_SHIFT	13
-#define MX31_H1_SIC_MASK	(0x3 << MX31_H1_SIC_SHIFT)
-#define MX31_H1_PM_BIT		(1 << 8)
-#define MX31_H1_DT_BIT		(1 << 4)
-#endif
-
 static int mxc_set_usbcontrol(int port, unsigned int flags)
 {
 	unsigned int v;
@@ -66,11 +41,11 @@ static int mxc_set_usbcontrol(int port, unsigned int flags)
 
 		switch (port) {
 		case 0:	/* OTG port */
-			v &= ~(MX31_OTG_SIC_MASK | MX31_OTG_PM_BIT);
+			v &= ~(MXC_OTG_SIC_MASK | MXC_OTG_PM_BIT);
 			v |= (flags & MXC_EHCI_INTERFACE_MASK)
-					<< MX31_OTG_SIC_SHIFT;
+					<< MXC_OTG_SIC_SHIFT;
 			if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
-				v |= MX31_OTG_PM_BIT;
+				v |= MXC_OTG_PM_BIT;
 
 			break;
 		case 1: /* H1 port */
diff --git a/include/usb/ehci-fsl.h b/include/usb/ehci-fsl.h
index 67600ed..9c6cd88 100644
--- a/include/usb/ehci-fsl.h
+++ b/include/usb/ehci-fsl.h
@@ -169,6 +169,80 @@
 #define CONFIG_SYS_FSL_USB_ADDR CONFIG_SYS_MPC512x_USB_ADDR
 #endif
 
+#if defined(CONFIG_MX25) || defined(CONFIG_MX31)
+#define USBCTRL_OTGBASE_OFFSET	0x600
+#endif
+
+#ifdef CONFIG_MX25
+#define MX25_USB_CTRL_IP_PUE_DOWN_BIT	(1<<6)
+#define MX25_USB_CTRL_HSTD_BIT		(1<<5)
+#define MX25_USB_CTRL_USBTE_BIT	(1<<4)
+#define MX25_USB_CTRL_OCPOL_OTG_BIT	(1<<3)
+#endif
+
+#ifdef CONFIG_MX31
+#define MX31_H2_SIC_SHIFT	21
+#define MX31_H2_SIC_MASK	(0x3 << MX31_H2_SIC_SHIFT)
+#define MX31_H2_PM_BIT		(1 << 16)
+#define MX31_H2_DT_BIT		(1 << 5)
+
+#define MX31_H1_SIC_SHIFT	13
+#define MX31_H1_SIC_MASK	(0x3 << MX31_H1_SIC_SHIFT)
+#define MX31_H1_PM_BIT		(1 << 8)
+#define MX31_H1_DT_BIT		(1 << 4)
+#endif
+
+#if defined(CONFIG_MX51) || defined(CONFIG_MX53)
+/* offset for first USB CTRL register */
+#define MX5_CTRL_REGS_OFFSET	0x800
+#endif
+
+#if defined(CONFIG_MX51) || defined(CONFIG_MX31)
+/* USB_CTRL register bits of interest*/
+#define MXC_OTG_SIC_SHIFT	29
+#define MXC_OTG_SIC_MASK	(0x3 << MX31_OTG_SIC_SHIFT)
+#define MXC_OTG_WUE		(1 << 27)
+#define MXC_OTG_PM		(1 << 24)
+#endif
+
+#ifdef CONFIG_MX51
+#define MX51_REGISTER_LAYOUT_LENGTH	0x200
+
+/* Register offsets for MX51 */
+#define MX51_OTG_ID	0x000
+#define MX51_UH1_ID	0x200
+#define MX51_UH2_ID	0x400
+
+/* USB_CTRL register bits of interest*/
+#define MX51_OTG_PM		(1 << 24)
+#define MX51_H1_ULPI_IE	(1 << 12)
+#define MX51_H1_WUE		(1 << 11)
+#define MX51_H1_PM		(1 << 8)
+
+/* PHY_CTRL_0 register bits of interest */
+#define MX51_OTG_OVERCURD	(1 << 8)
+#define MX51_EHCI_POWERPINSE	(1 << 5)
+
+/* PHY_CTRL_1 register bits of interest */
+#define MX51_SYSCLOCK_24_MHZ	(1 << 0)
+#define MX51_SYSCLOCK_MASK	(~(0xffffffff << 2))
+
+/* USB_CTRL_1 register bits of interest */
+#define MX51_H1_EXTCLKE	(1 << 25)
+
+/* USB Host 2 CTRL register bits of interest */
+#define MX51_H2_ULPI_IE	(1 << 8)
+#define MX51_H2_WUE		(1 << 7)
+#define MX51_H2_PM		(1 << 4)
+
+/* PORTSCx bits of interest */
+#define MX51_ULPI_MODE_MASK	(2 << 30)
+#define MX51_16BIT_UTMI	(1 << 28)
+
+/* USBCMD bits of interest */
+#define MX51_ITC_IMMEDIATE_MASK	(0xff << 16)
+#endif
+
 /*
  * USB Registers
  */
@@ -210,7 +284,7 @@ struct usb_ehci {
 	u32	txfilltuning;	/* 0x164 - Host TT Transmit
 					   pre-buffer packet tuning */
 	u8	res7[0x8];
-	u32	ulpi_viewpoint;	/* 0x170 - ULPI Reister Access */
+	u32	ulpi_viewpoint;	/* 0x170 - ULPI Register Access */
 	u8	res8[0xc];
 	u32	config_flag;	/* 0x180 - Configured Flag Register */
 	u32	portsc;		/* 0x184 - Port status/control */
@@ -242,4 +316,14 @@ struct usb_ehci {
 	u8	res13[0xafc];
 };
 
+struct mx5_usb_control_regs {
+	u32	usbctrl;	/* 0x800 - USB Control */
+	u32	otgmirror;	/* 0x804 - OTG Port Mirror */
+	u32	phyctrl0;	/* 0x808 - UTMI PHY Control Register 0 */
+	u32	phyctrl1;	/* 0x80C - UTMI PHY Control Register 1 */
+	u32	usbctrl1;	/* 0x810 - USB Control Register 1 */
+	u32	uh2ctrl;	/* 0x814 - USB Host2 Control */
+	u32	uh3ctrl;	/* 0x818 - USB Host3 Control */
+};
+
 #endif /* _EHCI_FSL_H */
-- 
1.7.6.3

[U-Boot] [PATCH v4 3/4] EHCI: adjust for mx5

[Jana Rapava]

Add macros and structures needed by Efika USB support code.
Move shared offset and bits definitions into common header file.

Signed-off-by: Jana Rapava <fermata7@gmail.com>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Wolfgang Grandegger <wg@denx.de>
---
Changes for v2:
	- whitespace and coding style changes
Changes for v3:
	- ULPI-related definitions moved to ULPI header file
Changes for v4:
	- rename "ulpi_viewpoint", because it's called "ulpi_viewport"
	in documentation

 drivers/usb/host/ehci-mxc.c |   31 +--------------
 include/usb/ehci-fsl.h      |   86 ++++++++++++++++++++++++++++++++++++++++++-
 2 files changed, 88 insertions(+), 29 deletions(-)

diff --git a/drivers/usb/host/ehci-mxc.c b/drivers/usb/host/ehci-mxc.c
index fde1f0f..2c1295f 100644
--- a/drivers/usb/host/ehci-mxc.c
+++ b/drivers/usb/host/ehci-mxc.c
@@ -27,31 +27,6 @@
 #include <usb/ehci.h>
 #include <usb/ehci-core.h>
 
-#define USBCTRL_OTGBASE_OFFSET	0x600
-
-#ifdef CONFIG_MX25
-#define MX25_USB_CTRL_IP_PUE_DOWN_BIT	(1<<6)
-#define MX25_USB_CTRL_HSTD_BIT		(1<<5)
-#define MX25_USB_CTRL_USBTE_BIT		(1<<4)
-#define MX25_USB_CTRL_OCPOL_OTG_BIT	(1<<3)
-#endif
-
-#ifdef CONFIG_MX31
-#define MX31_OTG_SIC_SHIFT	29
-#define MX31_OTG_SIC_MASK	(0x3 << MX31_OTG_SIC_SHIFT)
-#define MX31_OTG_PM_BIT		(1 << 24)
-
-#define MX31_H2_SIC_SHIFT	21
-#define MX31_H2_SIC_MASK	(0x3 << MX31_H2_SIC_SHIFT)
-#define MX31_H2_PM_BIT		(1 << 16)
-#define MX31_H2_DT_BIT		(1 << 5)
-
-#define MX31_H1_SIC_SHIFT	13
-#define MX31_H1_SIC_MASK	(0x3 << MX31_H1_SIC_SHIFT)
-#define MX31_H1_PM_BIT		(1 << 8)
-#define MX31_H1_DT_BIT		(1 << 4)
-#endif
-
 static int mxc_set_usbcontrol(int port, unsigned int flags)
 {
 	unsigned int v;
@@ -66,11 +41,11 @@ static int mxc_set_usbcontrol(int port, unsigned int flags)
 
 		switch (port) {
 		case 0:	/* OTG port */
-			v &= ~(MX31_OTG_SIC_MASK | MX31_OTG_PM_BIT);
+			v &= ~(MXC_OTG_SIC_MASK | MXC_OTG_PM_BIT);
 			v |= (flags & MXC_EHCI_INTERFACE_MASK)
-					<< MX31_OTG_SIC_SHIFT;
+					<< MXC_OTG_SIC_SHIFT;
 			if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
-				v |= MX31_OTG_PM_BIT;
+				v |= MXC_OTG_PM_BIT;
 
 			break;
 		case 1: /* H1 port */
diff --git a/include/usb/ehci-fsl.h b/include/usb/ehci-fsl.h
index 67600ed..2b1ac22 100644
--- a/include/usb/ehci-fsl.h
+++ b/include/usb/ehci-fsl.h
@@ -169,6 +169,80 @@
 #define CONFIG_SYS_FSL_USB_ADDR CONFIG_SYS_MPC512x_USB_ADDR
 #endif
 
+#if defined(CONFIG_MX25) || defined(CONFIG_MX31)
+#define USBCTRL_OTGBASE_OFFSET	0x600
+#endif
+
+#ifdef CONFIG_MX25
+#define MX25_USB_CTRL_IP_PUE_DOWN_BIT	(1<<6)
+#define MX25_USB_CTRL_HSTD_BIT		(1<<5)
+#define MX25_USB_CTRL_USBTE_BIT	(1<<4)
+#define MX25_USB_CTRL_OCPOL_OTG_BIT	(1<<3)
+#endif
+
+#ifdef CONFIG_MX31
+#define MX31_H2_SIC_SHIFT	21
+#define MX31_H2_SIC_MASK	(0x3 << MX31_H2_SIC_SHIFT)
+#define MX31_H2_PM_BIT		(1 << 16)
+#define MX31_H2_DT_BIT		(1 << 5)
+
+#define MX31_H1_SIC_SHIFT	13
+#define MX31_H1_SIC_MASK	(0x3 << MX31_H1_SIC_SHIFT)
+#define MX31_H1_PM_BIT		(1 << 8)
+#define MX31_H1_DT_BIT		(1 << 4)
+#endif
+
+#if defined(CONFIG_MX51) || defined(CONFIG_MX53)
+/* offset for first USB CTRL register */
+#define MX5_CTRL_REGS_OFFSET	0x800
+#endif
+
+#if defined(CONFIG_MX51) || defined(CONFIG_MX31)
+/* USB_CTRL register bits of interest*/
+#define MXC_OTG_SIC_SHIFT	29
+#define MXC_OTG_SIC_MASK	(0x3 << MX31_OTG_SIC_SHIFT)
+#define MXC_OTG_WUE		(1 << 27)
+#define MXC_OTG_PM		(1 << 24)
+#endif
+
+#ifdef CONFIG_MX51
+#define MX51_REGISTER_LAYOUT_LENGTH	0x200
+
+/* Register offsets for MX51 */
+#define MX51_OTG_ID	0x000
+#define MX51_UH1_ID	0x200
+#define MX51_UH2_ID	0x400
+
+/* USB_CTRL register bits of interest*/
+#define MX51_OTG_PM		(1 << 24)
+#define MX51_H1_ULPI_IE	(1 << 12)
+#define MX51_H1_WUE		(1 << 11)
+#define MX51_H1_PM		(1 << 8)
+
+/* PHY_CTRL_0 register bits of interest */
+#define MX51_OTG_OVERCURD	(1 << 8)
+#define MX51_EHCI_POWERPINSE	(1 << 5)
+
+/* PHY_CTRL_1 register bits of interest */
+#define MX51_SYSCLOCK_24_MHZ	(1 << 0)
+#define MX51_SYSCLOCK_MASK	(~(0xffffffff << 2))
+
+/* USB_CTRL_1 register bits of interest */
+#define MX51_H1_EXTCLKE	(1 << 25)
+
+/* USB Host 2 CTRL register bits of interest */
+#define MX51_H2_ULPI_IE	(1 << 8)
+#define MX51_H2_WUE		(1 << 7)
+#define MX51_H2_PM		(1 << 4)
+
+/* PORTSCx bits of interest */
+#define MX51_ULPI_MODE_MASK	(2 << 30)
+#define MX51_16BIT_UTMI	(1 << 28)
+
+/* USBCMD bits of interest */
+#define MX51_ITC_IMMEDIATE_MASK	(0xff << 16)
+#endif
+
 /*
  * USB Registers
  */
@@ -210,7 +284,7 @@ struct usb_ehci {
 	u32	txfilltuning;	/* 0x164 - Host TT Transmit
 					   pre-buffer packet tuning */
 	u8	res7[0x8];
-	u32	ulpi_viewpoint;	/* 0x170 - ULPI Reister Access */
+	u32	ulpi_viewport;	/* 0x170 - ULPI Register Access */
 	u8	res8[0xc];
 	u32	config_flag;	/* 0x180 - Configured Flag Register */
 	u32	portsc;		/* 0x184 - Port status/control */
@@ -242,4 +316,14 @@ struct usb_ehci {
 	u8	res13[0xafc];
 };
 
+struct mx5_usb_control_regs {
+	u32	usbctrl;	/* 0x800 - USB Control */
+	u32	otgmirror;	/* 0x804 - OTG Port Mirror */
+	u32	phyctrl0;	/* 0x808 - UTMI PHY Control Register 0 */
+	u32	phyctrl1;	/* 0x80C - UTMI PHY Control Register 1 */
+	u32	usbctrl1;	/* 0x810 - USB Control Register 1 */
+	u32	uh2ctrl;	/* 0x814 - USB Host2 Control */
+	u32	uh3ctrl;	/* 0x818 - USB Host3 Control */
+};
+
 #endif /* _EHCI_FSL_H */
-- 
1.7.6.3

[U-Boot] [PATCH v4 3/4] EHCI: adjust for mx5

[Wolfgang Grandegger]

On 11/12/2011 06:37 PM, Jana Rapava wrote:
> Add macros and structures needed by Efika USB support code.
> Move shared offset and bits definitions into common header file.
> 
> Signed-off-by: Jana Rapava <fermata7@gmail.com>
> Cc: Marek Vasut <marek.vasut@gmail.com>
> Cc: Remy Bohmer <linux@bohmer.net>
> Cc: Stefano Babic <sbabic@denx.de>
> Cc: Igor Grinberg <grinberg@compulab.co.il>
> Cc: Wolfgang Grandegger <wg@denx.de>
> ---
> Changes for v2:
> 	- whitespace and coding style changes
> Changes for v3:
> 	- ULPI-related definitions moved to ULPI header file
> Changes for v4:
> 	- rename "ulpi_viewpoint", because it's called "ulpi_viewport"
> 	in documentation
> 
>  drivers/usb/host/ehci-mxc.c |   31 +--------------
>  include/usb/ehci-fsl.h      |   86 ++++++++++++++++++++++++++++++++++++++++++-
>  2 files changed, 88 insertions(+), 29 deletions(-)
> 
> diff --git a/drivers/usb/host/ehci-mxc.c b/drivers/usb/host/ehci-mxc.c
> index fde1f0f..2c1295f 100644
> --- a/drivers/usb/host/ehci-mxc.c
> +++ b/drivers/usb/host/ehci-mxc.c
> @@ -27,31 +27,6 @@
>  #include <usb/ehci.h>
>  #include <usb/ehci-core.h>
>  
> -#define USBCTRL_OTGBASE_OFFSET	0x600
> -
> -#ifdef CONFIG_MX25
> -#define MX25_USB_CTRL_IP_PUE_DOWN_BIT	(1<<6)
> -#define MX25_USB_CTRL_HSTD_BIT		(1<<5)
> -#define MX25_USB_CTRL_USBTE_BIT		(1<<4)
> -#define MX25_USB_CTRL_OCPOL_OTG_BIT	(1<<3)
> -#endif
> -
> -#ifdef CONFIG_MX31
> -#define MX31_OTG_SIC_SHIFT	29
> -#define MX31_OTG_SIC_MASK	(0x3 << MX31_OTG_SIC_SHIFT)
> -#define MX31_OTG_PM_BIT		(1 << 24)
> -
> -#define MX31_H2_SIC_SHIFT	21
> -#define MX31_H2_SIC_MASK	(0x3 << MX31_H2_SIC_SHIFT)
> -#define MX31_H2_PM_BIT		(1 << 16)
> -#define MX31_H2_DT_BIT		(1 << 5)
> -
> -#define MX31_H1_SIC_SHIFT	13
> -#define MX31_H1_SIC_MASK	(0x3 << MX31_H1_SIC_SHIFT)
> -#define MX31_H1_PM_BIT		(1 << 8)
> -#define MX31_H1_DT_BIT		(1 << 4)
> -#endif
> -
>  static int mxc_set_usbcontrol(int port, unsigned int flags)
>  {
>  	unsigned int v;
> @@ -66,11 +41,11 @@ static int mxc_set_usbcontrol(int port, unsigned int flags)
>  
>  		switch (port) {
>  		case 0:	/* OTG port */
> -			v &= ~(MX31_OTG_SIC_MASK | MX31_OTG_PM_BIT);
> +			v &= ~(MXC_OTG_SIC_MASK | MXC_OTG_PM_BIT);
>  			v |= (flags & MXC_EHCI_INTERFACE_MASK)
> -					<< MX31_OTG_SIC_SHIFT;
> +					<< MXC_OTG_SIC_SHIFT;
>  			if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
> -				v |= MX31_OTG_PM_BIT;
> +				v |= MXC_OTG_PM_BIT;
>  
>  			break;
>  		case 1: /* H1 port */
> diff --git a/include/usb/ehci-fsl.h b/include/usb/ehci-fsl.h
> index 67600ed..2b1ac22 100644
> --- a/include/usb/ehci-fsl.h
> +++ b/include/usb/ehci-fsl.h
> @@ -169,6 +169,80 @@
>  #define CONFIG_SYS_FSL_USB_ADDR CONFIG_SYS_MPC512x_USB_ADDR
>  #endif
>  
> +#if defined(CONFIG_MX25) || defined(CONFIG_MX31)
> +#define USBCTRL_OTGBASE_OFFSET	0x600
> +#endif
> +
> +#ifdef CONFIG_MX25
> +#define MX25_USB_CTRL_IP_PUE_DOWN_BIT	(1<<6)
> +#define MX25_USB_CTRL_HSTD_BIT		(1<<5)
> +#define MX25_USB_CTRL_USBTE_BIT	(1<<4)
> +#define MX25_USB_CTRL_OCPOL_OTG_BIT	(1<<3)
> +#endif
> +
> +#ifdef CONFIG_MX31
> +#define MX31_H2_SIC_SHIFT	21
> +#define MX31_H2_SIC_MASK	(0x3 << MX31_H2_SIC_SHIFT)
> +#define MX31_H2_PM_BIT		(1 << 16)
> +#define MX31_H2_DT_BIT		(1 << 5)
> +
> +#define MX31_H1_SIC_SHIFT	13
> +#define MX31_H1_SIC_MASK	(0x3 << MX31_H1_SIC_SHIFT)
> +#define MX31_H1_PM_BIT		(1 << 8)
> +#define MX31_H1_DT_BIT		(1 << 4)
> +#endif
> +
> +#if defined(CONFIG_MX51) || defined(CONFIG_MX53)
> +/* offset for first USB CTRL register */
> +#define MX5_CTRL_REGS_OFFSET	0x800
> +#endif
> +
> +#if defined(CONFIG_MX51) || defined(CONFIG_MX31)
> +/* USB_CTRL register bits of interest*/
> +#define MXC_OTG_SIC_SHIFT	29
> +#define MXC_OTG_SIC_MASK	(0x3 << MX31_OTG_SIC_SHIFT)
> +#define MXC_OTG_WUE		(1 << 27)
> +#define MXC_OTG_PM		(1 << 24)
> +#endif
> +
> +#ifdef CONFIG_MX51
> +#define MX51_REGISTER_LAYOUT_LENGTH	0x200
> +
> +/* Register offsets for MX51 */
> +#define MX51_OTG_ID	0x000
> +#define MX51_UH1_ID	0x200
> +#define MX51_UH2_ID	0x400
> +
> +/* USB_CTRL register bits of interest*/
> +#define MX51_OTG_PM		(1 << 24)
> +#define MX51_H1_ULPI_IE	(1 << 12)
> +#define MX51_H1_WUE		(1 << 11)
> +#define MX51_H1_PM		(1 << 8)
> +
> +/* PHY_CTRL_0 register bits of interest */
> +#define MX51_OTG_OVERCURD	(1 << 8)
> +#define MX51_EHCI_POWERPINSE	(1 << 5)
> +
> +/* PHY_CTRL_1 register bits of interest */
> +#define MX51_SYSCLOCK_24_MHZ	(1 << 0)
> +#define MX51_SYSCLOCK_MASK	(~(0xffffffff << 2))
> +
> +/* USB_CTRL_1 register bits of interest */
> +#define MX51_H1_EXTCLKE	(1 << 25)
> +
> +/* USB Host 2 CTRL register bits of interest */
> +#define MX51_H2_ULPI_IE	(1 << 8)
> +#define MX51_H2_WUE		(1 << 7)
> +#define MX51_H2_PM		(1 << 4)

Most of the definitions above are arch specific and would better be
placed in arch/arm/include/asm/arch-mx25/31/5, I think.

> +/* PORTSCx bits of interest */
> +#define MX51_ULPI_MODE_MASK	(2 << 30)
> +#define MX51_16BIT_UTMI	(1 << 28)

In ehci-fsl.h we have already

 #define PORT_PTS_ULPI           (2 << 30)
 #define PORT_PTS_PTW            (1 << 28)

> +/* USBCMD bits of interest */
> +#define MX51_ITC_IMMEDIATE_MASK	(0xff << 16)
> +#endif
> +
>  /*
>   * USB Registers
>   */
> @@ -210,7 +284,7 @@ struct usb_ehci {
>  	u32	txfilltuning;	/* 0x164 - Host TT Transmit
>  					   pre-buffer packet tuning */
>  	u8	res7[0x8];
> -	u32	ulpi_viewpoint;	/* 0x170 - ULPI Reister Access */
> +	u32	ulpi_viewport;	/* 0x170 - ULPI Register Access */
>  	u8	res8[0xc];
>  	u32	config_flag;	/* 0x180 - Configured Flag Register */
>  	u32	portsc;		/* 0x184 - Port status/control */
> @@ -242,4 +316,14 @@ struct usb_ehci {
>  	u8	res13[0xafc];
>  };
>  
> +struct mx5_usb_control_regs {
> +	u32	usbctrl;	/* 0x800 - USB Control */
> +	u32	otgmirror;	/* 0x804 - OTG Port Mirror */
> +	u32	phyctrl0;	/* 0x808 - UTMI PHY Control Register 0 */
> +	u32	phyctrl1;	/* 0x80C - UTMI PHY Control Register 1 */
> +	u32	usbctrl1;	/* 0x810 - USB Control Register 1 */
> +	u32	uh2ctrl;	/* 0x814 - USB Host2 Control */
> +	u32	uh3ctrl;	/* 0x818 - USB Host3 Control */
> +};

Good.

Wolfgang

[U-Boot] [PATCH v4 3/4] EHCI: adjust for mx5

[Jana Rapava]

2011/11/14 Wolfgang Grandegger <wg@denx.de>

>
> >
> > +#if defined(CONFIG_MX25) || defined(CONFIG_MX31)
> > +#define USBCTRL_OTGBASE_OFFSET       0x600
> > +#endif
> > +
> > +#ifdef CONFIG_MX25
> > +#define MX25_USB_CTRL_IP_PUE_DOWN_BIT        (1<<6)
> > +#define MX25_USB_CTRL_HSTD_BIT               (1<<5)
> > +#define MX25_USB_CTRL_USBTE_BIT      (1<<4)
> > +#define MX25_USB_CTRL_OCPOL_OTG_BIT  (1<<3)
> > +#endif
> > +
> > +#ifdef CONFIG_MX31
> > +#define MX31_H2_SIC_SHIFT    21
> > +#define MX31_H2_SIC_MASK     (0x3 << MX31_H2_SIC_SHIFT)
> > +#define MX31_H2_PM_BIT               (1 << 16)
> > +#define MX31_H2_DT_BIT               (1 << 5)
> > +
> > +#define MX31_H1_SIC_SHIFT    13
> > +#define MX31_H1_SIC_MASK     (0x3 << MX31_H1_SIC_SHIFT)
> > +#define MX31_H1_PM_BIT               (1 << 8)
> > +#define MX31_H1_DT_BIT               (1 << 4)
> > +#endif
> > +
> > +#if defined(CONFIG_MX51) || defined(CONFIG_MX53)
> > +/* offset for first USB CTRL register */
> > +#define MX5_CTRL_REGS_OFFSET 0x800
> > +#endif
> > +
> > +#if defined(CONFIG_MX51) || defined(CONFIG_MX31)
> > +/* USB_CTRL register bits of interest*/
> > +#define MXC_OTG_SIC_SHIFT    29
> > +#define MXC_OTG_SIC_MASK     (0x3 << MX31_OTG_SIC_SHIFT)
> > +#define MXC_OTG_WUE          (1 << 27)
> > +#define MXC_OTG_PM           (1 << 24)
> > +#endif
> > +
> > +#ifdef CONFIG_MX51
> > +#define MX51_REGISTER_LAYOUT_LENGTH  0x200
> > +
> > +/* Register offsets for MX51 */
> > +#define MX51_OTG_ID  0x000
> > +#define MX51_UH1_ID  0x200
> > +#define MX51_UH2_ID  0x400
> > +
> > +/* USB_CTRL register bits of interest*/
> > +#define MX51_OTG_PM          (1 << 24)
> > +#define MX51_H1_ULPI_IE      (1 << 12)
> > +#define MX51_H1_WUE          (1 << 11)
> > +#define MX51_H1_PM           (1 << 8)
> > +
> > +/* PHY_CTRL_0 register bits of interest */
> > +#define MX51_OTG_OVERCURD    (1 << 8)
> > +#define MX51_EHCI_POWERPINSE (1 << 5)
> > +
> > +/* PHY_CTRL_1 register bits of interest */
> > +#define MX51_SYSCLOCK_24_MHZ (1 << 0)
> > +#define MX51_SYSCLOCK_MASK   (~(0xffffffff << 2))
> > +
> > +/* USB_CTRL_1 register bits of interest */
> > +#define MX51_H1_EXTCLKE      (1 << 25)
> > +
> > +/* USB Host 2 CTRL register bits of interest */
> > +#define MX51_H2_ULPI_IE      (1 << 8)
> > +#define MX51_H2_WUE          (1 << 7)
> > +#define MX51_H2_PM           (1 << 4)
>
> Most of the definitions above are arch specific and would better be
> placed in arch/arm/include/asm/arch-mx25/31/5, I think.
>
> Stefano, what do you think? You said that these definitions could be in
ehci-fsl.h, is arch-specific place better?


> > +/* PORTSCx bits of interest */
> > +#define MX51_ULPI_MODE_MASK  (2 << 30)
> > +#define MX51_16BIT_UTMI      (1 << 28)
>
> In ehci-fsl.h we have already
>
>  #define PORT_PTS_ULPI           (2 << 30)
>  #define PORT_PTS_PTW            (1 << 28)
>
> Ok, I'll use them.
Regards,
Jana Rapava

[U-Boot] [PATCH 4/4] usb: add USB support for Efika

[Jana Rapava]

This commit adds USB support for EfikaMX and EfikaSB.

Signed-off-by: Jana Rapava <fermata7@gmail.com>
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Stefano Babic <sbabic@denx.de>
---
 board/efikamx/Makefile      |    3 +
 board/efikamx/efika.h       |   30 +++
 board/efikamx/efikamx-usb.c |  420 +++++++++++++++++++++++++++++++++++++++++++
 board/efikamx/efikamx.c     |    3 +
 include/configs/efikamx.h   |   16 ++
 5 files changed, 472 insertions(+), 0 deletions(-)
 create mode 100644 board/efikamx/efika.h
 create mode 100644 board/efikamx/efikamx-usb.c

diff --git a/board/efikamx/Makefile b/board/efikamx/Makefile
index ee4a16e..860e4d2 100644
--- a/board/efikamx/Makefile
+++ b/board/efikamx/Makefile
@@ -28,6 +28,9 @@ include $(TOPDIR)/config.mk
 LIB	= $(obj)lib$(BOARD).o
 
 COBJS	:= efikamx.o
+ifdef	CONFIG_CMD_USB
+COBJS	+= efikamx-usb.o
+endif
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS))
diff --git a/board/efikamx/efika.h b/board/efikamx/efika.h
new file mode 100644
index 0000000..b3532e2
--- /dev/null
+++ b/board/efikamx/efika.h
@@ -0,0 +1,30 @@
+/*
+ * Copyright (C) 2011 Jana Rapava <fermata7@gmail.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * EHCI USB
+ */
+#ifdef	CONFIG_CMD_USB
+void setup_iomux_usb(void);
+#else
+static inline void setup_iomux_usb(void) { }
+#endif
diff --git a/board/efikamx/efikamx-usb.c b/board/efikamx/efikamx-usb.c
new file mode 100644
index 0000000..ac031ef
--- /dev/null
+++ b/board/efikamx/efikamx-usb.c
@@ -0,0 +1,420 @@
+/*
+ * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
+ * Copyright (C) 2011 Jana Rapava <fermata7@gmail.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <usb.h>
+#include <asm/io.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/mx5x_pins.h>
+#include <asm/arch/iomux.h>
+#include <asm/gpio.h>
+#include <usb/ehci-fsl.h>
+#include <errno.h>
+#include <watchdog.h>
+
+#include <usb/ehci.h>
+#include <usb/ehci-core.h>
+
+/*
+ * Configure the USB H1 and USB H2 IOMUX.
+ */
+#define USB_PAD_CONFIG	(PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST | \
+			PAD_CTL_DRV_HIGH | PAD_CTL_100K_PU | \
+			PAD_CTL_HYS_ENABLE | PAD_CTL_PUE_PULL)
+void setup_iomux_usb(void)
+{
+	/*
+	 * Configure USBH1 pads
+	 */
+	mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_STP, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_CLK, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_CLK, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DIR, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DIR, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_NXT, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_NXT, USB_PAD_CONFIG);
+
+	mxc_request_iomux(MX51_PIN_USBH1_DATA0, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA0, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA1, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA1, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA2, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA2, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA3, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA3, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA4, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA4, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA5, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA5, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA6, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA6, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA7, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA7, USB_PAD_CONFIG);
+
+	/*
+	 * Configure USBH1 control pads
+	 */
+
+	/* USB PHY reset */
+	mxc_request_iomux(MX51_PIN_EIM_D27, IOMUX_CONFIG_ALT1);
+	mxc_iomux_set_pad(MX51_PIN_EIM_D27, PAD_CTL_PKE_ENABLE |
+			PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH);
+
+	/* USB HUB reset */
+	mxc_request_iomux(MX51_PIN_GPIO1_5, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_GPIO1_5, PAD_CTL_PKE_ENABLE |
+			PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH);
+
+
+	if (machine_is_efikasb()) {
+		/*
+		 * Configure USBH2 pads (used on EfikaSB)
+		 */
+		/* USBH2_DATA */
+		mxc_request_iomux(MX51_PIN_EIM_D16, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D16, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D17, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D17, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D18, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D18, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D19, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D19, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D20, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D20, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D21, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D21, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D22, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D22, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D23, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D23, USB_PAD_CONFIG);
+
+		/* USBH2_CLK */
+		mxc_request_iomux(MX51_PIN_EIM_A24, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_A24, USB_PAD_CONFIG);
+		/* USBH2_DIR */
+		mxc_request_iomux(MX51_PIN_EIM_A25, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_A25, USB_PAD_CONFIG);
+		/* USBH2_STP */
+		mxc_request_iomux(MX51_PIN_EIM_A26, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_A26, USB_PAD_CONFIG);
+		/* USBH2_NXT */
+		mxc_request_iomux(MX51_PIN_EIM_A27, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_A27, USB_PAD_CONFIG);
+	}
+
+	/* WIFI EN (act low) */
+	mxc_request_iomux(MX51_PIN_EIM_A22, IOMUX_CONFIG_GPIO);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A22, 0);
+	/* WIFI RESET */
+	mxc_request_iomux(MX51_PIN_EIM_A16, IOMUX_CONFIG_GPIO);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A16, 0);
+	/* BT EN (act low) */
+	mxc_request_iomux(MX51_PIN_EIM_A17, IOMUX_CONFIG_GPIO);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A17, 0);
+}
+
+/*
+ * Enable devices connected to USB buses.
+ */
+void efika_usb_enable_devices(void)
+{
+	/* Enable Bluetooth */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A17), 0);
+	udelay(10000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A17), 1);
+
+	/* Enable WiFi */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A22), 1);
+	udelay(10000);
+
+	/* Reset the WiFi chip */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A16), 0);
+	udelay(10000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A16), 1);
+}
+
+/*
+ * Reset USB HUB (or HUBs on EfikaSB).
+ */
+void efika_usb_hub_reset(void)
+{
+	/* HUB reset */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 1);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 0);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 1);
+}
+
+/*
+ * Reset USB PHY (or PHYs on EfikaSB).
+ */
+void efika_usb_phy_reset(void)
+{
+	/* SMSC 3317 PHY reset */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_D27), 0);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_D27), 1);
+}
+
+/*
+ * Configure control registers of the USB controller.
+ */
+void control_regs_setup(struct mx5_usb_control_regs *control)
+{
+	clrsetbits_le32(&control->usbctrl,
+		(MXC_OTG_WUE | MXC_OTG_PM | MX51_H1_ULPI_IE | MX51_H1_WUE),
+		MX51_H1_PM);
+
+	clrsetbits_le32(&control->phyctrl0,
+			MX51_OTG_OVERCURD,
+			MX51_EHCI_POWERPINSE);
+
+	clrsetbits_le32(&control->phyctrl1,
+			MX51_SYSCLOCK_MASK,
+			MX51_SYSCLOCK_24_MHZ);
+
+	setbits_le32(&control->usbctrl1, MX51_H1_EXTCLKE);
+
+	clrsetbits_le32(&control->uh2ctrl,
+			(MX51_H2_ULPI_IE | MX51_H2_WUE),
+			MX51_H2_PM);
+
+	udelay(10000);
+}
+
+#define ULPI_ADDR_SHIFT		16
+#define ulpi_write_mask(value)	((value) & 0xff)
+#define ulpi_read_mask(value)	(((value) >> 8) & 0xff)
+
+int ulpi_wait(struct usb_ehci *ehci, u32 ulpi_value, u32 ulpi_mask)
+{
+	int timeout = ULPI_TIMEOUT;
+	u32 tmp;
+
+	writel(ulpi_value, &ehci->ulpi_viewpoint);
+
+	/* Wait for the bits in ulpi_mask to become zero. */
+	while (--timeout) {
+		tmp = readl(&ehci->ulpi_viewpoint);
+		if (!(tmp & ulpi_mask))
+			break;
+		WATCHDOG_RESET();
+	}
+
+	return !timeout;
+}
+
+int ulpi_wakeup(struct usb_ehci *ehci)
+{
+	if (readl(&ehci->ulpi_viewpoint) & ULPI_SS)
+		return 0; /* already awake */
+	return ulpi_wait(ehci, ULPI_WU, ULPI_WU);
+}
+
+void ulpi_write(struct usb_ehci *ehci, u32 reg, u32 value)
+{
+	if (ulpi_wakeup(ehci)) {
+		printf("ULPI wakeup timed out\n");
+		return;
+	}
+
+	if (ulpi_wait(ehci, ULPI_RWRUN | ULPI_RWCTRL |
+	reg << ULPI_ADDR_SHIFT | ulpi_write_mask(value), ULPI_RWRUN))
+		printf("ULPI write timed out\n");
+}
+
+u32 ulpi_read(struct usb_ehci *ehci, u32 reg)
+{
+	if (ulpi_wakeup(ehci)) {
+		printf("ULPI wakeup timed out\n");
+		return 0;
+	}
+
+	if (ulpi_wait(ehci, ULPI_RWRUN | reg << ULPI_ADDR_SHIFT, ULPI_RWRUN)) {
+		printf("ULPI read timed out\n");
+		return 0;
+	}
+	return ulpi_read_mask(readl(&ehci->ulpi_viewpoint));
+}
+
+void ulpi_init(struct usb_ehci *ehci, struct mxc_ulpi_regs *ulpi)
+{
+	u32 tmp = 0;
+	int reg, i;
+
+	/* Assemble ID from four ULPI ID registers (8 bits each). */
+	for (reg = ULPI_ID_REGS_COUNT - 1; reg >= 0; reg--)
+		tmp |= ulpi_read(ehci, reg) << (reg * 8);
+
+	/* Split ID into vendor and product ID. */
+	debug("Found ULPI TX, ID %04x:%04x\n", tmp >> 16, tmp & 0xffff);
+
+	/* ULPI integrity check */
+	for (i = 0; i < 2; i++) {
+		ulpi_write(ehci, (u32)&ulpi->scratch_write,
+			ULPI_TEST_VALUE << i);
+		tmp = ulpi_read(ehci, (u32)&ulpi->scratch_write);
+
+		if (tmp != (ULPI_TEST_VALUE << i)) {
+			printf("ULPI integrity check failed\n");
+			return;
+		}
+	}
+
+	/* Set ULPI flags. */
+	ulpi_write(ehci, (u32)&ulpi->otg_ctrl_write,
+		ULPI_OTG_EXT_VBUS_IND |
+		ULPI_OTG_DM_PULLDOWN | ULPI_OTG_DP_PULLDOWN);
+	ulpi_write(ehci, (u32)&ulpi->function_ctrl_write,
+		ULPI_FC_XCVR_SELECT | ULPI_FC_OPMODE_NORMAL |
+		ULPI_FC_SUSPENDM_PWRED);
+	ulpi_write(ehci, (u32)&ulpi->iface_ctrl_write, 0);
+	ulpi_write(ehci, (u32)&ulpi->otg_ctrl_set,
+		ULPI_OTG_DRV_VBUS | ULPI_OTG_DRV_VBUS_EXT);
+
+	/*
+	 * NOTE: This violates USB specification, but otherwise, USB on Efika
+	 * doesn't charge VBUS and as a result, USB doesn't work.
+	 */
+	ulpi_write(ehci, (u32)&ulpi->otg_ctrl_set, ULPI_OTG_CHRG_VBUS);
+}
+
+/*
+ * Solve the VBUS reset problem on Efika
+ * by setting the CHRG_VBUS bit in the reset.
+ */
+void ehci_fixup(uint32_t *status_reg, uint32_t *reg_ref)
+{
+	struct usb_ehci *ehci = (struct usb_ehci *)(OTG_BASE_ADDR +
+		MX51_REGISTER_LAYOUT_LENGTH);
+	struct mxc_ulpi_regs *ulpi = (struct mxc_ulpi_regs *)0;
+
+	u32 tmp = ulpi_read(ehci, (u32)&ulpi->otg_ctrl_write);
+	tmp |= ULPI_OTG_CHRG_VBUS;
+	ulpi_write(ehci, (u32)&ulpi->otg_ctrl_write, tmp);
+
+	/* USB 2.0 specification say 50 ms resets on root. */
+	wait_ms(50);
+
+	/* Now terminate the reset. */
+	*reg_ref = ehci_readl(status_reg);
+	*reg_ref |= EHCI_PS_PE;
+}
+
+void ehci0_init(struct usb_ehci *ehci)
+{
+	writel(MX51_16BIT_UTMI, &ehci->portsc);
+}
+
+void ehci1_init(struct usb_ehci *ehci, struct mxc_ulpi_regs *ulpi)
+{
+	mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT2);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_STP, PAD_CTL_DRV_HIGH |
+				PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST);
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_USBH1_STP), 0);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_USBH1_STP), 1);
+	udelay(1000);
+
+	mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_STP, USB_PAD_CONFIG);
+	udelay(10000);
+
+	clrbits_le32(&ehci->usbcmd, MX51_ITC_IMMEDIATE_MASK);
+	udelay(10000);
+
+	writel(MX51_ULPI_MODE_MASK, &ehci->portsc);
+	udelay(10000);
+
+	ulpi_init(ehci, ulpi);
+}
+
+void ehci2_init(struct usb_ehci *ehci, struct mxc_ulpi_regs *ulpi)
+{
+	mxc_request_iomux(MX51_PIN_EIM_A26, IOMUX_CONFIG_ALT1);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A26, PAD_CTL_DRV_HIGH |
+				PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST);
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A26), 0);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A26), 1);
+	udelay(1000);
+
+	mxc_request_iomux(MX51_PIN_EIM_A26, IOMUX_CONFIG_ALT2);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A26, USB_PAD_CONFIG);
+
+	writel(MX51_ULPI_MODE_MASK, &ehci->portsc);
+	udelay(10000);
+
+	ulpi_init(ehci, ulpi);
+}
+
+int ehci_hcd_init(void)
+{
+	struct usb_ehci *ehci;
+	struct mx5_usb_control_regs *mx5_usb_control_regs;
+	struct mxc_ulpi_regs *ulpi;
+
+	mx5_usb_control_regs = (struct mx5_usb_control_regs *)(OTG_BASE_ADDR +
+		 MX5_CTRL_REGS_OFFSET);
+	control_regs_setup(mx5_usb_control_regs);
+	ulpi = (struct mxc_ulpi_regs *)0;
+
+	/* Init EHCI core */
+	ehci = (struct usb_ehci *)(OTG_BASE_ADDR +
+		(MX51_REGISTER_LAYOUT_LENGTH * CONFIG_MXC_USB_PORT));
+	hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
+	hcor = (struct ehci_hcor *)((uint32_t) hccr +
+			HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
+	setbits_le32(&ehci->usbmode, CM_HOST);
+	setbits_le32(&ehci->control, USB_EN);
+
+	/* Init iMX51 EHCI */
+	efika_usb_phy_reset();
+	efika_usb_hub_reset();
+	efika_usb_enable_devices();
+
+	switch (CONFIG_MXC_USB_PORT) {
+	case 0:
+		ehci0_init(ehci);
+		break;
+	case 1:
+		ehci1_init(ehci, ulpi);
+		break;
+	case 2:
+		if (machine_is_efikasb())
+			ehci2_init(ehci, ulpi);
+		break;
+	};
+
+	/* EfikaMX USB has issues ... */
+	udelay(10000);
+
+	return 0;
+}
+
+int ehci_hcd_stop(void)
+{
+	return 0;
+}
diff --git a/board/efikamx/efikamx.c b/board/efikamx/efikamx.c
index 0c4e24b..8e9b42b 100644
--- a/board/efikamx/efikamx.c
+++ b/board/efikamx/efikamx.c
@@ -37,6 +37,8 @@
 #include <fsl_pmic.h>
 #include <mc13892.h>
 
+#include "efika.h"
+
 DECLARE_GLOBAL_DATA_PTR;
 
 /*
@@ -678,6 +680,7 @@ int board_late_init(void)
 
 	setup_iomux_led();
 	setup_iomux_ata();
+	setup_iomux_usb();
 
 	efikamx_toggle_led(EFIKAMX_LED_BLUE);
 
diff --git a/include/configs/efikamx.h b/include/configs/efikamx.h
index 54f48e4..010a16a 100644
--- a/include/configs/efikamx.h
+++ b/include/configs/efikamx.h
@@ -44,6 +44,10 @@
 
 #define CONFIG_SYS_TEXT_BASE		0x97800000
 
+#define	CONFIG_L2_OFF
+#define	CONFIG_SYS_ICACHE_OFF
+#define	CONFIG_SYS_DCACHE_OFF
+
 /*
  * Bootloader Components Configuration
  */
@@ -172,6 +176,18 @@
 #endif
 
 /*
+ * USB
+ */
+#define CONFIG_CMD_USB
+#ifdef CONFIG_CMD_USB
+#define CONFIG_USB_EHCI			/* Enable EHCI USB support */
+#define CONFIG_MXC_USB_PORT	1
+#define CONFIG_EHCI_IS_TDI
+#define CONFIG_USB_STORAGE
+#define	CONFIG_USB_KEYBOARD
+#endif /* CONFIG_CMD_USB */
+
+/*
  * Filesystems
  */
 #ifdef CONFIG_CMD_FAT
-- 
1.7.6.3

[U-Boot] [PATCH 4/4] usb: add USB support for Efika

[Marek Vasut]

On Thursday, September 29, 2011 01:52:51 AM Jana Rapava wrote:
> This commit adds USB support for EfikaMX and EfikaSB.
> 
> Signed-off-by: Jana Rapava <fermata7@gmail.com>
> Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
> Cc: Remy Bohmer <linux@bohmer.net>
> Cc: Stefano Babic <sbabic@denx.de>
> ---
>  board/efikamx/Makefile      |    3 +
>  board/efikamx/efika.h       |   30 +++
>  board/efikamx/efikamx-usb.c |  420
> +++++++++++++++++++++++++++++++++++++++++++ board/efikamx/efikamx.c     | 
>   3 +
>  include/configs/efikamx.h   |   16 ++
>  5 files changed, 472 insertions(+), 0 deletions(-)
>  create mode 100644 board/efikamx/efika.h
>  create mode 100644 board/efikamx/efikamx-usb.c

[...]

> 
> +
> +int ulpi_wakeup(struct usb_ehci *ehci)
> +{
> +	if (readl(&ehci->ulpi_viewpoint) & ULPI_SS)
> +		return 0; /* already awake */
> +	return ulpi_wait(ehci, ULPI_WU, ULPI_WU);
> +}
> +
> +void ulpi_write(struct usb_ehci *ehci, u32 reg, u32 value)
> +{
> +	if (ulpi_wakeup(ehci)) {
> +		printf("ULPI wakeup timed out\n");
> +		return;
> +	}
> +
> +	if (ulpi_wait(ehci, ULPI_RWRUN | ULPI_RWCTRL |
> +	reg << ULPI_ADDR_SHIFT | ulpi_write_mask(value), ULPI_RWRUN))
> +		printf("ULPI write timed out\n");

Please use temp. variable here and fix indent.
> +}
> +
> +u32 ulpi_read(struct usb_ehci *ehci, u32 reg)
> +{
> +	if (ulpi_wakeup(ehci)) {
> +		printf("ULPI wakeup timed out\n");
> +		return 0;
> +	}
> +
> +	if (ulpi_wait(ehci, ULPI_RWRUN | reg << ULPI_ADDR_SHIFT, ULPI_RWRUN)) {
> +		printf("ULPI read timed out\n");
> +		return 0;
> +	}

Newline

> +	return ulpi_read_mask(readl(&ehci->ulpi_viewpoint));
> +}

[U-Boot] [PATCH v2 4/4] usb: add USB support for Efika

[Jana Rapava]

This commit adds USB support for EfikaMX and EfikaSB.

Signed-off-by: Jana Rapava <fermata7@gmail.com>
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Stefano Babic <sbabic@denx.de>
---
Changes for v2:
	- introduce temporary variable in ulpi_write
	- whitespace changes
 board/efikamx/Makefile      |    3 +
 board/efikamx/efika.h       |   30 +++
 board/efikamx/efikamx-usb.c |  423 +++++++++++++++++++++++++++++++++++++++++++
 board/efikamx/efikamx.c     |    3 +
 include/configs/efikamx.h   |   16 ++
 5 files changed, 475 insertions(+), 0 deletions(-)
 create mode 100644 board/efikamx/efika.h
 create mode 100644 board/efikamx/efikamx-usb.c

diff --git a/board/efikamx/Makefile b/board/efikamx/Makefile
index ee4a16e..860e4d2 100644
--- a/board/efikamx/Makefile
+++ b/board/efikamx/Makefile
@@ -28,6 +28,9 @@ include $(TOPDIR)/config.mk
 LIB	= $(obj)lib$(BOARD).o
 
 COBJS	:= efikamx.o
+ifdef	CONFIG_CMD_USB
+COBJS	+= efikamx-usb.o
+endif
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS))
diff --git a/board/efikamx/efika.h b/board/efikamx/efika.h
new file mode 100644
index 0000000..b3532e2
--- /dev/null
+++ b/board/efikamx/efika.h
@@ -0,0 +1,30 @@
+/*
+ * Copyright (C) 2011 Jana Rapava <fermata7@gmail.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * EHCI USB
+ */
+#ifdef	CONFIG_CMD_USB
+void setup_iomux_usb(void);
+#else
+static inline void setup_iomux_usb(void) { }
+#endif
diff --git a/board/efikamx/efikamx-usb.c b/board/efikamx/efikamx-usb.c
new file mode 100644
index 0000000..b169ea7
--- /dev/null
+++ b/board/efikamx/efikamx-usb.c
@@ -0,0 +1,423 @@
+/*
+ * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
+ * Copyright (C) 2011 Jana Rapava <fermata7@gmail.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <usb.h>
+#include <asm/io.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/mx5x_pins.h>
+#include <asm/arch/iomux.h>
+#include <asm/gpio.h>
+#include <usb/ehci-fsl.h>
+#include <errno.h>
+#include <watchdog.h>
+
+#include <usb/ehci.h>
+#include <usb/ehci-core.h>
+
+/*
+ * Configure the USB H1 and USB H2 IOMUX.
+ */
+#define USB_PAD_CONFIG	(PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST | \
+			PAD_CTL_DRV_HIGH | PAD_CTL_100K_PU | \
+			PAD_CTL_HYS_ENABLE | PAD_CTL_PUE_PULL)
+void setup_iomux_usb(void)
+{
+	/*
+	 * Configure USBH1 pads
+	 */
+	mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_STP, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_CLK, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_CLK, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DIR, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DIR, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_NXT, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_NXT, USB_PAD_CONFIG);
+
+	mxc_request_iomux(MX51_PIN_USBH1_DATA0, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA0, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA1, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA1, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA2, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA2, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA3, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA3, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA4, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA4, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA5, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA5, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA6, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA6, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA7, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA7, USB_PAD_CONFIG);
+
+	/*
+	 * Configure USBH1 control pads
+	 */
+
+	/* USB PHY reset */
+	mxc_request_iomux(MX51_PIN_EIM_D27, IOMUX_CONFIG_ALT1);
+	mxc_iomux_set_pad(MX51_PIN_EIM_D27, PAD_CTL_PKE_ENABLE |
+			PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH);
+
+	/* USB HUB reset */
+	mxc_request_iomux(MX51_PIN_GPIO1_5, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_GPIO1_5, PAD_CTL_PKE_ENABLE |
+			PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH);
+
+
+	if (machine_is_efikasb()) {
+		/*
+		 * Configure USBH2 pads (used on EfikaSB)
+		 */
+		/* USBH2_DATA */
+		mxc_request_iomux(MX51_PIN_EIM_D16, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D16, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D17, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D17, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D18, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D18, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D19, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D19, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D20, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D20, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D21, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D21, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D22, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D22, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D23, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D23, USB_PAD_CONFIG);
+
+		/* USBH2_CLK */
+		mxc_request_iomux(MX51_PIN_EIM_A24, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_A24, USB_PAD_CONFIG);
+		/* USBH2_DIR */
+		mxc_request_iomux(MX51_PIN_EIM_A25, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_A25, USB_PAD_CONFIG);
+		/* USBH2_STP */
+		mxc_request_iomux(MX51_PIN_EIM_A26, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_A26, USB_PAD_CONFIG);
+		/* USBH2_NXT */
+		mxc_request_iomux(MX51_PIN_EIM_A27, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_A27, USB_PAD_CONFIG);
+	}
+
+	/* WIFI EN (act low) */
+	mxc_request_iomux(MX51_PIN_EIM_A22, IOMUX_CONFIG_GPIO);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A22, 0);
+	/* WIFI RESET */
+	mxc_request_iomux(MX51_PIN_EIM_A16, IOMUX_CONFIG_GPIO);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A16, 0);
+	/* BT EN (act low) */
+	mxc_request_iomux(MX51_PIN_EIM_A17, IOMUX_CONFIG_GPIO);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A17, 0);
+}
+
+/*
+ * Enable devices connected to USB buses.
+ */
+void efika_usb_enable_devices(void)
+{
+	/* Enable Bluetooth */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A17), 0);
+	udelay(10000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A17), 1);
+
+	/* Enable WiFi */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A22), 1);
+	udelay(10000);
+
+	/* Reset the WiFi chip */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A16), 0);
+	udelay(10000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A16), 1);
+}
+
+/*
+ * Reset USB HUB (or HUBs on EfikaSB).
+ */
+void efika_usb_hub_reset(void)
+{
+	/* HUB reset */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 1);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 0);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 1);
+}
+
+/*
+ * Reset USB PHY (or PHYs on EfikaSB).
+ */
+void efika_usb_phy_reset(void)
+{
+	/* SMSC 3317 PHY reset */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_D27), 0);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_D27), 1);
+}
+
+/*
+ * Configure control registers of the USB controller.
+ */
+void control_regs_setup(struct mx5_usb_control_regs *control)
+{
+	clrsetbits_le32(&control->usbctrl,
+		(MXC_OTG_WUE | MXC_OTG_PM | MX51_H1_ULPI_IE | MX51_H1_WUE),
+		MX51_H1_PM);
+
+	clrsetbits_le32(&control->phyctrl0,
+			MX51_OTG_OVERCURD,
+			MX51_EHCI_POWERPINSE);
+
+	clrsetbits_le32(&control->phyctrl1,
+			MX51_SYSCLOCK_MASK,
+			MX51_SYSCLOCK_24_MHZ);
+
+	setbits_le32(&control->usbctrl1, MX51_H1_EXTCLKE);
+
+	clrsetbits_le32(&control->uh2ctrl,
+			(MX51_H2_ULPI_IE | MX51_H2_WUE),
+			MX51_H2_PM);
+
+	udelay(10000);
+}
+
+#define ULPI_ADDR_SHIFT		16
+#define ulpi_write_mask(value)	((value) & 0xff)
+#define ulpi_read_mask(value)	(((value) >> 8) & 0xff)
+
+int ulpi_wait(struct usb_ehci *ehci, u32 ulpi_value, u32 ulpi_mask)
+{
+	int timeout = ULPI_TIMEOUT;
+	u32 tmp;
+
+	writel(ulpi_value, &ehci->ulpi_viewpoint);
+
+	/* Wait for the bits in ulpi_mask to become zero. */
+	while (--timeout) {
+		tmp = readl(&ehci->ulpi_viewpoint);
+		if (!(tmp & ulpi_mask))
+			break;
+		WATCHDOG_RESET();
+	}
+
+	return !timeout;
+}
+
+int ulpi_wakeup(struct usb_ehci *ehci)
+{
+	if (readl(&ehci->ulpi_viewpoint) & ULPI_SS)
+		return 0; /* already awake */
+	return ulpi_wait(ehci, ULPI_WU, ULPI_WU);
+}
+
+void ulpi_write(struct usb_ehci *ehci, u32 reg, u32 value)
+{
+	u32 tmp;
+	if (ulpi_wakeup(ehci)) {
+		printf("ULPI wakeup timed out\n");
+		return;
+	}
+
+	tmp = ulpi_wait(ehci, ULPI_RWRUN | ULPI_RWCTRL |
+		reg << ULPI_ADDR_SHIFT | ulpi_write_mask(value), ULPI_RWRUN);
+	if (tmp)
+		printf("ULPI write timed out\n");
+}
+
+u32 ulpi_read(struct usb_ehci *ehci, u32 reg)
+{
+	if (ulpi_wakeup(ehci)) {
+		printf("ULPI wakeup timed out\n");
+		return 0;
+	}
+
+	if (ulpi_wait(ehci, ULPI_RWRUN | reg << ULPI_ADDR_SHIFT, ULPI_RWRUN)) {
+		printf("ULPI read timed out\n");
+		return 0;
+	}
+
+	return ulpi_read_mask(readl(&ehci->ulpi_viewpoint));
+}
+
+void ulpi_init(struct usb_ehci *ehci, struct mxc_ulpi_regs *ulpi)
+{
+	u32 tmp = 0;
+	int reg, i;
+
+	/* Assemble ID from four ULPI ID registers (8 bits each). */
+	for (reg = ULPI_ID_REGS_COUNT - 1; reg >= 0; reg--)
+		tmp |= ulpi_read(ehci, reg) << (reg * 8);
+
+	/* Split ID into vendor and product ID. */
+	debug("Found ULPI TX, ID %04x:%04x\n", tmp >> 16, tmp & 0xffff);
+
+	/* ULPI integrity check */
+	for (i = 0; i < 2; i++) {
+		ulpi_write(ehci, (u32)&ulpi->scratch_write,
+			ULPI_TEST_VALUE << i);
+		tmp = ulpi_read(ehci, (u32)&ulpi->scratch_write);
+
+		if (tmp != (ULPI_TEST_VALUE << i)) {
+			printf("ULPI integrity check failed\n");
+			return;
+		}
+	}
+
+	/* Set ULPI flags. */
+	ulpi_write(ehci, (u32)&ulpi->otg_ctrl_write,
+		ULPI_OTG_EXT_VBUS_IND |
+		ULPI_OTG_DM_PULLDOWN | ULPI_OTG_DP_PULLDOWN);
+	ulpi_write(ehci, (u32)&ulpi->function_ctrl_write,
+		ULPI_FC_XCVR_SELECT | ULPI_FC_OPMODE_NORMAL |
+		ULPI_FC_SUSPENDM_PWRED);
+	ulpi_write(ehci, (u32)&ulpi->iface_ctrl_write, 0);
+	ulpi_write(ehci, (u32)&ulpi->otg_ctrl_set,
+		ULPI_OTG_DRV_VBUS | ULPI_OTG_DRV_VBUS_EXT);
+
+	/*
+	 * NOTE: This violates USB specification, but otherwise, USB on Efika
+	 * doesn't charge VBUS and as a result, USB doesn't work.
+	 */
+	ulpi_write(ehci, (u32)&ulpi->otg_ctrl_set, ULPI_OTG_CHRG_VBUS);
+}
+
+/*
+ * Solve the VBUS reset problem on Efika
+ * by setting the CHRG_VBUS bit in the reset.
+ */
+void ehci_fixup(uint32_t *status_reg, uint32_t *reg_ref)
+{
+	struct usb_ehci *ehci = (struct usb_ehci *)(OTG_BASE_ADDR +
+		MX51_REGISTER_LAYOUT_LENGTH);
+	struct mxc_ulpi_regs *ulpi = (struct mxc_ulpi_regs *)0;
+
+	u32 tmp = ulpi_read(ehci, (u32)&ulpi->otg_ctrl_write);
+	tmp |= ULPI_OTG_CHRG_VBUS;
+	ulpi_write(ehci, (u32)&ulpi->otg_ctrl_write, tmp);
+
+	/* USB 2.0 specification say 50 ms resets on root. */
+	wait_ms(50);
+
+	/* Now terminate the reset. */
+	*reg_ref = ehci_readl(status_reg);
+	*reg_ref |= EHCI_PS_PE;
+}
+
+void ehci0_init(struct usb_ehci *ehci)
+{
+	writel(MX51_16BIT_UTMI, &ehci->portsc);
+}
+
+void ehci1_init(struct usb_ehci *ehci, struct mxc_ulpi_regs *ulpi)
+{
+	mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT2);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_STP, PAD_CTL_DRV_HIGH |
+				PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST);
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_USBH1_STP), 0);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_USBH1_STP), 1);
+	udelay(1000);
+
+	mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_STP, USB_PAD_CONFIG);
+	udelay(10000);
+
+	clrbits_le32(&ehci->usbcmd, MX51_ITC_IMMEDIATE_MASK);
+	udelay(10000);
+
+	writel(MX51_ULPI_MODE_MASK, &ehci->portsc);
+	udelay(10000);
+
+	ulpi_init(ehci, ulpi);
+}
+
+void ehci2_init(struct usb_ehci *ehci, struct mxc_ulpi_regs *ulpi)
+{
+	mxc_request_iomux(MX51_PIN_EIM_A26, IOMUX_CONFIG_ALT1);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A26, PAD_CTL_DRV_HIGH |
+				PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST);
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A26), 0);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A26), 1);
+	udelay(1000);
+
+	mxc_request_iomux(MX51_PIN_EIM_A26, IOMUX_CONFIG_ALT2);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A26, USB_PAD_CONFIG);
+
+	writel(MX51_ULPI_MODE_MASK, &ehci->portsc);
+	udelay(10000);
+
+	ulpi_init(ehci, ulpi);
+}
+
+int ehci_hcd_init(void)
+{
+	struct usb_ehci *ehci;
+	struct mx5_usb_control_regs *mx5_usb_control_regs;
+	struct mxc_ulpi_regs *ulpi;
+
+	mx5_usb_control_regs = (struct mx5_usb_control_regs *)(OTG_BASE_ADDR +
+		 MX5_CTRL_REGS_OFFSET);
+	control_regs_setup(mx5_usb_control_regs);
+	ulpi = (struct mxc_ulpi_regs *)0;
+
+	/* Init EHCI core */
+	ehci = (struct usb_ehci *)(OTG_BASE_ADDR +
+		(MX51_REGISTER_LAYOUT_LENGTH * CONFIG_MXC_USB_PORT));
+	hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
+	hcor = (struct ehci_hcor *)((uint32_t) hccr +
+			HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
+	setbits_le32(&ehci->usbmode, CM_HOST);
+	setbits_le32(&ehci->control, USB_EN);
+
+	/* Init iMX51 EHCI */
+	efika_usb_phy_reset();
+	efika_usb_hub_reset();
+	efika_usb_enable_devices();
+
+	switch (CONFIG_MXC_USB_PORT) {
+	case 0:
+		ehci0_init(ehci);
+		break;
+	case 1:
+		ehci1_init(ehci, ulpi);
+		break;
+	case 2:
+		if (machine_is_efikasb())
+			ehci2_init(ehci, ulpi);
+		break;
+	};
+
+	/* EfikaMX USB has issues ... */
+	udelay(10000);
+
+	return 0;
+}
+
+int ehci_hcd_stop(void)
+{
+	return 0;
+}
diff --git a/board/efikamx/efikamx.c b/board/efikamx/efikamx.c
index 0c4e24b..8e9b42b 100644
--- a/board/efikamx/efikamx.c
+++ b/board/efikamx/efikamx.c
@@ -37,6 +37,8 @@
 #include <fsl_pmic.h>
 #include <mc13892.h>
 
+#include "efika.h"
+
 DECLARE_GLOBAL_DATA_PTR;
 
 /*
@@ -678,6 +680,7 @@ int board_late_init(void)
 
 	setup_iomux_led();
 	setup_iomux_ata();
+	setup_iomux_usb();
 
 	efikamx_toggle_led(EFIKAMX_LED_BLUE);
 
diff --git a/include/configs/efikamx.h b/include/configs/efikamx.h
index 54f48e4..010a16a 100644
--- a/include/configs/efikamx.h
+++ b/include/configs/efikamx.h
@@ -44,6 +44,10 @@
 
 #define CONFIG_SYS_TEXT_BASE		0x97800000
 
+#define	CONFIG_L2_OFF
+#define	CONFIG_SYS_ICACHE_OFF
+#define	CONFIG_SYS_DCACHE_OFF
+
 /*
  * Bootloader Components Configuration
  */
@@ -172,6 +176,18 @@
 #endif
 
 /*
+ * USB
+ */
+#define CONFIG_CMD_USB
+#ifdef CONFIG_CMD_USB
+#define CONFIG_USB_EHCI			/* Enable EHCI USB support */
+#define CONFIG_MXC_USB_PORT	1
+#define CONFIG_EHCI_IS_TDI
+#define CONFIG_USB_STORAGE
+#define CONFIG_USB_KEYBOARD
+#endif /* CONFIG_CMD_USB */
+
+/*
  * Filesystems
  */
 #ifdef CONFIG_CMD_FAT
-- 
1.7.6.3

[U-Boot] [PATCH v2 4/4] usb: add USB support for Efika

[Marek Vasut]

On Thursday, September 29, 2011 02:34:43 AM Jana Rapava wrote:
> This commit adds USB support for EfikaMX and EfikaSB.
> 
> Signed-off-by: Jana Rapava <fermata7@gmail.com>
> Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
> Cc: Remy Bohmer <linux@bohmer.net>
> Cc: Stefano Babic <sbabic@denx.de>
> ---
> Changes for v2:
> 	- introduce temporary variable in ulpi_write
> 	- whitespace changes
>  board/efikamx/Makefile      |    3 +
>  board/efikamx/efika.h       |   30 +++
>  board/efikamx/efikamx-usb.c |  423
> +++++++++++++++++++++++++++++++++++++++++++ board/efikamx/efikamx.c     | 
>   3 +
>  include/configs/efikamx.h   |   16 ++
>  5 files changed, 475 insertions(+), 0 deletions(-)
>  create mode 100644 board/efikamx/efika.h
>  create mode 100644 board/efikamx/efikamx-usb.c
> 
> diff --git a/board/efikamx/Makefile b/board/efikamx/Makefile
> index ee4a16e..860e4d2 100644
> --- a/board/efikamx/Makefile
> +++ b/board/efikamx/Makefile
> @@ -28,6 +28,9 @@ include $(TOPDIR)/config.mk
>  LIB	= $(obj)lib$(BOARD).o
> 
>  COBJS	:= efikamx.o
> +ifdef	CONFIG_CMD_USB
> +COBJS	+= efikamx-usb.o
> +endif
> 
>  SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
>  OBJS	:= $(addprefix $(obj),$(COBJS))
> diff --git a/board/efikamx/efika.h b/board/efikamx/efika.h
> new file mode 100644
> index 0000000..b3532e2
> --- /dev/null
> +++ b/board/efikamx/efika.h
> @@ -0,0 +1,30 @@
> +/*
> + * Copyright (C) 2011 Jana Rapava <fermata7@gmail.com>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +/*
> + * EHCI USB
> + */
> +#ifdef	CONFIG_CMD_USB
> +void setup_iomux_usb(void);
> +#else
> +static inline void setup_iomux_usb(void) { }
> +#endif

You're missing protection against multiple inclusion of this file

[U-Boot] [PATCH v3 4/4] usb: add USB support for Efika

[Jana Rapava]

This commit adds USB support for EfikaMX and EfikaSB.

Signed-off-by: Jana Rapava <fermata7@gmail.com>
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Stefano Babic <sbabic@denx.de>
---
Changes for v2:
       - introduce temporary variable in ulpi_write
       - whitespace changes
Changes for v3:
	- add protection against multiple inclusion of efika.h

 board/efikamx/Makefile      |    3 +
 board/efikamx/efika.h       |   33 ++++
 board/efikamx/efikamx-usb.c |  423 +++++++++++++++++++++++++++++++++++++++++++
 board/efikamx/efikamx.c     |    3 +
 include/configs/efikamx.h   |   16 ++
 5 files changed, 478 insertions(+), 0 deletions(-)
 create mode 100644 board/efikamx/efika.h
 create mode 100644 board/efikamx/efikamx-usb.c

diff --git a/board/efikamx/Makefile b/board/efikamx/Makefile
index ee4a16e..860e4d2 100644
--- a/board/efikamx/Makefile
+++ b/board/efikamx/Makefile
@@ -28,6 +28,9 @@ include $(TOPDIR)/config.mk
 LIB	= $(obj)lib$(BOARD).o
 
 COBJS	:= efikamx.o
+ifdef	CONFIG_CMD_USB
+COBJS	+= efikamx-usb.o
+endif
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS))
diff --git a/board/efikamx/efika.h b/board/efikamx/efika.h
new file mode 100644
index 0000000..efda329
--- /dev/null
+++ b/board/efikamx/efika.h
@@ -0,0 +1,33 @@
+/*
+ * Copyright (C) 2011 Jana Rapava <fermata7@gmail.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef EFIKA_H
+#define EFIKA_H
+
+/*
+ * EHCI USB
+ */
+#ifdef	CONFIG_CMD_USB
+void setup_iomux_usb(void);
+#else
+static inline void setup_iomux_usb(void) { }
+#endif
diff --git a/board/efikamx/efikamx-usb.c b/board/efikamx/efikamx-usb.c
new file mode 100644
index 0000000..b169ea7
--- /dev/null
+++ b/board/efikamx/efikamx-usb.c
@@ -0,0 +1,423 @@
+/*
+ * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
+ * Copyright (C) 2011 Jana Rapava <fermata7@gmail.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <usb.h>
+#include <asm/io.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/mx5x_pins.h>
+#include <asm/arch/iomux.h>
+#include <asm/gpio.h>
+#include <usb/ehci-fsl.h>
+#include <errno.h>
+#include <watchdog.h>
+
+#include <usb/ehci.h>
+#include <usb/ehci-core.h>
+
+/*
+ * Configure the USB H1 and USB H2 IOMUX.
+ */
+#define USB_PAD_CONFIG	(PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST | \
+			PAD_CTL_DRV_HIGH | PAD_CTL_100K_PU | \
+			PAD_CTL_HYS_ENABLE | PAD_CTL_PUE_PULL)
+void setup_iomux_usb(void)
+{
+	/*
+	 * Configure USBH1 pads
+	 */
+	mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_STP, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_CLK, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_CLK, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DIR, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DIR, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_NXT, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_NXT, USB_PAD_CONFIG);
+
+	mxc_request_iomux(MX51_PIN_USBH1_DATA0, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA0, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA1, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA1, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA2, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA2, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA3, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA3, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA4, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA4, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA5, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA5, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA6, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA6, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA7, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA7, USB_PAD_CONFIG);
+
+	/*
+	 * Configure USBH1 control pads
+	 */
+
+	/* USB PHY reset */
+	mxc_request_iomux(MX51_PIN_EIM_D27, IOMUX_CONFIG_ALT1);
+	mxc_iomux_set_pad(MX51_PIN_EIM_D27, PAD_CTL_PKE_ENABLE |
+			PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH);
+
+	/* USB HUB reset */
+	mxc_request_iomux(MX51_PIN_GPIO1_5, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_GPIO1_5, PAD_CTL_PKE_ENABLE |
+			PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH);
+
+
+	if (machine_is_efikasb()) {
+		/*
+		 * Configure USBH2 pads (used on EfikaSB)
+		 */
+		/* USBH2_DATA */
+		mxc_request_iomux(MX51_PIN_EIM_D16, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D16, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D17, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D17, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D18, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D18, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D19, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D19, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D20, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D20, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D21, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D21, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D22, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D22, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D23, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D23, USB_PAD_CONFIG);
+
+		/* USBH2_CLK */
+		mxc_request_iomux(MX51_PIN_EIM_A24, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_A24, USB_PAD_CONFIG);
+		/* USBH2_DIR */
+		mxc_request_iomux(MX51_PIN_EIM_A25, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_A25, USB_PAD_CONFIG);
+		/* USBH2_STP */
+		mxc_request_iomux(MX51_PIN_EIM_A26, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_A26, USB_PAD_CONFIG);
+		/* USBH2_NXT */
+		mxc_request_iomux(MX51_PIN_EIM_A27, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_A27, USB_PAD_CONFIG);
+	}
+
+	/* WIFI EN (act low) */
+	mxc_request_iomux(MX51_PIN_EIM_A22, IOMUX_CONFIG_GPIO);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A22, 0);
+	/* WIFI RESET */
+	mxc_request_iomux(MX51_PIN_EIM_A16, IOMUX_CONFIG_GPIO);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A16, 0);
+	/* BT EN (act low) */
+	mxc_request_iomux(MX51_PIN_EIM_A17, IOMUX_CONFIG_GPIO);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A17, 0);
+}
+
+/*
+ * Enable devices connected to USB buses.
+ */
+void efika_usb_enable_devices(void)
+{
+	/* Enable Bluetooth */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A17), 0);
+	udelay(10000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A17), 1);
+
+	/* Enable WiFi */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A22), 1);
+	udelay(10000);
+
+	/* Reset the WiFi chip */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A16), 0);
+	udelay(10000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A16), 1);
+}
+
+/*
+ * Reset USB HUB (or HUBs on EfikaSB).
+ */
+void efika_usb_hub_reset(void)
+{
+	/* HUB reset */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 1);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 0);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 1);
+}
+
+/*
+ * Reset USB PHY (or PHYs on EfikaSB).
+ */
+void efika_usb_phy_reset(void)
+{
+	/* SMSC 3317 PHY reset */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_D27), 0);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_D27), 1);
+}
+
+/*
+ * Configure control registers of the USB controller.
+ */
+void control_regs_setup(struct mx5_usb_control_regs *control)
+{
+	clrsetbits_le32(&control->usbctrl,
+		(MXC_OTG_WUE | MXC_OTG_PM | MX51_H1_ULPI_IE | MX51_H1_WUE),
+		MX51_H1_PM);
+
+	clrsetbits_le32(&control->phyctrl0,
+			MX51_OTG_OVERCURD,
+			MX51_EHCI_POWERPINSE);
+
+	clrsetbits_le32(&control->phyctrl1,
+			MX51_SYSCLOCK_MASK,
+			MX51_SYSCLOCK_24_MHZ);
+
+	setbits_le32(&control->usbctrl1, MX51_H1_EXTCLKE);
+
+	clrsetbits_le32(&control->uh2ctrl,
+			(MX51_H2_ULPI_IE | MX51_H2_WUE),
+			MX51_H2_PM);
+
+	udelay(10000);
+}
+
+#define ULPI_ADDR_SHIFT		16
+#define ulpi_write_mask(value)	((value) & 0xff)
+#define ulpi_read_mask(value)	(((value) >> 8) & 0xff)
+
+int ulpi_wait(struct usb_ehci *ehci, u32 ulpi_value, u32 ulpi_mask)
+{
+	int timeout = ULPI_TIMEOUT;
+	u32 tmp;
+
+	writel(ulpi_value, &ehci->ulpi_viewpoint);
+
+	/* Wait for the bits in ulpi_mask to become zero. */
+	while (--timeout) {
+		tmp = readl(&ehci->ulpi_viewpoint);
+		if (!(tmp & ulpi_mask))
+			break;
+		WATCHDOG_RESET();
+	}
+
+	return !timeout;
+}
+
+int ulpi_wakeup(struct usb_ehci *ehci)
+{
+	if (readl(&ehci->ulpi_viewpoint) & ULPI_SS)
+		return 0; /* already awake */
+	return ulpi_wait(ehci, ULPI_WU, ULPI_WU);
+}
+
+void ulpi_write(struct usb_ehci *ehci, u32 reg, u32 value)
+{
+	u32 tmp;
+	if (ulpi_wakeup(ehci)) {
+		printf("ULPI wakeup timed out\n");
+		return;
+	}
+
+	tmp = ulpi_wait(ehci, ULPI_RWRUN | ULPI_RWCTRL |
+		reg << ULPI_ADDR_SHIFT | ulpi_write_mask(value), ULPI_RWRUN);
+	if (tmp)
+		printf("ULPI write timed out\n");
+}
+
+u32 ulpi_read(struct usb_ehci *ehci, u32 reg)
+{
+	if (ulpi_wakeup(ehci)) {
+		printf("ULPI wakeup timed out\n");
+		return 0;
+	}
+
+	if (ulpi_wait(ehci, ULPI_RWRUN | reg << ULPI_ADDR_SHIFT, ULPI_RWRUN)) {
+		printf("ULPI read timed out\n");
+		return 0;
+	}
+
+	return ulpi_read_mask(readl(&ehci->ulpi_viewpoint));
+}
+
+void ulpi_init(struct usb_ehci *ehci, struct mxc_ulpi_regs *ulpi)
+{
+	u32 tmp = 0;
+	int reg, i;
+
+	/* Assemble ID from four ULPI ID registers (8 bits each). */
+	for (reg = ULPI_ID_REGS_COUNT - 1; reg >= 0; reg--)
+		tmp |= ulpi_read(ehci, reg) << (reg * 8);
+
+	/* Split ID into vendor and product ID. */
+	debug("Found ULPI TX, ID %04x:%04x\n", tmp >> 16, tmp & 0xffff);
+
+	/* ULPI integrity check */
+	for (i = 0; i < 2; i++) {
+		ulpi_write(ehci, (u32)&ulpi->scratch_write,
+			ULPI_TEST_VALUE << i);
+		tmp = ulpi_read(ehci, (u32)&ulpi->scratch_write);
+
+		if (tmp != (ULPI_TEST_VALUE << i)) {
+			printf("ULPI integrity check failed\n");
+			return;
+		}
+	}
+
+	/* Set ULPI flags. */
+	ulpi_write(ehci, (u32)&ulpi->otg_ctrl_write,
+		ULPI_OTG_EXT_VBUS_IND |
+		ULPI_OTG_DM_PULLDOWN | ULPI_OTG_DP_PULLDOWN);
+	ulpi_write(ehci, (u32)&ulpi->function_ctrl_write,
+		ULPI_FC_XCVR_SELECT | ULPI_FC_OPMODE_NORMAL |
+		ULPI_FC_SUSPENDM_PWRED);
+	ulpi_write(ehci, (u32)&ulpi->iface_ctrl_write, 0);
+	ulpi_write(ehci, (u32)&ulpi->otg_ctrl_set,
+		ULPI_OTG_DRV_VBUS | ULPI_OTG_DRV_VBUS_EXT);
+
+	/*
+	 * NOTE: This violates USB specification, but otherwise, USB on Efika
+	 * doesn't charge VBUS and as a result, USB doesn't work.
+	 */
+	ulpi_write(ehci, (u32)&ulpi->otg_ctrl_set, ULPI_OTG_CHRG_VBUS);
+}
+
+/*
+ * Solve the VBUS reset problem on Efika
+ * by setting the CHRG_VBUS bit in the reset.
+ */
+void ehci_fixup(uint32_t *status_reg, uint32_t *reg_ref)
+{
+	struct usb_ehci *ehci = (struct usb_ehci *)(OTG_BASE_ADDR +
+		MX51_REGISTER_LAYOUT_LENGTH);
+	struct mxc_ulpi_regs *ulpi = (struct mxc_ulpi_regs *)0;
+
+	u32 tmp = ulpi_read(ehci, (u32)&ulpi->otg_ctrl_write);
+	tmp |= ULPI_OTG_CHRG_VBUS;
+	ulpi_write(ehci, (u32)&ulpi->otg_ctrl_write, tmp);
+
+	/* USB 2.0 specification say 50 ms resets on root. */
+	wait_ms(50);
+
+	/* Now terminate the reset. */
+	*reg_ref = ehci_readl(status_reg);
+	*reg_ref |= EHCI_PS_PE;
+}
+
+void ehci0_init(struct usb_ehci *ehci)
+{
+	writel(MX51_16BIT_UTMI, &ehci->portsc);
+}
+
+void ehci1_init(struct usb_ehci *ehci, struct mxc_ulpi_regs *ulpi)
+{
+	mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT2);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_STP, PAD_CTL_DRV_HIGH |
+				PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST);
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_USBH1_STP), 0);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_USBH1_STP), 1);
+	udelay(1000);
+
+	mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_STP, USB_PAD_CONFIG);
+	udelay(10000);
+
+	clrbits_le32(&ehci->usbcmd, MX51_ITC_IMMEDIATE_MASK);
+	udelay(10000);
+
+	writel(MX51_ULPI_MODE_MASK, &ehci->portsc);
+	udelay(10000);
+
+	ulpi_init(ehci, ulpi);
+}
+
+void ehci2_init(struct usb_ehci *ehci, struct mxc_ulpi_regs *ulpi)
+{
+	mxc_request_iomux(MX51_PIN_EIM_A26, IOMUX_CONFIG_ALT1);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A26, PAD_CTL_DRV_HIGH |
+				PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST);
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A26), 0);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A26), 1);
+	udelay(1000);
+
+	mxc_request_iomux(MX51_PIN_EIM_A26, IOMUX_CONFIG_ALT2);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A26, USB_PAD_CONFIG);
+
+	writel(MX51_ULPI_MODE_MASK, &ehci->portsc);
+	udelay(10000);
+
+	ulpi_init(ehci, ulpi);
+}
+
+int ehci_hcd_init(void)
+{
+	struct usb_ehci *ehci;
+	struct mx5_usb_control_regs *mx5_usb_control_regs;
+	struct mxc_ulpi_regs *ulpi;
+
+	mx5_usb_control_regs = (struct mx5_usb_control_regs *)(OTG_BASE_ADDR +
+		 MX5_CTRL_REGS_OFFSET);
+	control_regs_setup(mx5_usb_control_regs);
+	ulpi = (struct mxc_ulpi_regs *)0;
+
+	/* Init EHCI core */
+	ehci = (struct usb_ehci *)(OTG_BASE_ADDR +
+		(MX51_REGISTER_LAYOUT_LENGTH * CONFIG_MXC_USB_PORT));
+	hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
+	hcor = (struct ehci_hcor *)((uint32_t) hccr +
+			HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
+	setbits_le32(&ehci->usbmode, CM_HOST);
+	setbits_le32(&ehci->control, USB_EN);
+
+	/* Init iMX51 EHCI */
+	efika_usb_phy_reset();
+	efika_usb_hub_reset();
+	efika_usb_enable_devices();
+
+	switch (CONFIG_MXC_USB_PORT) {
+	case 0:
+		ehci0_init(ehci);
+		break;
+	case 1:
+		ehci1_init(ehci, ulpi);
+		break;
+	case 2:
+		if (machine_is_efikasb())
+			ehci2_init(ehci, ulpi);
+		break;
+	};
+
+	/* EfikaMX USB has issues ... */
+	udelay(10000);
+
+	return 0;
+}
+
+int ehci_hcd_stop(void)
+{
+	return 0;
+}
diff --git a/board/efikamx/efikamx.c b/board/efikamx/efikamx.c
index 0c4e24b..8e9b42b 100644
--- a/board/efikamx/efikamx.c
+++ b/board/efikamx/efikamx.c
@@ -37,6 +37,8 @@
 #include <fsl_pmic.h>
 #include <mc13892.h>
 
+#include "efika.h"
+
 DECLARE_GLOBAL_DATA_PTR;
 
 /*
@@ -678,6 +680,7 @@ int board_late_init(void)
 
 	setup_iomux_led();
 	setup_iomux_ata();
+	setup_iomux_usb();
 
 	efikamx_toggle_led(EFIKAMX_LED_BLUE);
 
diff --git a/include/configs/efikamx.h b/include/configs/efikamx.h
index 54f48e4..010a16a 100644
--- a/include/configs/efikamx.h
+++ b/include/configs/efikamx.h
@@ -44,6 +44,10 @@
 
 #define CONFIG_SYS_TEXT_BASE		0x97800000
 
+#define	CONFIG_L2_OFF
+#define	CONFIG_SYS_ICACHE_OFF
+#define	CONFIG_SYS_DCACHE_OFF
+
 /*
  * Bootloader Components Configuration
  */
@@ -172,6 +176,18 @@
 #endif
 
 /*
+ * USB
+ */
+#define CONFIG_CMD_USB
+#ifdef CONFIG_CMD_USB
+#define CONFIG_USB_EHCI			/* Enable EHCI USB support */
+#define CONFIG_MXC_USB_PORT	1
+#define CONFIG_EHCI_IS_TDI
+#define CONFIG_USB_STORAGE
+#define CONFIG_USB_KEYBOARD
+#endif /* CONFIG_CMD_USB */
+
+/*
  * Filesystems
  */
 #ifdef CONFIG_CMD_FAT
-- 
1.7.6.3

[U-Boot] [PATCH v3 4/4] usb: add USB support for Efika

[Marek Vasut]

> This commit adds USB support for EfikaMX and EfikaSB.
> 
> Signed-off-by: Jana Rapava <fermata7@gmail.com>
> Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
> Cc: Remy Bohmer <linux@bohmer.net>
> Cc: Stefano Babic <sbabic@denx.de>
> ---
> Changes for v2:
>? ? ? ? ? ? ?  - introduce temporary variable in ulpi_write
>? ? ? ? ? ? ?  - whitespace changes
> Changes for v3:
> ??? - add protection against multiple inclusion of efika.h
> 
>?  board/efikamx/Makefile? ? ? ? ?  |? ? ?  3 +
>?  board/efikamx/efika.h? ? ? ? ? ?  |? ?  33 ++++
>?  board/efikamx/efikamx-usb.c |?  423
> +++++++++++++++++++++++++++++++++++++++++++ board/efikamx/efikamx.c? ? ?  
> |? ? ?  3 + include/configs/efikamx.h? ?  |? ?  16 ++
>?  5 files changed, 478 insertions(+), 0 deletions(-)
>?  create mode 100644 board/efikamx/efika.h
>?  create mode 100644 board/efikamx/efikamx-usb.c
> 

Dear Jana Rapava,

[...]

> +#ifndef EFIKA_H
> +#define EFIKA_H

__BOARD_EFIKAMX_EFIKA_H__ to make it more distinguishable.

BR, MV

[U-Boot] [PATCH v4 4/4] usb: add USB support for Efika

[Jana Rapava]

This commit adds USB support for EfikaMX and EfikaSB.

Signed-off-by: Jana Rapava <fermata7@gmail.com>
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Stefano Babic <sbabic@denx.de>
---
Changes for v2:
      - introduce temporary variable in ulpi_write
      - whitespace changes
Changes for v3:
       - add protection against multiple inclusion of efika.h
Changes for v4:
	- rename multiple inclusion protection macro in efika.h

 board/efikamx/Makefile      |    3 +
 board/efikamx/efika.h       |   33 ++++
 board/efikamx/efikamx-usb.c |  423 +++++++++++++++++++++++++++++++++++++++++++
 board/efikamx/efikamx.c     |    3 +
 include/configs/efikamx.h   |   16 ++
 5 files changed, 478 insertions(+), 0 deletions(-)
 create mode 100644 board/efikamx/efika.h
 create mode 100644 board/efikamx/efikamx-usb.c

diff --git a/board/efikamx/Makefile b/board/efikamx/Makefile
index ee4a16e..860e4d2 100644
--- a/board/efikamx/Makefile
+++ b/board/efikamx/Makefile
@@ -28,6 +28,9 @@ include $(TOPDIR)/config.mk
 LIB	= $(obj)lib$(BOARD).o
 
 COBJS	:= efikamx.o
+ifdef	CONFIG_CMD_USB
+COBJS	+= efikamx-usb.o
+endif
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS))
diff --git a/board/efikamx/efika.h b/board/efikamx/efika.h
new file mode 100644
index 0000000..f5a09e3
--- /dev/null
+++ b/board/efikamx/efika.h
@@ -0,0 +1,33 @@
+/*
+ * Copyright (C) 2011 Jana Rapava <fermata7@gmail.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __BOARD_EFIKAMX_EFIKA_H__
+#define __BOARD_EFIKAMX_EFIKA_H__
+
+/*
+ * EHCI USB
+ */
+#ifdef	CONFIG_CMD_USB
+void setup_iomux_usb(void);
+#else
+static inline void setup_iomux_usb(void) { }
+#endif
diff --git a/board/efikamx/efikamx-usb.c b/board/efikamx/efikamx-usb.c
new file mode 100644
index 0000000..b169ea7
--- /dev/null
+++ b/board/efikamx/efikamx-usb.c
@@ -0,0 +1,423 @@
+/*
+ * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
+ * Copyright (C) 2011 Jana Rapava <fermata7@gmail.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <usb.h>
+#include <asm/io.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/mx5x_pins.h>
+#include <asm/arch/iomux.h>
+#include <asm/gpio.h>
+#include <usb/ehci-fsl.h>
+#include <errno.h>
+#include <watchdog.h>
+
+#include <usb/ehci.h>
+#include <usb/ehci-core.h>
+
+/*
+ * Configure the USB H1 and USB H2 IOMUX.
+ */
+#define USB_PAD_CONFIG	(PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST | \
+			PAD_CTL_DRV_HIGH | PAD_CTL_100K_PU | \
+			PAD_CTL_HYS_ENABLE | PAD_CTL_PUE_PULL)
+void setup_iomux_usb(void)
+{
+	/*
+	 * Configure USBH1 pads
+	 */
+	mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_STP, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_CLK, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_CLK, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DIR, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DIR, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_NXT, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_NXT, USB_PAD_CONFIG);
+
+	mxc_request_iomux(MX51_PIN_USBH1_DATA0, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA0, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA1, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA1, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA2, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA2, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA3, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA3, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA4, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA4, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA5, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA5, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA6, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA6, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA7, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA7, USB_PAD_CONFIG);
+
+	/*
+	 * Configure USBH1 control pads
+	 */
+
+	/* USB PHY reset */
+	mxc_request_iomux(MX51_PIN_EIM_D27, IOMUX_CONFIG_ALT1);
+	mxc_iomux_set_pad(MX51_PIN_EIM_D27, PAD_CTL_PKE_ENABLE |
+			PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH);
+
+	/* USB HUB reset */
+	mxc_request_iomux(MX51_PIN_GPIO1_5, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_GPIO1_5, PAD_CTL_PKE_ENABLE |
+			PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH);
+
+
+	if (machine_is_efikasb()) {
+		/*
+		 * Configure USBH2 pads (used on EfikaSB)
+		 */
+		/* USBH2_DATA */
+		mxc_request_iomux(MX51_PIN_EIM_D16, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D16, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D17, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D17, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D18, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D18, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D19, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D19, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D20, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D20, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D21, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D21, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D22, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D22, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D23, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D23, USB_PAD_CONFIG);
+
+		/* USBH2_CLK */
+		mxc_request_iomux(MX51_PIN_EIM_A24, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_A24, USB_PAD_CONFIG);
+		/* USBH2_DIR */
+		mxc_request_iomux(MX51_PIN_EIM_A25, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_A25, USB_PAD_CONFIG);
+		/* USBH2_STP */
+		mxc_request_iomux(MX51_PIN_EIM_A26, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_A26, USB_PAD_CONFIG);
+		/* USBH2_NXT */
+		mxc_request_iomux(MX51_PIN_EIM_A27, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_A27, USB_PAD_CONFIG);
+	}
+
+	/* WIFI EN (act low) */
+	mxc_request_iomux(MX51_PIN_EIM_A22, IOMUX_CONFIG_GPIO);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A22, 0);
+	/* WIFI RESET */
+	mxc_request_iomux(MX51_PIN_EIM_A16, IOMUX_CONFIG_GPIO);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A16, 0);
+	/* BT EN (act low) */
+	mxc_request_iomux(MX51_PIN_EIM_A17, IOMUX_CONFIG_GPIO);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A17, 0);
+}
+
+/*
+ * Enable devices connected to USB buses.
+ */
+void efika_usb_enable_devices(void)
+{
+	/* Enable Bluetooth */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A17), 0);
+	udelay(10000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A17), 1);
+
+	/* Enable WiFi */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A22), 1);
+	udelay(10000);
+
+	/* Reset the WiFi chip */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A16), 0);
+	udelay(10000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A16), 1);
+}
+
+/*
+ * Reset USB HUB (or HUBs on EfikaSB).
+ */
+void efika_usb_hub_reset(void)
+{
+	/* HUB reset */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 1);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 0);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 1);
+}
+
+/*
+ * Reset USB PHY (or PHYs on EfikaSB).
+ */
+void efika_usb_phy_reset(void)
+{
+	/* SMSC 3317 PHY reset */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_D27), 0);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_D27), 1);
+}
+
+/*
+ * Configure control registers of the USB controller.
+ */
+void control_regs_setup(struct mx5_usb_control_regs *control)
+{
+	clrsetbits_le32(&control->usbctrl,
+		(MXC_OTG_WUE | MXC_OTG_PM | MX51_H1_ULPI_IE | MX51_H1_WUE),
+		MX51_H1_PM);
+
+	clrsetbits_le32(&control->phyctrl0,
+			MX51_OTG_OVERCURD,
+			MX51_EHCI_POWERPINSE);
+
+	clrsetbits_le32(&control->phyctrl1,
+			MX51_SYSCLOCK_MASK,
+			MX51_SYSCLOCK_24_MHZ);
+
+	setbits_le32(&control->usbctrl1, MX51_H1_EXTCLKE);
+
+	clrsetbits_le32(&control->uh2ctrl,
+			(MX51_H2_ULPI_IE | MX51_H2_WUE),
+			MX51_H2_PM);
+
+	udelay(10000);
+}
+
+#define ULPI_ADDR_SHIFT		16
+#define ulpi_write_mask(value)	((value) & 0xff)
+#define ulpi_read_mask(value)	(((value) >> 8) & 0xff)
+
+int ulpi_wait(struct usb_ehci *ehci, u32 ulpi_value, u32 ulpi_mask)
+{
+	int timeout = ULPI_TIMEOUT;
+	u32 tmp;
+
+	writel(ulpi_value, &ehci->ulpi_viewpoint);
+
+	/* Wait for the bits in ulpi_mask to become zero. */
+	while (--timeout) {
+		tmp = readl(&ehci->ulpi_viewpoint);
+		if (!(tmp & ulpi_mask))
+			break;
+		WATCHDOG_RESET();
+	}
+
+	return !timeout;
+}
+
+int ulpi_wakeup(struct usb_ehci *ehci)
+{
+	if (readl(&ehci->ulpi_viewpoint) & ULPI_SS)
+		return 0; /* already awake */
+	return ulpi_wait(ehci, ULPI_WU, ULPI_WU);
+}
+
+void ulpi_write(struct usb_ehci *ehci, u32 reg, u32 value)
+{
+	u32 tmp;
+	if (ulpi_wakeup(ehci)) {
+		printf("ULPI wakeup timed out\n");
+		return;
+	}
+
+	tmp = ulpi_wait(ehci, ULPI_RWRUN | ULPI_RWCTRL |
+		reg << ULPI_ADDR_SHIFT | ulpi_write_mask(value), ULPI_RWRUN);
+	if (tmp)
+		printf("ULPI write timed out\n");
+}
+
+u32 ulpi_read(struct usb_ehci *ehci, u32 reg)
+{
+	if (ulpi_wakeup(ehci)) {
+		printf("ULPI wakeup timed out\n");
+		return 0;
+	}
+
+	if (ulpi_wait(ehci, ULPI_RWRUN | reg << ULPI_ADDR_SHIFT, ULPI_RWRUN)) {
+		printf("ULPI read timed out\n");
+		return 0;
+	}
+
+	return ulpi_read_mask(readl(&ehci->ulpi_viewpoint));
+}
+
+void ulpi_init(struct usb_ehci *ehci, struct mxc_ulpi_regs *ulpi)
+{
+	u32 tmp = 0;
+	int reg, i;
+
+	/* Assemble ID from four ULPI ID registers (8 bits each). */
+	for (reg = ULPI_ID_REGS_COUNT - 1; reg >= 0; reg--)
+		tmp |= ulpi_read(ehci, reg) << (reg * 8);
+
+	/* Split ID into vendor and product ID. */
+	debug("Found ULPI TX, ID %04x:%04x\n", tmp >> 16, tmp & 0xffff);
+
+	/* ULPI integrity check */
+	for (i = 0; i < 2; i++) {
+		ulpi_write(ehci, (u32)&ulpi->scratch_write,
+			ULPI_TEST_VALUE << i);
+		tmp = ulpi_read(ehci, (u32)&ulpi->scratch_write);
+
+		if (tmp != (ULPI_TEST_VALUE << i)) {
+			printf("ULPI integrity check failed\n");
+			return;
+		}
+	}
+
+	/* Set ULPI flags. */
+	ulpi_write(ehci, (u32)&ulpi->otg_ctrl_write,
+		ULPI_OTG_EXT_VBUS_IND |
+		ULPI_OTG_DM_PULLDOWN | ULPI_OTG_DP_PULLDOWN);
+	ulpi_write(ehci, (u32)&ulpi->function_ctrl_write,
+		ULPI_FC_XCVR_SELECT | ULPI_FC_OPMODE_NORMAL |
+		ULPI_FC_SUSPENDM_PWRED);
+	ulpi_write(ehci, (u32)&ulpi->iface_ctrl_write, 0);
+	ulpi_write(ehci, (u32)&ulpi->otg_ctrl_set,
+		ULPI_OTG_DRV_VBUS | ULPI_OTG_DRV_VBUS_EXT);
+
+	/*
+	 * NOTE: This violates USB specification, but otherwise, USB on Efika
+	 * doesn't charge VBUS and as a result, USB doesn't work.
+	 */
+	ulpi_write(ehci, (u32)&ulpi->otg_ctrl_set, ULPI_OTG_CHRG_VBUS);
+}
+
+/*
+ * Solve the VBUS reset problem on Efika
+ * by setting the CHRG_VBUS bit in the reset.
+ */
+void ehci_fixup(uint32_t *status_reg, uint32_t *reg_ref)
+{
+	struct usb_ehci *ehci = (struct usb_ehci *)(OTG_BASE_ADDR +
+		MX51_REGISTER_LAYOUT_LENGTH);
+	struct mxc_ulpi_regs *ulpi = (struct mxc_ulpi_regs *)0;
+
+	u32 tmp = ulpi_read(ehci, (u32)&ulpi->otg_ctrl_write);
+	tmp |= ULPI_OTG_CHRG_VBUS;
+	ulpi_write(ehci, (u32)&ulpi->otg_ctrl_write, tmp);
+
+	/* USB 2.0 specification say 50 ms resets on root. */
+	wait_ms(50);
+
+	/* Now terminate the reset. */
+	*reg_ref = ehci_readl(status_reg);
+	*reg_ref |= EHCI_PS_PE;
+}
+
+void ehci0_init(struct usb_ehci *ehci)
+{
+	writel(MX51_16BIT_UTMI, &ehci->portsc);
+}
+
+void ehci1_init(struct usb_ehci *ehci, struct mxc_ulpi_regs *ulpi)
+{
+	mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT2);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_STP, PAD_CTL_DRV_HIGH |
+				PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST);
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_USBH1_STP), 0);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_USBH1_STP), 1);
+	udelay(1000);
+
+	mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_STP, USB_PAD_CONFIG);
+	udelay(10000);
+
+	clrbits_le32(&ehci->usbcmd, MX51_ITC_IMMEDIATE_MASK);
+	udelay(10000);
+
+	writel(MX51_ULPI_MODE_MASK, &ehci->portsc);
+	udelay(10000);
+
+	ulpi_init(ehci, ulpi);
+}
+
+void ehci2_init(struct usb_ehci *ehci, struct mxc_ulpi_regs *ulpi)
+{
+	mxc_request_iomux(MX51_PIN_EIM_A26, IOMUX_CONFIG_ALT1);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A26, PAD_CTL_DRV_HIGH |
+				PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST);
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A26), 0);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A26), 1);
+	udelay(1000);
+
+	mxc_request_iomux(MX51_PIN_EIM_A26, IOMUX_CONFIG_ALT2);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A26, USB_PAD_CONFIG);
+
+	writel(MX51_ULPI_MODE_MASK, &ehci->portsc);
+	udelay(10000);
+
+	ulpi_init(ehci, ulpi);
+}
+
+int ehci_hcd_init(void)
+{
+	struct usb_ehci *ehci;
+	struct mx5_usb_control_regs *mx5_usb_control_regs;
+	struct mxc_ulpi_regs *ulpi;
+
+	mx5_usb_control_regs = (struct mx5_usb_control_regs *)(OTG_BASE_ADDR +
+		 MX5_CTRL_REGS_OFFSET);
+	control_regs_setup(mx5_usb_control_regs);
+	ulpi = (struct mxc_ulpi_regs *)0;
+
+	/* Init EHCI core */
+	ehci = (struct usb_ehci *)(OTG_BASE_ADDR +
+		(MX51_REGISTER_LAYOUT_LENGTH * CONFIG_MXC_USB_PORT));
+	hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
+	hcor = (struct ehci_hcor *)((uint32_t) hccr +
+			HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
+	setbits_le32(&ehci->usbmode, CM_HOST);
+	setbits_le32(&ehci->control, USB_EN);
+
+	/* Init iMX51 EHCI */
+	efika_usb_phy_reset();
+	efika_usb_hub_reset();
+	efika_usb_enable_devices();
+
+	switch (CONFIG_MXC_USB_PORT) {
+	case 0:
+		ehci0_init(ehci);
+		break;
+	case 1:
+		ehci1_init(ehci, ulpi);
+		break;
+	case 2:
+		if (machine_is_efikasb())
+			ehci2_init(ehci, ulpi);
+		break;
+	};
+
+	/* EfikaMX USB has issues ... */
+	udelay(10000);
+
+	return 0;
+}
+
+int ehci_hcd_stop(void)
+{
+	return 0;
+}
diff --git a/board/efikamx/efikamx.c b/board/efikamx/efikamx.c
index 0c4e24b..8e9b42b 100644
--- a/board/efikamx/efikamx.c
+++ b/board/efikamx/efikamx.c
@@ -37,6 +37,8 @@
 #include <fsl_pmic.h>
 #include <mc13892.h>
 
+#include "efika.h"
+
 DECLARE_GLOBAL_DATA_PTR;
 
 /*
@@ -678,6 +680,7 @@ int board_late_init(void)
 
 	setup_iomux_led();
 	setup_iomux_ata();
+	setup_iomux_usb();
 
 	efikamx_toggle_led(EFIKAMX_LED_BLUE);
 
diff --git a/include/configs/efikamx.h b/include/configs/efikamx.h
index 54f48e4..010a16a 100644
--- a/include/configs/efikamx.h
+++ b/include/configs/efikamx.h
@@ -44,6 +44,10 @@
 
 #define CONFIG_SYS_TEXT_BASE		0x97800000
 
+#define	CONFIG_L2_OFF
+#define	CONFIG_SYS_ICACHE_OFF
+#define	CONFIG_SYS_DCACHE_OFF
+
 /*
  * Bootloader Components Configuration
  */
@@ -172,6 +176,18 @@
 #endif
 
 /*
+ * USB
+ */
+#define CONFIG_CMD_USB
+#ifdef CONFIG_CMD_USB
+#define CONFIG_USB_EHCI			/* Enable EHCI USB support */
+#define CONFIG_MXC_USB_PORT	1
+#define CONFIG_EHCI_IS_TDI
+#define CONFIG_USB_STORAGE
+#define CONFIG_USB_KEYBOARD
+#endif /* CONFIG_CMD_USB */
+
+/*
  * Filesystems
  */
 #ifdef CONFIG_CMD_FAT
-- 
1.7.6.3

[U-Boot] [PATCH v4 4/4] usb: add USB support for Efika

[Marek Vasut]

> This commit adds USB support for EfikaMX and EfikaSB.
> 
> Signed-off-by: Jana Rapava <fermata7@gmail.com>
> Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
> Cc: Remy Bohmer <linux@bohmer.net>
> Cc: Stefano Babic <sbabic@denx.de>
> ---
> Changes for v2:
>? ? ? ? ? ?  - introduce temporary variable in ulpi_write
>? ? ? ? ? ?  - whitespace changes
> Changes for v3:
>? ? ? ? ? ? ?  - add protection against multiple inclusion of efika.h
> Changes for v4:
> ??? - rename multiple inclusion protection macro in efika.h
> 
>?  board/efikamx/Makefile? ? ? ? ?  |? ? ?  3 +
>?  board/efikamx/efika.h? ? ? ? ? ?  |? ?  33 ++++
>?  board/efikamx/efikamx-usb.c |?  423
> +++++++++++++++++++++++++++++++++++++++++++ board/efikamx/efikamx.c? ? ?  
> |? ? ?  3 + include/configs/efikamx.h? ?  |? ?  16 ++
>?  5 files changed, 478 insertions(+), 0 deletions(-)
>?  create mode 100644 board/efikamx/efika.h
>?  create mode 100644 board/efikamx/efikamx-usb.c
>

Dear Jana Rapava, 

[...]

> +#ifndef __BOARD_EFIKAMX_EFIKA_H__
> +#define __BOARD_EFIKAMX_EFIKA_H__
> +
> +/*
> + * EHCI USB
> + */
> +#ifdef??? CONFIG_CMD_USB
> +void setup_iomux_usb(void);
> +#else
> +static inline void setup_iomux_usb(void) { }
> +#endif

Is the ifndef actually unterminated? Did you even compile-test this?

[U-Boot] [PATCH v5 4/4] Add USB support for Efika

[Jana Rapava]

This commit adds USB support for EfikaMX and EfikaSB.

Signed-off-by: Jana Rapava <fermata7@gmail.com>
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Stefano Babic <sbabic@denx.de>
---
Changes for v2:
     - introduce temporary variable in ulpi_write
     - whitespace changes
Changes for v3:
      - add protection against multiple inclusion of efika.h
Changes for v4:
       - rename multiple inclusion protection macro in efika.h
Changes for v5:
	- fix unterminated #ifndef in efika.h

 board/efikamx/Makefile      |    3 +
 board/efikamx/efika.h       |   35 ++++
 board/efikamx/efikamx-usb.c |  423 +++++++++++++++++++++++++++++++++++++++++++
 board/efikamx/efikamx.c     |    3 +
 include/configs/efikamx.h   |   16 ++
 5 files changed, 480 insertions(+), 0 deletions(-)
 create mode 100644 board/efikamx/efika.h
 create mode 100644 board/efikamx/efikamx-usb.c

diff --git a/board/efikamx/Makefile b/board/efikamx/Makefile
index ee4a16e..860e4d2 100644
--- a/board/efikamx/Makefile
+++ b/board/efikamx/Makefile
@@ -28,6 +28,9 @@ include $(TOPDIR)/config.mk
 LIB	= $(obj)lib$(BOARD).o
 
 COBJS	:= efikamx.o
+ifdef	CONFIG_CMD_USB
+COBJS	+= efikamx-usb.o
+endif
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS))
diff --git a/board/efikamx/efika.h b/board/efikamx/efika.h
new file mode 100644
index 0000000..fec9ee0
--- /dev/null
+++ b/board/efikamx/efika.h
@@ -0,0 +1,35 @@
+/*
+ * Copyright (C) 2011 Jana Rapava <fermata7@gmail.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __BOARD_EFIKAMX_EFIKA_H__
+#define __BOARD_EFIKAMX_EFIKA_H__
+
+/*
+ * EHCI USB
+ */
+#ifdef	CONFIG_CMD_USB
+void setup_iomux_usb(void);
+#else
+static inline void setup_iomux_usb(void) { }
+#endif
+
+#endif /* __BOARD_EFIKAMX_EFIKA_H__ */
diff --git a/board/efikamx/efikamx-usb.c b/board/efikamx/efikamx-usb.c
new file mode 100644
index 0000000..b169ea7
--- /dev/null
+++ b/board/efikamx/efikamx-usb.c
@@ -0,0 +1,423 @@
+/*
+ * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
+ * Copyright (C) 2011 Jana Rapava <fermata7@gmail.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <usb.h>
+#include <asm/io.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/mx5x_pins.h>
+#include <asm/arch/iomux.h>
+#include <asm/gpio.h>
+#include <usb/ehci-fsl.h>
+#include <errno.h>
+#include <watchdog.h>
+
+#include <usb/ehci.h>
+#include <usb/ehci-core.h>
+
+/*
+ * Configure the USB H1 and USB H2 IOMUX.
+ */
+#define USB_PAD_CONFIG	(PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST | \
+			PAD_CTL_DRV_HIGH | PAD_CTL_100K_PU | \
+			PAD_CTL_HYS_ENABLE | PAD_CTL_PUE_PULL)
+void setup_iomux_usb(void)
+{
+	/*
+	 * Configure USBH1 pads
+	 */
+	mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_STP, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_CLK, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_CLK, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DIR, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DIR, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_NXT, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_NXT, USB_PAD_CONFIG);
+
+	mxc_request_iomux(MX51_PIN_USBH1_DATA0, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA0, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA1, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA1, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA2, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA2, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA3, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA3, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA4, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA4, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA5, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA5, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA6, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA6, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA7, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA7, USB_PAD_CONFIG);
+
+	/*
+	 * Configure USBH1 control pads
+	 */
+
+	/* USB PHY reset */
+	mxc_request_iomux(MX51_PIN_EIM_D27, IOMUX_CONFIG_ALT1);
+	mxc_iomux_set_pad(MX51_PIN_EIM_D27, PAD_CTL_PKE_ENABLE |
+			PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH);
+
+	/* USB HUB reset */
+	mxc_request_iomux(MX51_PIN_GPIO1_5, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_GPIO1_5, PAD_CTL_PKE_ENABLE |
+			PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH);
+
+
+	if (machine_is_efikasb()) {
+		/*
+		 * Configure USBH2 pads (used on EfikaSB)
+		 */
+		/* USBH2_DATA */
+		mxc_request_iomux(MX51_PIN_EIM_D16, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D16, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D17, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D17, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D18, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D18, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D19, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D19, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D20, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D20, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D21, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D21, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D22, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D22, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D23, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D23, USB_PAD_CONFIG);
+
+		/* USBH2_CLK */
+		mxc_request_iomux(MX51_PIN_EIM_A24, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_A24, USB_PAD_CONFIG);
+		/* USBH2_DIR */
+		mxc_request_iomux(MX51_PIN_EIM_A25, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_A25, USB_PAD_CONFIG);
+		/* USBH2_STP */
+		mxc_request_iomux(MX51_PIN_EIM_A26, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_A26, USB_PAD_CONFIG);
+		/* USBH2_NXT */
+		mxc_request_iomux(MX51_PIN_EIM_A27, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_A27, USB_PAD_CONFIG);
+	}
+
+	/* WIFI EN (act low) */
+	mxc_request_iomux(MX51_PIN_EIM_A22, IOMUX_CONFIG_GPIO);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A22, 0);
+	/* WIFI RESET */
+	mxc_request_iomux(MX51_PIN_EIM_A16, IOMUX_CONFIG_GPIO);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A16, 0);
+	/* BT EN (act low) */
+	mxc_request_iomux(MX51_PIN_EIM_A17, IOMUX_CONFIG_GPIO);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A17, 0);
+}
+
+/*
+ * Enable devices connected to USB buses.
+ */
+void efika_usb_enable_devices(void)
+{
+	/* Enable Bluetooth */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A17), 0);
+	udelay(10000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A17), 1);
+
+	/* Enable WiFi */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A22), 1);
+	udelay(10000);
+
+	/* Reset the WiFi chip */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A16), 0);
+	udelay(10000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A16), 1);
+}
+
+/*
+ * Reset USB HUB (or HUBs on EfikaSB).
+ */
+void efika_usb_hub_reset(void)
+{
+	/* HUB reset */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 1);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 0);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 1);
+}
+
+/*
+ * Reset USB PHY (or PHYs on EfikaSB).
+ */
+void efika_usb_phy_reset(void)
+{
+	/* SMSC 3317 PHY reset */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_D27), 0);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_D27), 1);
+}
+
+/*
+ * Configure control registers of the USB controller.
+ */
+void control_regs_setup(struct mx5_usb_control_regs *control)
+{
+	clrsetbits_le32(&control->usbctrl,
+		(MXC_OTG_WUE | MXC_OTG_PM | MX51_H1_ULPI_IE | MX51_H1_WUE),
+		MX51_H1_PM);
+
+	clrsetbits_le32(&control->phyctrl0,
+			MX51_OTG_OVERCURD,
+			MX51_EHCI_POWERPINSE);
+
+	clrsetbits_le32(&control->phyctrl1,
+			MX51_SYSCLOCK_MASK,
+			MX51_SYSCLOCK_24_MHZ);
+
+	setbits_le32(&control->usbctrl1, MX51_H1_EXTCLKE);
+
+	clrsetbits_le32(&control->uh2ctrl,
+			(MX51_H2_ULPI_IE | MX51_H2_WUE),
+			MX51_H2_PM);
+
+	udelay(10000);
+}
+
+#define ULPI_ADDR_SHIFT		16
+#define ulpi_write_mask(value)	((value) & 0xff)
+#define ulpi_read_mask(value)	(((value) >> 8) & 0xff)
+
+int ulpi_wait(struct usb_ehci *ehci, u32 ulpi_value, u32 ulpi_mask)
+{
+	int timeout = ULPI_TIMEOUT;
+	u32 tmp;
+
+	writel(ulpi_value, &ehci->ulpi_viewpoint);
+
+	/* Wait for the bits in ulpi_mask to become zero. */
+	while (--timeout) {
+		tmp = readl(&ehci->ulpi_viewpoint);
+		if (!(tmp & ulpi_mask))
+			break;
+		WATCHDOG_RESET();
+	}
+
+	return !timeout;
+}
+
+int ulpi_wakeup(struct usb_ehci *ehci)
+{
+	if (readl(&ehci->ulpi_viewpoint) & ULPI_SS)
+		return 0; /* already awake */
+	return ulpi_wait(ehci, ULPI_WU, ULPI_WU);
+}
+
+void ulpi_write(struct usb_ehci *ehci, u32 reg, u32 value)
+{
+	u32 tmp;
+	if (ulpi_wakeup(ehci)) {
+		printf("ULPI wakeup timed out\n");
+		return;
+	}
+
+	tmp = ulpi_wait(ehci, ULPI_RWRUN | ULPI_RWCTRL |
+		reg << ULPI_ADDR_SHIFT | ulpi_write_mask(value), ULPI_RWRUN);
+	if (tmp)
+		printf("ULPI write timed out\n");
+}
+
+u32 ulpi_read(struct usb_ehci *ehci, u32 reg)
+{
+	if (ulpi_wakeup(ehci)) {
+		printf("ULPI wakeup timed out\n");
+		return 0;
+	}
+
+	if (ulpi_wait(ehci, ULPI_RWRUN | reg << ULPI_ADDR_SHIFT, ULPI_RWRUN)) {
+		printf("ULPI read timed out\n");
+		return 0;
+	}
+
+	return ulpi_read_mask(readl(&ehci->ulpi_viewpoint));
+}
+
+void ulpi_init(struct usb_ehci *ehci, struct mxc_ulpi_regs *ulpi)
+{
+	u32 tmp = 0;
+	int reg, i;
+
+	/* Assemble ID from four ULPI ID registers (8 bits each). */
+	for (reg = ULPI_ID_REGS_COUNT - 1; reg >= 0; reg--)
+		tmp |= ulpi_read(ehci, reg) << (reg * 8);
+
+	/* Split ID into vendor and product ID. */
+	debug("Found ULPI TX, ID %04x:%04x\n", tmp >> 16, tmp & 0xffff);
+
+	/* ULPI integrity check */
+	for (i = 0; i < 2; i++) {
+		ulpi_write(ehci, (u32)&ulpi->scratch_write,
+			ULPI_TEST_VALUE << i);
+		tmp = ulpi_read(ehci, (u32)&ulpi->scratch_write);
+
+		if (tmp != (ULPI_TEST_VALUE << i)) {
+			printf("ULPI integrity check failed\n");
+			return;
+		}
+	}
+
+	/* Set ULPI flags. */
+	ulpi_write(ehci, (u32)&ulpi->otg_ctrl_write,
+		ULPI_OTG_EXT_VBUS_IND |
+		ULPI_OTG_DM_PULLDOWN | ULPI_OTG_DP_PULLDOWN);
+	ulpi_write(ehci, (u32)&ulpi->function_ctrl_write,
+		ULPI_FC_XCVR_SELECT | ULPI_FC_OPMODE_NORMAL |
+		ULPI_FC_SUSPENDM_PWRED);
+	ulpi_write(ehci, (u32)&ulpi->iface_ctrl_write, 0);
+	ulpi_write(ehci, (u32)&ulpi->otg_ctrl_set,
+		ULPI_OTG_DRV_VBUS | ULPI_OTG_DRV_VBUS_EXT);
+
+	/*
+	 * NOTE: This violates USB specification, but otherwise, USB on Efika
+	 * doesn't charge VBUS and as a result, USB doesn't work.
+	 */
+	ulpi_write(ehci, (u32)&ulpi->otg_ctrl_set, ULPI_OTG_CHRG_VBUS);
+}
+
+/*
+ * Solve the VBUS reset problem on Efika
+ * by setting the CHRG_VBUS bit in the reset.
+ */
+void ehci_fixup(uint32_t *status_reg, uint32_t *reg_ref)
+{
+	struct usb_ehci *ehci = (struct usb_ehci *)(OTG_BASE_ADDR +
+		MX51_REGISTER_LAYOUT_LENGTH);
+	struct mxc_ulpi_regs *ulpi = (struct mxc_ulpi_regs *)0;
+
+	u32 tmp = ulpi_read(ehci, (u32)&ulpi->otg_ctrl_write);
+	tmp |= ULPI_OTG_CHRG_VBUS;
+	ulpi_write(ehci, (u32)&ulpi->otg_ctrl_write, tmp);
+
+	/* USB 2.0 specification say 50 ms resets on root. */
+	wait_ms(50);
+
+	/* Now terminate the reset. */
+	*reg_ref = ehci_readl(status_reg);
+	*reg_ref |= EHCI_PS_PE;
+}
+
+void ehci0_init(struct usb_ehci *ehci)
+{
+	writel(MX51_16BIT_UTMI, &ehci->portsc);
+}
+
+void ehci1_init(struct usb_ehci *ehci, struct mxc_ulpi_regs *ulpi)
+{
+	mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT2);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_STP, PAD_CTL_DRV_HIGH |
+				PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST);
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_USBH1_STP), 0);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_USBH1_STP), 1);
+	udelay(1000);
+
+	mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_STP, USB_PAD_CONFIG);
+	udelay(10000);
+
+	clrbits_le32(&ehci->usbcmd, MX51_ITC_IMMEDIATE_MASK);
+	udelay(10000);
+
+	writel(MX51_ULPI_MODE_MASK, &ehci->portsc);
+	udelay(10000);
+
+	ulpi_init(ehci, ulpi);
+}
+
+void ehci2_init(struct usb_ehci *ehci, struct mxc_ulpi_regs *ulpi)
+{
+	mxc_request_iomux(MX51_PIN_EIM_A26, IOMUX_CONFIG_ALT1);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A26, PAD_CTL_DRV_HIGH |
+				PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST);
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A26), 0);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A26), 1);
+	udelay(1000);
+
+	mxc_request_iomux(MX51_PIN_EIM_A26, IOMUX_CONFIG_ALT2);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A26, USB_PAD_CONFIG);
+
+	writel(MX51_ULPI_MODE_MASK, &ehci->portsc);
+	udelay(10000);
+
+	ulpi_init(ehci, ulpi);
+}
+
+int ehci_hcd_init(void)
+{
+	struct usb_ehci *ehci;
+	struct mx5_usb_control_regs *mx5_usb_control_regs;
+	struct mxc_ulpi_regs *ulpi;
+
+	mx5_usb_control_regs = (struct mx5_usb_control_regs *)(OTG_BASE_ADDR +
+		 MX5_CTRL_REGS_OFFSET);
+	control_regs_setup(mx5_usb_control_regs);
+	ulpi = (struct mxc_ulpi_regs *)0;
+
+	/* Init EHCI core */
+	ehci = (struct usb_ehci *)(OTG_BASE_ADDR +
+		(MX51_REGISTER_LAYOUT_LENGTH * CONFIG_MXC_USB_PORT));
+	hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
+	hcor = (struct ehci_hcor *)((uint32_t) hccr +
+			HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
+	setbits_le32(&ehci->usbmode, CM_HOST);
+	setbits_le32(&ehci->control, USB_EN);
+
+	/* Init iMX51 EHCI */
+	efika_usb_phy_reset();
+	efika_usb_hub_reset();
+	efika_usb_enable_devices();
+
+	switch (CONFIG_MXC_USB_PORT) {
+	case 0:
+		ehci0_init(ehci);
+		break;
+	case 1:
+		ehci1_init(ehci, ulpi);
+		break;
+	case 2:
+		if (machine_is_efikasb())
+			ehci2_init(ehci, ulpi);
+		break;
+	};
+
+	/* EfikaMX USB has issues ... */
+	udelay(10000);
+
+	return 0;
+}
+
+int ehci_hcd_stop(void)
+{
+	return 0;
+}
diff --git a/board/efikamx/efikamx.c b/board/efikamx/efikamx.c
index 0c4e24b..8e9b42b 100644
--- a/board/efikamx/efikamx.c
+++ b/board/efikamx/efikamx.c
@@ -37,6 +37,8 @@
 #include <fsl_pmic.h>
 #include <mc13892.h>
 
+#include "efika.h"
+
 DECLARE_GLOBAL_DATA_PTR;
 
 /*
@@ -678,6 +680,7 @@ int board_late_init(void)
 
 	setup_iomux_led();
 	setup_iomux_ata();
+	setup_iomux_usb();
 
 	efikamx_toggle_led(EFIKAMX_LED_BLUE);
 
diff --git a/include/configs/efikamx.h b/include/configs/efikamx.h
index 54f48e4..010a16a 100644
--- a/include/configs/efikamx.h
+++ b/include/configs/efikamx.h
@@ -44,6 +44,10 @@
 
 #define CONFIG_SYS_TEXT_BASE		0x97800000
 
+#define	CONFIG_L2_OFF
+#define	CONFIG_SYS_ICACHE_OFF
+#define	CONFIG_SYS_DCACHE_OFF
+
 /*
  * Bootloader Components Configuration
  */
@@ -172,6 +176,18 @@
 #endif
 
 /*
+ * USB
+ */
+#define CONFIG_CMD_USB
+#ifdef CONFIG_CMD_USB
+#define CONFIG_USB_EHCI			/* Enable EHCI USB support */
+#define CONFIG_MXC_USB_PORT	1
+#define CONFIG_EHCI_IS_TDI
+#define CONFIG_USB_STORAGE
+#define CONFIG_USB_KEYBOARD
+#endif /* CONFIG_CMD_USB */
+
+/*
  * Filesystems
  */
 #ifdef CONFIG_CMD_FAT
-- 
1.7.6.3

[U-Boot] [PATCH v5 4/4] Add USB support for Efika

[Marek Vasut]

On Thursday, September 29, 2011 01:09:57 PM Jana Rapava wrote:
> This commit adds USB support for EfikaMX and EfikaSB.
> 
> Signed-off-by: Jana Rapava <fermata7@gmail.com>
> Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
> Cc: Remy Bohmer <linux@bohmer.net>
> Cc: Stefano Babic <sbabic@denx.de>
> ---
> Changes for v2:
>      - introduce temporary variable in ulpi_write
>      - whitespace changes
> Changes for v3:
>       - add protection against multiple inclusion of efika.h
> Changes for v4:
>        - rename multiple inclusion protection macro in efika.h
> Changes for v5:
> 	- fix unterminated #ifndef in efika.h
> 

Looks ok,

Acked-by: Marek Vasut <marek.vasut@gmail.com>

[U-Boot] [PATCH v6 4/4] usb: add USB support for Efika

[Jana Rapava]

This commit adds USB support for EfikaMX and EfikaSB.

Signed-off-by: Jana Rapava <fermata7@gmail.com>
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Stefano Babic <sbabic@denx.de>

Acked-by: Marek Vasut <marek.vasut@gmail.com>
---
Changes for v2:
    - introduce temporary variable in ulpi_write
    - whitespace changes
Changes for v3:
     - add protection against multiple inclusion of efika.h
Changes for v4:
      - rename multiple inclusion protection macro in efika.h
Changes for v5:
       - fix unterminated #ifndef in efika.h
Changes for v6:
	- add Acked-by
	- no changes

 board/efikamx/Makefile      |    3 +
 board/efikamx/efika.h       |   35 ++++
 board/efikamx/efikamx-usb.c |  423 +++++++++++++++++++++++++++++++++++++++++++
 board/efikamx/efikamx.c     |    3 +
 include/configs/efikamx.h   |   16 ++
 5 files changed, 480 insertions(+), 0 deletions(-)
 create mode 100644 board/efikamx/efika.h
 create mode 100644 board/efikamx/efikamx-usb.c

diff --git a/board/efikamx/Makefile b/board/efikamx/Makefile
index ee4a16e..860e4d2 100644
--- a/board/efikamx/Makefile
+++ b/board/efikamx/Makefile
@@ -28,6 +28,9 @@ include $(TOPDIR)/config.mk
 LIB	= $(obj)lib$(BOARD).o
 
 COBJS	:= efikamx.o
+ifdef	CONFIG_CMD_USB
+COBJS	+= efikamx-usb.o
+endif
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS))
diff --git a/board/efikamx/efika.h b/board/efikamx/efika.h
new file mode 100644
index 0000000..fec9ee0
--- /dev/null
+++ b/board/efikamx/efika.h
@@ -0,0 +1,35 @@
+/*
+ * Copyright (C) 2011 Jana Rapava <fermata7@gmail.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __BOARD_EFIKAMX_EFIKA_H__
+#define __BOARD_EFIKAMX_EFIKA_H__
+
+/*
+ * EHCI USB
+ */
+#ifdef	CONFIG_CMD_USB
+void setup_iomux_usb(void);
+#else
+static inline void setup_iomux_usb(void) { }
+#endif
+
+#endif /* __BOARD_EFIKAMX_EFIKA_H__ */
diff --git a/board/efikamx/efikamx-usb.c b/board/efikamx/efikamx-usb.c
new file mode 100644
index 0000000..b169ea7
--- /dev/null
+++ b/board/efikamx/efikamx-usb.c
@@ -0,0 +1,423 @@
+/*
+ * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
+ * Copyright (C) 2011 Jana Rapava <fermata7@gmail.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <usb.h>
+#include <asm/io.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/mx5x_pins.h>
+#include <asm/arch/iomux.h>
+#include <asm/gpio.h>
+#include <usb/ehci-fsl.h>
+#include <errno.h>
+#include <watchdog.h>
+
+#include <usb/ehci.h>
+#include <usb/ehci-core.h>
+
+/*
+ * Configure the USB H1 and USB H2 IOMUX.
+ */
+#define USB_PAD_CONFIG	(PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST | \
+			PAD_CTL_DRV_HIGH | PAD_CTL_100K_PU | \
+			PAD_CTL_HYS_ENABLE | PAD_CTL_PUE_PULL)
+void setup_iomux_usb(void)
+{
+	/*
+	 * Configure USBH1 pads
+	 */
+	mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_STP, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_CLK, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_CLK, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DIR, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DIR, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_NXT, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_NXT, USB_PAD_CONFIG);
+
+	mxc_request_iomux(MX51_PIN_USBH1_DATA0, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA0, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA1, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA1, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA2, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA2, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA3, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA3, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA4, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA4, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA5, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA5, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA6, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA6, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA7, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA7, USB_PAD_CONFIG);
+
+	/*
+	 * Configure USBH1 control pads
+	 */
+
+	/* USB PHY reset */
+	mxc_request_iomux(MX51_PIN_EIM_D27, IOMUX_CONFIG_ALT1);
+	mxc_iomux_set_pad(MX51_PIN_EIM_D27, PAD_CTL_PKE_ENABLE |
+			PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH);
+
+	/* USB HUB reset */
+	mxc_request_iomux(MX51_PIN_GPIO1_5, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_GPIO1_5, PAD_CTL_PKE_ENABLE |
+			PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH);
+
+
+	if (machine_is_efikasb()) {
+		/*
+		 * Configure USBH2 pads (used on EfikaSB)
+		 */
+		/* USBH2_DATA */
+		mxc_request_iomux(MX51_PIN_EIM_D16, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D16, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D17, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D17, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D18, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D18, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D19, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D19, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D20, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D20, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D21, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D21, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D22, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D22, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D23, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D23, USB_PAD_CONFIG);
+
+		/* USBH2_CLK */
+		mxc_request_iomux(MX51_PIN_EIM_A24, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_A24, USB_PAD_CONFIG);
+		/* USBH2_DIR */
+		mxc_request_iomux(MX51_PIN_EIM_A25, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_A25, USB_PAD_CONFIG);
+		/* USBH2_STP */
+		mxc_request_iomux(MX51_PIN_EIM_A26, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_A26, USB_PAD_CONFIG);
+		/* USBH2_NXT */
+		mxc_request_iomux(MX51_PIN_EIM_A27, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_A27, USB_PAD_CONFIG);
+	}
+
+	/* WIFI EN (act low) */
+	mxc_request_iomux(MX51_PIN_EIM_A22, IOMUX_CONFIG_GPIO);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A22, 0);
+	/* WIFI RESET */
+	mxc_request_iomux(MX51_PIN_EIM_A16, IOMUX_CONFIG_GPIO);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A16, 0);
+	/* BT EN (act low) */
+	mxc_request_iomux(MX51_PIN_EIM_A17, IOMUX_CONFIG_GPIO);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A17, 0);
+}
+
+/*
+ * Enable devices connected to USB buses.
+ */
+void efika_usb_enable_devices(void)
+{
+	/* Enable Bluetooth */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A17), 0);
+	udelay(10000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A17), 1);
+
+	/* Enable WiFi */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A22), 1);
+	udelay(10000);
+
+	/* Reset the WiFi chip */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A16), 0);
+	udelay(10000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A16), 1);
+}
+
+/*
+ * Reset USB HUB (or HUBs on EfikaSB).
+ */
+void efika_usb_hub_reset(void)
+{
+	/* HUB reset */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 1);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 0);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 1);
+}
+
+/*
+ * Reset USB PHY (or PHYs on EfikaSB).
+ */
+void efika_usb_phy_reset(void)
+{
+	/* SMSC 3317 PHY reset */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_D27), 0);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_D27), 1);
+}
+
+/*
+ * Configure control registers of the USB controller.
+ */
+void control_regs_setup(struct mx5_usb_control_regs *control)
+{
+	clrsetbits_le32(&control->usbctrl,
+		(MXC_OTG_WUE | MXC_OTG_PM | MX51_H1_ULPI_IE | MX51_H1_WUE),
+		MX51_H1_PM);
+
+	clrsetbits_le32(&control->phyctrl0,
+			MX51_OTG_OVERCURD,
+			MX51_EHCI_POWERPINSE);
+
+	clrsetbits_le32(&control->phyctrl1,
+			MX51_SYSCLOCK_MASK,
+			MX51_SYSCLOCK_24_MHZ);
+
+	setbits_le32(&control->usbctrl1, MX51_H1_EXTCLKE);
+
+	clrsetbits_le32(&control->uh2ctrl,
+			(MX51_H2_ULPI_IE | MX51_H2_WUE),
+			MX51_H2_PM);
+
+	udelay(10000);
+}
+
+#define ULPI_ADDR_SHIFT		16
+#define ulpi_write_mask(value)	((value) & 0xff)
+#define ulpi_read_mask(value)	(((value) >> 8) & 0xff)
+
+int ulpi_wait(struct usb_ehci *ehci, u32 ulpi_value, u32 ulpi_mask)
+{
+	int timeout = ULPI_TIMEOUT;
+	u32 tmp;
+
+	writel(ulpi_value, &ehci->ulpi_viewpoint);
+
+	/* Wait for the bits in ulpi_mask to become zero. */
+	while (--timeout) {
+		tmp = readl(&ehci->ulpi_viewpoint);
+		if (!(tmp & ulpi_mask))
+			break;
+		WATCHDOG_RESET();
+	}
+
+	return !timeout;
+}
+
+int ulpi_wakeup(struct usb_ehci *ehci)
+{
+	if (readl(&ehci->ulpi_viewpoint) & ULPI_SS)
+		return 0; /* already awake */
+	return ulpi_wait(ehci, ULPI_WU, ULPI_WU);
+}
+
+void ulpi_write(struct usb_ehci *ehci, u32 reg, u32 value)
+{
+	u32 tmp;
+	if (ulpi_wakeup(ehci)) {
+		printf("ULPI wakeup timed out\n");
+		return;
+	}
+
+	tmp = ulpi_wait(ehci, ULPI_RWRUN | ULPI_RWCTRL |
+		reg << ULPI_ADDR_SHIFT | ulpi_write_mask(value), ULPI_RWRUN);
+	if (tmp)
+		printf("ULPI write timed out\n");
+}
+
+u32 ulpi_read(struct usb_ehci *ehci, u32 reg)
+{
+	if (ulpi_wakeup(ehci)) {
+		printf("ULPI wakeup timed out\n");
+		return 0;
+	}
+
+	if (ulpi_wait(ehci, ULPI_RWRUN | reg << ULPI_ADDR_SHIFT, ULPI_RWRUN)) {
+		printf("ULPI read timed out\n");
+		return 0;
+	}
+
+	return ulpi_read_mask(readl(&ehci->ulpi_viewpoint));
+}
+
+void ulpi_init(struct usb_ehci *ehci, struct mxc_ulpi_regs *ulpi)
+{
+	u32 tmp = 0;
+	int reg, i;
+
+	/* Assemble ID from four ULPI ID registers (8 bits each). */
+	for (reg = ULPI_ID_REGS_COUNT - 1; reg >= 0; reg--)
+		tmp |= ulpi_read(ehci, reg) << (reg * 8);
+
+	/* Split ID into vendor and product ID. */
+	debug("Found ULPI TX, ID %04x:%04x\n", tmp >> 16, tmp & 0xffff);
+
+	/* ULPI integrity check */
+	for (i = 0; i < 2; i++) {
+		ulpi_write(ehci, (u32)&ulpi->scratch_write,
+			ULPI_TEST_VALUE << i);
+		tmp = ulpi_read(ehci, (u32)&ulpi->scratch_write);
+
+		if (tmp != (ULPI_TEST_VALUE << i)) {
+			printf("ULPI integrity check failed\n");
+			return;
+		}
+	}
+
+	/* Set ULPI flags. */
+	ulpi_write(ehci, (u32)&ulpi->otg_ctrl_write,
+		ULPI_OTG_EXT_VBUS_IND |
+		ULPI_OTG_DM_PULLDOWN | ULPI_OTG_DP_PULLDOWN);
+	ulpi_write(ehci, (u32)&ulpi->function_ctrl_write,
+		ULPI_FC_XCVR_SELECT | ULPI_FC_OPMODE_NORMAL |
+		ULPI_FC_SUSPENDM_PWRED);
+	ulpi_write(ehci, (u32)&ulpi->iface_ctrl_write, 0);
+	ulpi_write(ehci, (u32)&ulpi->otg_ctrl_set,
+		ULPI_OTG_DRV_VBUS | ULPI_OTG_DRV_VBUS_EXT);
+
+	/*
+	 * NOTE: This violates USB specification, but otherwise, USB on Efika
+	 * doesn't charge VBUS and as a result, USB doesn't work.
+	 */
+	ulpi_write(ehci, (u32)&ulpi->otg_ctrl_set, ULPI_OTG_CHRG_VBUS);
+}
+
+/*
+ * Solve the VBUS reset problem on Efika
+ * by setting the CHRG_VBUS bit in the reset.
+ */
+void ehci_fixup(uint32_t *status_reg, uint32_t *reg_ref)
+{
+	struct usb_ehci *ehci = (struct usb_ehci *)(OTG_BASE_ADDR +
+		MX51_REGISTER_LAYOUT_LENGTH);
+	struct mxc_ulpi_regs *ulpi = (struct mxc_ulpi_regs *)0;
+
+	u32 tmp = ulpi_read(ehci, (u32)&ulpi->otg_ctrl_write);
+	tmp |= ULPI_OTG_CHRG_VBUS;
+	ulpi_write(ehci, (u32)&ulpi->otg_ctrl_write, tmp);
+
+	/* USB 2.0 specification say 50 ms resets on root. */
+	wait_ms(50);
+
+	/* Now terminate the reset. */
+	*reg_ref = ehci_readl(status_reg);
+	*reg_ref |= EHCI_PS_PE;
+}
+
+void ehci0_init(struct usb_ehci *ehci)
+{
+	writel(MX51_16BIT_UTMI, &ehci->portsc);
+}
+
+void ehci1_init(struct usb_ehci *ehci, struct mxc_ulpi_regs *ulpi)
+{
+	mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT2);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_STP, PAD_CTL_DRV_HIGH |
+				PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST);
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_USBH1_STP), 0);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_USBH1_STP), 1);
+	udelay(1000);
+
+	mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_STP, USB_PAD_CONFIG);
+	udelay(10000);
+
+	clrbits_le32(&ehci->usbcmd, MX51_ITC_IMMEDIATE_MASK);
+	udelay(10000);
+
+	writel(MX51_ULPI_MODE_MASK, &ehci->portsc);
+	udelay(10000);
+
+	ulpi_init(ehci, ulpi);
+}
+
+void ehci2_init(struct usb_ehci *ehci, struct mxc_ulpi_regs *ulpi)
+{
+	mxc_request_iomux(MX51_PIN_EIM_A26, IOMUX_CONFIG_ALT1);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A26, PAD_CTL_DRV_HIGH |
+				PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST);
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A26), 0);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A26), 1);
+	udelay(1000);
+
+	mxc_request_iomux(MX51_PIN_EIM_A26, IOMUX_CONFIG_ALT2);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A26, USB_PAD_CONFIG);
+
+	writel(MX51_ULPI_MODE_MASK, &ehci->portsc);
+	udelay(10000);
+
+	ulpi_init(ehci, ulpi);
+}
+
+int ehci_hcd_init(void)
+{
+	struct usb_ehci *ehci;
+	struct mx5_usb_control_regs *mx5_usb_control_regs;
+	struct mxc_ulpi_regs *ulpi;
+
+	mx5_usb_control_regs = (struct mx5_usb_control_regs *)(OTG_BASE_ADDR +
+		 MX5_CTRL_REGS_OFFSET);
+	control_regs_setup(mx5_usb_control_regs);
+	ulpi = (struct mxc_ulpi_regs *)0;
+
+	/* Init EHCI core */
+	ehci = (struct usb_ehci *)(OTG_BASE_ADDR +
+		(MX51_REGISTER_LAYOUT_LENGTH * CONFIG_MXC_USB_PORT));
+	hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
+	hcor = (struct ehci_hcor *)((uint32_t) hccr +
+			HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
+	setbits_le32(&ehci->usbmode, CM_HOST);
+	setbits_le32(&ehci->control, USB_EN);
+
+	/* Init iMX51 EHCI */
+	efika_usb_phy_reset();
+	efika_usb_hub_reset();
+	efika_usb_enable_devices();
+
+	switch (CONFIG_MXC_USB_PORT) {
+	case 0:
+		ehci0_init(ehci);
+		break;
+	case 1:
+		ehci1_init(ehci, ulpi);
+		break;
+	case 2:
+		if (machine_is_efikasb())
+			ehci2_init(ehci, ulpi);
+		break;
+	};
+
+	/* EfikaMX USB has issues ... */
+	udelay(10000);
+
+	return 0;
+}
+
+int ehci_hcd_stop(void)
+{
+	return 0;
+}
diff --git a/board/efikamx/efikamx.c b/board/efikamx/efikamx.c
index 0c4e24b..8e9b42b 100644
--- a/board/efikamx/efikamx.c
+++ b/board/efikamx/efikamx.c
@@ -37,6 +37,8 @@
 #include <fsl_pmic.h>
 #include <mc13892.h>
 
+#include "efika.h"
+
 DECLARE_GLOBAL_DATA_PTR;
 
 /*
@@ -678,6 +680,7 @@ int board_late_init(void)
 
 	setup_iomux_led();
 	setup_iomux_ata();
+	setup_iomux_usb();
 
 	efikamx_toggle_led(EFIKAMX_LED_BLUE);
 
diff --git a/include/configs/efikamx.h b/include/configs/efikamx.h
index 54f48e4..010a16a 100644
--- a/include/configs/efikamx.h
+++ b/include/configs/efikamx.h
@@ -44,6 +44,10 @@
 
 #define CONFIG_SYS_TEXT_BASE		0x97800000
 
+#define	CONFIG_L2_OFF
+#define	CONFIG_SYS_ICACHE_OFF
+#define	CONFIG_SYS_DCACHE_OFF
+
 /*
  * Bootloader Components Configuration
  */
@@ -172,6 +176,18 @@
 #endif
 
 /*
+ * USB
+ */
+#define CONFIG_CMD_USB
+#ifdef CONFIG_CMD_USB
+#define CONFIG_USB_EHCI			/* Enable EHCI USB support */
+#define CONFIG_MXC_USB_PORT	1
+#define CONFIG_EHCI_IS_TDI
+#define CONFIG_USB_STORAGE
+#define CONFIG_USB_KEYBOARD
+#endif /* CONFIG_CMD_USB */
+
+/*
  * Filesystems
  */
 #ifdef CONFIG_CMD_FAT
-- 
1.7.6.3

[U-Boot] [PATCH v6 4/4] usb: add USB support for Efika

[Marek Vasut]

On Thursday, September 29, 2011 06:44:25 PM Jana Rapava wrote:
> This commit adds USB support for EfikaMX and EfikaSB.
> 
> Signed-off-by: Jana Rapava <fermata7@gmail.com>
> Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
> Cc: Remy Bohmer <linux@bohmer.net>
> Cc: Stefano Babic <sbabic@denx.de>
> 
> Acked-by: Marek Vasut <marek.vasut@gmail.com>


You're not supposed to resend with only ackedby added

[U-Boot] [PATCH v6 4/4] usb: add USB support for Efika

[Marek Vasut]

> This commit adds USB support for EfikaMX and EfikaSB.
> 
> Signed-off-by: Jana Rapava <fermata7@gmail.com>
> Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
> Cc: Remy Bohmer <linux@bohmer.net>
> Cc: Stefano Babic <sbabic@denx.de>
> 
> Acked-by: Marek Vasut <marek.vasut@gmail.com>
> ---
> Changes for v2:
>     - introduce temporary variable in ulpi_write
>     - whitespace changes
> Changes for v3:
>      - add protection against multiple inclusion of efika.h
> Changes for v4:
>       - rename multiple inclusion protection macro in efika.h
> Changes for v5:
>        - fix unterminated #ifndef in efika.h
> Changes for v6:
> 	- add Acked-by
> 	- no changes
> 

Guys, there's been no update on this for a month.

Stefano, can you apply please? I see no negative comments.

[U-Boot] [PATCH v6 4/4] usb: add USB support for Efika

[Stefano Babic]

On 10/30/2011 09:18 PM, Marek Vasut wrote:
>> This commit adds USB support for EfikaMX and EfikaSB.
>>
>> Signed-off-by: Jana Rapava <fermata7@gmail.com>
>> Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
>> Cc: Remy Bohmer <linux@bohmer.net>
>> Cc: Stefano Babic <sbabic@denx.de>
>>
>> Acked-by: Marek Vasut <marek.vasut@gmail.com>
>> ---
>> Changes for v2:
>>     - introduce temporary variable in ulpi_write
>>     - whitespace changes
>> Changes for v3:
>>      - add protection against multiple inclusion of efika.h
>> Changes for v4:
>>       - rename multiple inclusion protection macro in efika.h
>> Changes for v5:
>>        - fix unterminated #ifndef in efika.h
>> Changes for v6:
>> 	- add Acked-by
>> 	- no changes
>>
> 
> Guys, there's been no update on this for a month.
> 
> Stefano, can you apply please? I see no negative comments.

I do not have seen any open issues, too. If nobody argues and because
they are related to USB for i.MX boards, I will apply them to u-boot-imx.

Best regards,
Stefano Babic


-- 
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: office at denx.de
=====================================================================

[U-Boot] [PATCH v6 4/4] usb: add USB support for Efika

[Igor Grinberg]

Hi Stefano,

On 10/30/11 22:22, Stefano Babic wrote:
> On 10/30/2011 09:18 PM, Marek Vasut wrote:
>>> This commit adds USB support for EfikaMX and EfikaSB.
>>>
>>> Signed-off-by: Jana Rapava <fermata7@gmail.com>
>>> Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
>>> Cc: Remy Bohmer <linux@bohmer.net>
>>> Cc: Stefano Babic <sbabic@denx.de>
>>>
>>> Acked-by: Marek Vasut <marek.vasut@gmail.com>
>>> ---
>>> Changes for v2:
>>>     - introduce temporary variable in ulpi_write
>>>     - whitespace changes
>>> Changes for v3:
>>>      - add protection against multiple inclusion of efika.h
>>> Changes for v4:
>>>       - rename multiple inclusion protection macro in efika.h
>>> Changes for v5:
>>>        - fix unterminated #ifndef in efika.h
>>> Changes for v6:
>>> 	- add Acked-by
>>> 	- no changes
>>>
>>
>> Guys, there's been no update on this for a month.
>>
>> Stefano, can you apply please? I see no negative comments.
> 
> I do not have seen any open issues, too. If nobody argues and because
> they are related to USB for i.MX boards, I will apply them to u-boot-imx.

Sorry for jumping in that late.
I've just got back from my trip.
There are some issues with: [PATCH 3/4] EHCI: adjust for mx5
If you have already applied it and also because I don't want
to block this patch set, the issues I've pointed can be fixed
in a follow up patch.

> 
> Best regards,
> Stefano Babic
> 
> 

-- 
Regards,
Igor.

[U-Boot] [PATCH v6 4/4] usb: add USB support for Efika

[Stefano Babic]

On 10/31/2011 09:17 AM, Igor Grinberg wrote:
> Hi Stefano,
> 

Hi Igor,

>> I do not have seen any open issues, too. If nobody argues and because
>> they are related to USB for i.MX boards, I will apply them to u-boot-imx.
> 
> Sorry for jumping in that late.
> I've just got back from my trip.
> There are some issues with: [PATCH 3/4] EHCI: adjust for mx5
> If you have already applied it 

Not yet !

>and also because I don't want
> to block this patch set, the issues I've pointed can be fixed
> in a follow up patch.

Jana, can you answer / fix this point ?

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: office at denx.de
=====================================================================

[U-Boot] [PATCH v6 4/4] usb: add USB support for Efika

[Jana Rapava]

2011/10/31 Stefano Babic <sbabic@denx.de>

> > There are some issues with: [PATCH 3/4] EHCI: adjust for mx5
> > If you have already applied it
>
> Jana, can you answer / fix this point ?
>
>
I really don't know what happens there. Code file looks aligned, but when I
generate a patch with git-format-patch, aligning is messed up. So I fix it
in git-send-email, but after sending  whitespace characters are messed up
again.
I wasn't able to find a way to fix it yet.
Regards,
Jana Rapava

[U-Boot] [PATCH v6 4/4] usb: add USB support for Efika

[Stefano Babic]

On 10/31/2011 03:58 PM, Jana Rapava wrote:
> 
> 
> 2011/10/31 Stefano Babic <sbabic at denx.de <mailto:sbabic@denx.de>>
> 
>     > There are some issues with: [PATCH 3/4] EHCI: adjust for mx5
>     > If you have already applied it
> 
>     Jana, can you answer / fix this point ?
> 
> 
> I really don't know what happens there. Code file looks aligned, but
> when I generate a patch with git-format-patch, aligning is messed up.

Wait: this can be due to the different positions of the TAB characters,
and to the leading + to mark an added line. It is not a problem.

> So
> I fix it in git-send-email,

Do you mean you change the patch generated by git format-patch ? You
should not do it.

Take a look at your patch. Some defines are removed, and in the patch
you see them as:

-#ifdef CONFIG_MX25
-#define MX25_USB_CTRL_IP_PUE_DOWN_BIT  (1<<6)
-#define MX25_USB_CTRL_HSTD_BIT         (1<<5)
-#define MX25_USB_CTRL_USBTE_BIT                (1<<4)
-#define MX25_USB_CTRL_OCPOL_OTG_BIT    (1<<3)
-#endif

It seems that even in the original file the defines were not aligned.
But this is not true, the disalignment is introduced by the leading "-".

However, when we see some lines later, the defines are added again and
they seem aligned.

+#ifdef CONFIG_MX25
+#define MX25_USB_CTRL_IP_PUE_DOWN_BIT  (1<<6)
+#define MX25_USB_CTRL_HSTD_BIT         (1<<5)
+#define MX25_USB_CTRL_USBTE_BIT        (1<<4)
+#define MX25_USB_CTRL_OCPOL_OTG_BIT    (1<<3)
+#endif

But when we apply the patch, they defines are disaligned again. maybe
you are worrying too much: let the tools doing their work. You have to
check that your changed file is correct (without whitespace instead of
tab), and then call git-format-patch. And do not care if the result
seems producing disaligned entries, this is not true.

There are also other comments by Igor that should be fixed,
independently from this alignment problem. Please fix them and resubmit.

> but after sending  whitespace characters are
> messed up again.
> I wasn't able to find a way to fix it yet.

As I said, you want to fix the result of git-format-patch, but it is
correct. Simply do not do it.

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: office at denx.de
=====================================================================

[U-Boot] [PATCH v7 4/4] usb: add USB support for Efika

[Jana Rapava]

This commit adds USB support for EfikaMX and EfikaSB.

Signed-off-by: Jana Rapava <fermata7@gmail.com>
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Stefano Babic <sbabic@denx.de>

Acked-by: Marek Vasut <marek.vasut@gmail.com>
---
Changes for v2:
    - introduce temporary variable in ulpi_write
    - whitespace changes
Changes for v3:
     - add protection against multiple inclusion of efika.h
Changes for v4:
      - rename multiple inclusion protection macro in efika.h
Changes for v5:
       - fix unterminated #ifndef in efika.h
Changes for v6:
	- add Acked-by
	- no changes
Changes for v7:
	- use ULPI-related definitions from ./include/usb/ulpi.h

 board/efikamx/Makefile      |    3 +
 board/efikamx/efika.h       |   35 ++++
 board/efikamx/efikamx-usb.c |  424 +++++++++++++++++++++++++++++++++++++++++++
 board/efikamx/efikamx.c     |    3 +
 include/configs/efikamx.h   |   16 ++
 5 files changed, 481 insertions(+), 0 deletions(-)
 create mode 100644 board/efikamx/efika.h
 create mode 100644 board/efikamx/efikamx-usb.c

diff --git a/board/efikamx/Makefile b/board/efikamx/Makefile
index ee4a16e..860e4d2 100644
--- a/board/efikamx/Makefile
+++ b/board/efikamx/Makefile
@@ -28,6 +28,9 @@ include $(TOPDIR)/config.mk
 LIB	= $(obj)lib$(BOARD).o
 
 COBJS	:= efikamx.o
+ifdef	CONFIG_CMD_USB
+COBJS	+= efikamx-usb.o
+endif
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS))
diff --git a/board/efikamx/efika.h b/board/efikamx/efika.h
new file mode 100644
index 0000000..fec9ee0
--- /dev/null
+++ b/board/efikamx/efika.h
@@ -0,0 +1,35 @@
+/*
+ * Copyright (C) 2011 Jana Rapava <fermata7@gmail.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __BOARD_EFIKAMX_EFIKA_H__
+#define __BOARD_EFIKAMX_EFIKA_H__
+
+/*
+ * EHCI USB
+ */
+#ifdef	CONFIG_CMD_USB
+void setup_iomux_usb(void);
+#else
+static inline void setup_iomux_usb(void) { }
+#endif
+
+#endif /* __BOARD_EFIKAMX_EFIKA_H__ */
diff --git a/board/efikamx/efikamx-usb.c b/board/efikamx/efikamx-usb.c
new file mode 100644
index 0000000..3b42256
--- /dev/null
+++ b/board/efikamx/efikamx-usb.c
@@ -0,0 +1,424 @@
+/*
+ * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
+ * Copyright (C) 2011 Jana Rapava <fermata7@gmail.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <usb.h>
+#include <asm/io.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/mx5x_pins.h>
+#include <asm/arch/iomux.h>
+#include <asm/gpio.h>
+#include <usb/ehci-fsl.h>
+#include <errno.h>
+#include <watchdog.h>
+
+#include <usb/ehci.h>
+#include <usb/ehci-core.h>
+#include <usb/ulpi.h>
+
+/*
+ * Configure the USB H1 and USB H2 IOMUX.
+ */
+#define USB_PAD_CONFIG	(PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST | \
+			PAD_CTL_DRV_HIGH | PAD_CTL_100K_PU | \
+			PAD_CTL_HYS_ENABLE | PAD_CTL_PUE_PULL)
+void setup_iomux_usb(void)
+{
+	/*
+	 * Configure USBH1 pads
+	 */
+	mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_STP, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_CLK, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_CLK, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DIR, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DIR, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_NXT, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_NXT, USB_PAD_CONFIG);
+
+	mxc_request_iomux(MX51_PIN_USBH1_DATA0, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA0, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA1, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA1, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA2, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA2, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA3, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA3, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA4, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA4, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA5, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA5, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA6, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA6, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA7, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA7, USB_PAD_CONFIG);
+
+	/*
+	 * Configure USBH1 control pads
+	 */
+
+	/* USB PHY reset */
+	mxc_request_iomux(MX51_PIN_EIM_D27, IOMUX_CONFIG_ALT1);
+	mxc_iomux_set_pad(MX51_PIN_EIM_D27, PAD_CTL_PKE_ENABLE |
+			PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH);
+
+	/* USB HUB reset */
+	mxc_request_iomux(MX51_PIN_GPIO1_5, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_GPIO1_5, PAD_CTL_PKE_ENABLE |
+			PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH);
+
+
+	if (machine_is_efikasb()) {
+		/*
+		 * Configure USBH2 pads (used on EfikaSB)
+		 */
+		/* USBH2_DATA */
+		mxc_request_iomux(MX51_PIN_EIM_D16, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D16, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D17, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D17, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D18, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D18, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D19, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D19, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D20, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D20, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D21, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D21, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D22, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D22, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D23, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D23, USB_PAD_CONFIG);
+
+		/* USBH2_CLK */
+		mxc_request_iomux(MX51_PIN_EIM_A24, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_A24, USB_PAD_CONFIG);
+		/* USBH2_DIR */
+		mxc_request_iomux(MX51_PIN_EIM_A25, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_A25, USB_PAD_CONFIG);
+		/* USBH2_STP */
+		mxc_request_iomux(MX51_PIN_EIM_A26, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_A26, USB_PAD_CONFIG);
+		/* USBH2_NXT */
+		mxc_request_iomux(MX51_PIN_EIM_A27, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_A27, USB_PAD_CONFIG);
+	}
+
+	/* WIFI EN (act low) */
+	mxc_request_iomux(MX51_PIN_EIM_A22, IOMUX_CONFIG_GPIO);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A22, 0);
+	/* WIFI RESET */
+	mxc_request_iomux(MX51_PIN_EIM_A16, IOMUX_CONFIG_GPIO);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A16, 0);
+	/* BT EN (act low) */
+	mxc_request_iomux(MX51_PIN_EIM_A17, IOMUX_CONFIG_GPIO);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A17, 0);
+}
+
+/*
+ * Enable devices connected to USB buses.
+ */
+void efika_usb_enable_devices(void)
+{
+	/* Enable Bluetooth */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A17), 0);
+	udelay(10000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A17), 1);
+
+	/* Enable WiFi */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A22), 1);
+	udelay(10000);
+
+	/* Reset the WiFi chip */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A16), 0);
+	udelay(10000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A16), 1);
+}
+
+/*
+ * Reset USB HUB (or HUBs on EfikaSB).
+ */
+void efika_usb_hub_reset(void)
+{
+	/* HUB reset */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 1);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 0);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 1);
+}
+
+/*
+ * Reset USB PHY (or PHYs on EfikaSB).
+ */
+void efika_usb_phy_reset(void)
+{
+	/* SMSC 3317 PHY reset */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_D27), 0);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_D27), 1);
+}
+
+/*
+ * Configure control registers of the USB controller.
+ */
+void control_regs_setup(struct mx5_usb_control_regs *control)
+{
+	clrsetbits_le32(&control->usbctrl,
+		(MXC_OTG_WUE | MXC_OTG_PM | MX51_H1_ULPI_IE | MX51_H1_WUE),
+		MX51_H1_PM);
+
+	clrsetbits_le32(&control->phyctrl0,
+			MX51_OTG_OVERCURD,
+			MX51_EHCI_POWERPINSE);
+
+	clrsetbits_le32(&control->phyctrl1,
+			MX51_SYSCLOCK_MASK,
+			MX51_SYSCLOCK_24_MHZ);
+
+	setbits_le32(&control->usbctrl1, MX51_H1_EXTCLKE);
+
+	clrsetbits_le32(&control->uh2ctrl,
+			(MX51_H2_ULPI_IE | MX51_H2_WUE),
+			MX51_H2_PM);
+
+	udelay(10000);
+}
+
+#define ULPI_ADDR_SHIFT		16
+#define ulpi_write_mask(value)	((value) & 0xff)
+#define ulpi_read_mask(value)	(((value) >> 8) & 0xff)
+
+int ulpi_wait(struct usb_ehci *ehci, u32 ulpi_value, u32 ulpi_mask)
+{
+	int timeout = ULPI_TIMEOUT;
+	u32 tmp;
+
+	writel(ulpi_value, &ehci->ulpi_viewpoint);
+
+	/* Wait for the bits in ulpi_mask to become zero. */
+	while (--timeout) {
+		tmp = readl(&ehci->ulpi_viewpoint);
+		if (!(tmp & ulpi_mask))
+			break;
+		WATCHDOG_RESET();
+	}
+
+	return !timeout;
+}
+
+int ulpi_wakeup(struct usb_ehci *ehci)
+{
+	if (readl(&ehci->ulpi_viewpoint) & ULPI_SS)
+		return 0; /* already awake */
+	return ulpi_wait(ehci, ULPI_WU, ULPI_WU);
+}
+
+void ulpi_write(struct usb_ehci *ehci, u32 reg, u32 value)
+{
+	u32 tmp;
+	if (ulpi_wakeup(ehci)) {
+		printf("ULPI wakeup timed out\n");
+		return;
+	}
+
+	tmp = ulpi_wait(ehci, ULPI_RWRUN | ULPI_RWCTRL |
+		reg << ULPI_ADDR_SHIFT | ulpi_write_mask(value), ULPI_RWRUN);
+	if (tmp)
+		printf("ULPI write timed out\n");
+}
+
+u32 ulpi_read(struct usb_ehci *ehci, u32 reg)
+{
+	if (ulpi_wakeup(ehci)) {
+		printf("ULPI wakeup timed out\n");
+		return 0;
+	}
+
+	if (ulpi_wait(ehci, ULPI_RWRUN | reg << ULPI_ADDR_SHIFT, ULPI_RWRUN)) {
+		printf("ULPI read timed out\n");
+		return 0;
+	}
+
+	return ulpi_read_mask(readl(&ehci->ulpi_viewpoint));
+}
+
+void ulpi_init(struct usb_ehci *ehci, struct ulpi_regs *ulpi)
+{
+	u32 tmp = 0;
+	int reg, i;
+
+	/* Assemble ID from four ULPI ID registers (8 bits each). */
+	for (reg = ULPI_ID_REGS_COUNT - 1; reg >= 0; reg--)
+		tmp |= ulpi_read(ehci, reg) << (reg * 8);
+
+	/* Split ID into vendor and product ID. */
+	debug("Found ULPI TX, ID %04x:%04x\n", tmp >> 16, tmp & 0xffff);
+
+	/* ULPI integrity check */
+	for (i = 0; i < 2; i++) {
+		ulpi_write(ehci, (u32)&ulpi->scratch_write,
+			ULPI_TEST_VALUE << i);
+		tmp = ulpi_read(ehci, (u32)&ulpi->scratch_write);
+
+		if (tmp != (ULPI_TEST_VALUE << i)) {
+			printf("ULPI integrity check failed\n");
+			return;
+		}
+	}
+
+	/* Set ULPI flags. */
+	ulpi_write(ehci, (u32)&ulpi->otg_ctrl_write,
+		ULPI_OTG_EXTVBUSIND |
+		ULPI_OTG_DM_PULLDOWN | ULPI_OTG_DP_PULLDOWN);
+	ulpi_write(ehci, (u32)&ulpi->function_ctrl_write,
+		ULPI_FC_XCVRSEL | ULPI_FC_OPMODE_NORMAL |
+		ULPI_FC_SUSPENDM);
+	ulpi_write(ehci, (u32)&ulpi->iface_ctrl_write, 0);
+	ulpi_write(ehci, (u32)&ulpi->otg_ctrl_set,
+		ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
+
+	/*
+	 * NOTE: This violates USB specification, but otherwise, USB on Efika
+	 * doesn't charge VBUS and as a result, USB doesn't work.
+	 */
+	ulpi_write(ehci, (u32)&ulpi->otg_ctrl_set, ULPI_OTG_CHRGVBUS);
+}
+
+/*
+ * Solve the VBUS reset problem on Efika
+ * by setting the CHRG_VBUS bit in the reset.
+ */
+void ehci_fixup(uint32_t *status_reg, uint32_t *reg_ref)
+{
+	struct usb_ehci *ehci = (struct usb_ehci *)(OTG_BASE_ADDR +
+		MX51_REGISTER_LAYOUT_LENGTH);
+	struct ulpi_regs *ulpi = (struct ulpi_regs *)0;
+
+	u32 tmp = ulpi_read(ehci, (u32)&ulpi->otg_ctrl_write);
+	tmp |= ULPI_OTG_CHRGVBUS;
+	ulpi_write(ehci, (u32)&ulpi->otg_ctrl_write, tmp);
+
+	/* USB 2.0 specification say 50 ms resets on root. */
+	wait_ms(50);
+
+	/* Now terminate the reset. */
+	*reg_ref = ehci_readl(status_reg);
+	*reg_ref |= EHCI_PS_PE;
+}
+
+void ehci0_init(struct usb_ehci *ehci)
+{
+	writel(MX51_16BIT_UTMI, &ehci->portsc);
+}
+
+void ehci1_init(struct usb_ehci *ehci, struct ulpi_regs *ulpi)
+{
+	mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT2);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_STP, PAD_CTL_DRV_HIGH |
+				PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST);
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_USBH1_STP), 0);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_USBH1_STP), 1);
+	udelay(1000);
+
+	mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_STP, USB_PAD_CONFIG);
+	udelay(10000);
+
+	clrbits_le32(&ehci->usbcmd, MX51_ITC_IMMEDIATE_MASK);
+	udelay(10000);
+
+	writel(MX51_ULPI_MODE_MASK, &ehci->portsc);
+	udelay(10000);
+
+	ulpi_init(ehci, ulpi);
+}
+
+void ehci2_init(struct usb_ehci *ehci, struct ulpi_regs *ulpi)
+{
+	mxc_request_iomux(MX51_PIN_EIM_A26, IOMUX_CONFIG_ALT1);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A26, PAD_CTL_DRV_HIGH |
+				PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST);
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A26), 0);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A26), 1);
+	udelay(1000);
+
+	mxc_request_iomux(MX51_PIN_EIM_A26, IOMUX_CONFIG_ALT2);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A26, USB_PAD_CONFIG);
+
+	writel(MX51_ULPI_MODE_MASK, &ehci->portsc);
+	udelay(10000);
+
+	ulpi_init(ehci, ulpi);
+}
+
+int ehci_hcd_init(void)
+{
+	struct usb_ehci *ehci;
+	struct mx5_usb_control_regs *mx5_usb_control_regs;
+	struct ulpi_regs *ulpi;
+
+	mx5_usb_control_regs = (struct mx5_usb_control_regs *)(OTG_BASE_ADDR +
+		 MX5_CTRL_REGS_OFFSET);
+	control_regs_setup(mx5_usb_control_regs);
+	ulpi = (struct ulpi_regs *)0;
+
+	/* Init EHCI core */
+	ehci = (struct usb_ehci *)(OTG_BASE_ADDR +
+		(MX51_REGISTER_LAYOUT_LENGTH * CONFIG_MXC_USB_PORT));
+	hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
+	hcor = (struct ehci_hcor *)((uint32_t) hccr +
+			HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
+	setbits_le32(&ehci->usbmode, CM_HOST);
+	setbits_le32(&ehci->control, USB_EN);
+
+	/* Init iMX51 EHCI */
+	efika_usb_phy_reset();
+	efika_usb_hub_reset();
+	efika_usb_enable_devices();
+
+	switch (CONFIG_MXC_USB_PORT) {
+	case 0:
+		ehci0_init(ehci);
+		break;
+	case 1:
+		ehci1_init(ehci, ulpi);
+		break;
+	case 2:
+		if (machine_is_efikasb())
+			ehci2_init(ehci, ulpi);
+		break;
+	};
+
+	/* EfikaMX USB has issues ... */
+	udelay(10000);
+
+	return 0;
+}
+
+int ehci_hcd_stop(void)
+{
+	return 0;
+}
diff --git a/board/efikamx/efikamx.c b/board/efikamx/efikamx.c
index 0c4e24b..8e9b42b 100644
--- a/board/efikamx/efikamx.c
+++ b/board/efikamx/efikamx.c
@@ -37,6 +37,8 @@
 #include <fsl_pmic.h>
 #include <mc13892.h>
 
+#include "efika.h"
+
 DECLARE_GLOBAL_DATA_PTR;
 
 /*
@@ -678,6 +680,7 @@ int board_late_init(void)
 
 	setup_iomux_led();
 	setup_iomux_ata();
+	setup_iomux_usb();
 
 	efikamx_toggle_led(EFIKAMX_LED_BLUE);
 
diff --git a/include/configs/efikamx.h b/include/configs/efikamx.h
index 54f48e4..57f7be5 100644
--- a/include/configs/efikamx.h
+++ b/include/configs/efikamx.h
@@ -44,6 +44,10 @@
 
 #define CONFIG_SYS_TEXT_BASE		0x97800000
 
+#define	CONFIG_L2_OFF
+#define	CONFIG_SYS_ICACHE_OFF
+#define	CONFIG_SYS_DCACHE_OFF
+
 /*
  * Bootloader Components Configuration
  */
@@ -172,6 +176,18 @@
 #endif
 
 /*
+ * USB
+ */
+#define CONFIG_CMD_USB
+#ifdef CONFIG_CMD_USB
+#define CONFIG_USB_EHCI			/* Enable EHCI USB support */
+#define CONFIG_MXC_USB_PORT	1
+#define CONFIG_EHCI_IS_TDI
+#define CONFIG_USB_STORAGE
+#define CONFIG_USB_KEYBOARD
+#endif /* CONFIG_CMD_USB */
+
+/*
  * Filesystems
  */
 #ifdef CONFIG_CMD_FAT
-- 
1.7.6.3

[U-Boot] [PATCH v7 4/4] usb: add USB support for Efika

[Igor Grinberg]

Hi Jana,

On 11/01/11 21:24, Jana Rapava wrote:
> This commit adds USB support for EfikaMX and EfikaSB.
> 
> Signed-off-by: Jana Rapava <fermata7@gmail.com>
> Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
> Cc: Remy Bohmer <linux@bohmer.net>
> Cc: Stefano Babic <sbabic@denx.de>
> 
> Acked-by: Marek Vasut <marek.vasut@gmail.com>
> ---
> Changes for v2:
>     - introduce temporary variable in ulpi_write
>     - whitespace changes
> Changes for v3:
>      - add protection against multiple inclusion of efika.h
> Changes for v4:
>       - rename multiple inclusion protection macro in efika.h
> Changes for v5:
>        - fix unterminated #ifndef in efika.h
> Changes for v6:
> 	- add Acked-by
> 	- no changes
> Changes for v7:
> 	- use ULPI-related definitions from ./include/usb/ulpi.h

This means that the patch here [1] is a prerequisite, right?
It is worth stating.

[1] http://patchwork.ozlabs.org/patch/123119/

> 
>  board/efikamx/Makefile      |    3 +
>  board/efikamx/efika.h       |   35 ++++
>  board/efikamx/efikamx-usb.c |  424 +++++++++++++++++++++++++++++++++++++++++++
>  board/efikamx/efikamx.c     |    3 +
>  include/configs/efikamx.h   |   16 ++
>  5 files changed, 481 insertions(+), 0 deletions(-)
>  create mode 100644 board/efikamx/efika.h
>  create mode 100644 board/efikamx/efikamx-usb.c
> 
> diff --git a/board/efikamx/Makefile b/board/efikamx/Makefile
> index ee4a16e..860e4d2 100644
> --- a/board/efikamx/Makefile
> +++ b/board/efikamx/Makefile
> @@ -28,6 +28,9 @@ include $(TOPDIR)/config.mk
>  LIB	= $(obj)lib$(BOARD).o
>  
>  COBJS	:= efikamx.o
> +ifdef	CONFIG_CMD_USB
> +COBJS	+= efikamx-usb.o
> +endif
>  
>  SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
>  OBJS	:= $(addprefix $(obj),$(COBJS))
> diff --git a/board/efikamx/efika.h b/board/efikamx/efika.h
> new file mode 100644
> index 0000000..fec9ee0
> --- /dev/null
> +++ b/board/efikamx/efika.h
> @@ -0,0 +1,35 @@
> +/*
> + * Copyright (C) 2011 Jana Rapava <fermata7@gmail.com>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#ifndef __BOARD_EFIKAMX_EFIKA_H__
> +#define __BOARD_EFIKAMX_EFIKA_H__
> +
> +/*
> + * EHCI USB
> + */
> +#ifdef	CONFIG_CMD_USB
> +void setup_iomux_usb(void);
> +#else
> +static inline void setup_iomux_usb(void) { }
> +#endif
> +
> +#endif /* __BOARD_EFIKAMX_EFIKA_H__ */
> diff --git a/board/efikamx/efikamx-usb.c b/board/efikamx/efikamx-usb.c
> new file mode 100644
> index 0000000..3b42256
> --- /dev/null
> +++ b/board/efikamx/efikamx-usb.c
> @@ -0,0 +1,424 @@
> +/*
> + * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
> + * Copyright (C) 2011 Jana Rapava <fermata7@gmail.com>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include <common.h>
> +#include <usb.h>
> +#include <asm/io.h>
> +#include <asm/arch/imx-regs.h>
> +#include <asm/arch/mx5x_pins.h>
> +#include <asm/arch/iomux.h>
> +#include <asm/gpio.h>
> +#include <usb/ehci-fsl.h>
> +#include <errno.h>
> +#include <watchdog.h>
> +
> +#include <usb/ehci.h>
> +#include <usb/ehci-core.h>
> +#include <usb/ulpi.h>
> +
> +/*
> + * Configure the USB H1 and USB H2 IOMUX.
> + */
> +#define USB_PAD_CONFIG	(PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST | \
> +			PAD_CTL_DRV_HIGH | PAD_CTL_100K_PU | \
> +			PAD_CTL_HYS_ENABLE | PAD_CTL_PUE_PULL)
> +void setup_iomux_usb(void)
> +{
> +	/*
> +	 * Configure USBH1 pads
> +	 */
> +	mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT0);
> +	mxc_iomux_set_pad(MX51_PIN_USBH1_STP, USB_PAD_CONFIG);
> +	mxc_request_iomux(MX51_PIN_USBH1_CLK, IOMUX_CONFIG_ALT0);
> +	mxc_iomux_set_pad(MX51_PIN_USBH1_CLK, USB_PAD_CONFIG);
> +	mxc_request_iomux(MX51_PIN_USBH1_DIR, IOMUX_CONFIG_ALT0);
> +	mxc_iomux_set_pad(MX51_PIN_USBH1_DIR, USB_PAD_CONFIG);
> +	mxc_request_iomux(MX51_PIN_USBH1_NXT, IOMUX_CONFIG_ALT0);
> +	mxc_iomux_set_pad(MX51_PIN_USBH1_NXT, USB_PAD_CONFIG);
> +
> +	mxc_request_iomux(MX51_PIN_USBH1_DATA0, IOMUX_CONFIG_ALT0);
> +	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA0, USB_PAD_CONFIG);
> +	mxc_request_iomux(MX51_PIN_USBH1_DATA1, IOMUX_CONFIG_ALT0);
> +	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA1, USB_PAD_CONFIG);
> +	mxc_request_iomux(MX51_PIN_USBH1_DATA2, IOMUX_CONFIG_ALT0);
> +	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA2, USB_PAD_CONFIG);
> +	mxc_request_iomux(MX51_PIN_USBH1_DATA3, IOMUX_CONFIG_ALT0);
> +	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA3, USB_PAD_CONFIG);
> +	mxc_request_iomux(MX51_PIN_USBH1_DATA4, IOMUX_CONFIG_ALT0);
> +	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA4, USB_PAD_CONFIG);
> +	mxc_request_iomux(MX51_PIN_USBH1_DATA5, IOMUX_CONFIG_ALT0);
> +	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA5, USB_PAD_CONFIG);
> +	mxc_request_iomux(MX51_PIN_USBH1_DATA6, IOMUX_CONFIG_ALT0);
> +	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA6, USB_PAD_CONFIG);
> +	mxc_request_iomux(MX51_PIN_USBH1_DATA7, IOMUX_CONFIG_ALT0);
> +	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA7, USB_PAD_CONFIG);
> +
> +	/*
> +	 * Configure USBH1 control pads
> +	 */
> +
> +	/* USB PHY reset */
> +	mxc_request_iomux(MX51_PIN_EIM_D27, IOMUX_CONFIG_ALT1);
> +	mxc_iomux_set_pad(MX51_PIN_EIM_D27, PAD_CTL_PKE_ENABLE |
> +			PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH);
> +
> +	/* USB HUB reset */
> +	mxc_request_iomux(MX51_PIN_GPIO1_5, IOMUX_CONFIG_ALT0);
> +	mxc_iomux_set_pad(MX51_PIN_GPIO1_5, PAD_CTL_PKE_ENABLE |
> +			PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH);
> +
> +
> +	if (machine_is_efikasb()) {
> +		/*
> +		 * Configure USBH2 pads (used on EfikaSB)
> +		 */
> +		/* USBH2_DATA */
> +		mxc_request_iomux(MX51_PIN_EIM_D16, IOMUX_CONFIG_ALT2);
> +		mxc_iomux_set_pad(MX51_PIN_EIM_D16, USB_PAD_CONFIG);
> +		mxc_request_iomux(MX51_PIN_EIM_D17, IOMUX_CONFIG_ALT2);
> +		mxc_iomux_set_pad(MX51_PIN_EIM_D17, USB_PAD_CONFIG);
> +		mxc_request_iomux(MX51_PIN_EIM_D18, IOMUX_CONFIG_ALT2);
> +		mxc_iomux_set_pad(MX51_PIN_EIM_D18, USB_PAD_CONFIG);
> +		mxc_request_iomux(MX51_PIN_EIM_D19, IOMUX_CONFIG_ALT2);
> +		mxc_iomux_set_pad(MX51_PIN_EIM_D19, USB_PAD_CONFIG);
> +		mxc_request_iomux(MX51_PIN_EIM_D20, IOMUX_CONFIG_ALT2);
> +		mxc_iomux_set_pad(MX51_PIN_EIM_D20, USB_PAD_CONFIG);
> +		mxc_request_iomux(MX51_PIN_EIM_D21, IOMUX_CONFIG_ALT2);
> +		mxc_iomux_set_pad(MX51_PIN_EIM_D21, USB_PAD_CONFIG);
> +		mxc_request_iomux(MX51_PIN_EIM_D22, IOMUX_CONFIG_ALT2);
> +		mxc_iomux_set_pad(MX51_PIN_EIM_D22, USB_PAD_CONFIG);
> +		mxc_request_iomux(MX51_PIN_EIM_D23, IOMUX_CONFIG_ALT2);
> +		mxc_iomux_set_pad(MX51_PIN_EIM_D23, USB_PAD_CONFIG);
> +
> +		/* USBH2_CLK */
> +		mxc_request_iomux(MX51_PIN_EIM_A24, IOMUX_CONFIG_ALT2);
> +		mxc_iomux_set_pad(MX51_PIN_EIM_A24, USB_PAD_CONFIG);
> +		/* USBH2_DIR */
> +		mxc_request_iomux(MX51_PIN_EIM_A25, IOMUX_CONFIG_ALT2);
> +		mxc_iomux_set_pad(MX51_PIN_EIM_A25, USB_PAD_CONFIG);
> +		/* USBH2_STP */
> +		mxc_request_iomux(MX51_PIN_EIM_A26, IOMUX_CONFIG_ALT2);
> +		mxc_iomux_set_pad(MX51_PIN_EIM_A26, USB_PAD_CONFIG);
> +		/* USBH2_NXT */
> +		mxc_request_iomux(MX51_PIN_EIM_A27, IOMUX_CONFIG_ALT2);
> +		mxc_iomux_set_pad(MX51_PIN_EIM_A27, USB_PAD_CONFIG);
> +	}
> +
> +	/* WIFI EN (act low) */
> +	mxc_request_iomux(MX51_PIN_EIM_A22, IOMUX_CONFIG_GPIO);
> +	mxc_iomux_set_pad(MX51_PIN_EIM_A22, 0);
> +	/* WIFI RESET */
> +	mxc_request_iomux(MX51_PIN_EIM_A16, IOMUX_CONFIG_GPIO);
> +	mxc_iomux_set_pad(MX51_PIN_EIM_A16, 0);
> +	/* BT EN (act low) */
> +	mxc_request_iomux(MX51_PIN_EIM_A17, IOMUX_CONFIG_GPIO);
> +	mxc_iomux_set_pad(MX51_PIN_EIM_A17, 0);
> +}
> +
> +/*
> + * Enable devices connected to USB buses.
> + */
> +void efika_usb_enable_devices(void)
> +{
> +	/* Enable Bluetooth */
> +	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A17), 0);
> +	udelay(10000);
> +	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A17), 1);
> +
> +	/* Enable WiFi */
> +	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A22), 1);
> +	udelay(10000);
> +
> +	/* Reset the WiFi chip */
> +	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A16), 0);
> +	udelay(10000);
> +	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A16), 1);
> +}
> +
> +/*
> + * Reset USB HUB (or HUBs on EfikaSB).
> + */
> +void efika_usb_hub_reset(void)
> +{
> +	/* HUB reset */
> +	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 1);
> +	udelay(1000);
> +	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 0);
> +	udelay(1000);
> +	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 1);
> +}
> +
> +/*
> + * Reset USB PHY (or PHYs on EfikaSB).
> + */
> +void efika_usb_phy_reset(void)
> +{
> +	/* SMSC 3317 PHY reset */
> +	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_D27), 0);
> +	udelay(1000);
> +	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_D27), 1);
> +}
> +
> +/*
> + * Configure control registers of the USB controller.
> + */
> +void control_regs_setup(struct mx5_usb_control_regs *control)
> +{
> +	clrsetbits_le32(&control->usbctrl,
> +		(MXC_OTG_WUE | MXC_OTG_PM | MX51_H1_ULPI_IE | MX51_H1_WUE),
> +		MX51_H1_PM);
> +
> +	clrsetbits_le32(&control->phyctrl0,
> +			MX51_OTG_OVERCURD,
> +			MX51_EHCI_POWERPINSE);
> +
> +	clrsetbits_le32(&control->phyctrl1,
> +			MX51_SYSCLOCK_MASK,
> +			MX51_SYSCLOCK_24_MHZ);
> +
> +	setbits_le32(&control->usbctrl1, MX51_H1_EXTCLKE);
> +
> +	clrsetbits_le32(&control->uh2ctrl,
> +			(MX51_H2_ULPI_IE | MX51_H2_WUE),
> +			MX51_H2_PM);
> +
> +	udelay(10000);
> +}
> +
> +#define ULPI_ADDR_SHIFT		16
> +#define ulpi_write_mask(value)	((value) & 0xff)
> +#define ulpi_read_mask(value)	(((value) >> 8) & 0xff)
> +
> +int ulpi_wait(struct usb_ehci *ehci, u32 ulpi_value, u32 ulpi_mask)
> +{
> +	int timeout = ULPI_TIMEOUT;
> +	u32 tmp;
> +
> +	writel(ulpi_value, &ehci->ulpi_viewpoint);
> +
> +	/* Wait for the bits in ulpi_mask to become zero. */
> +	while (--timeout) {
> +		tmp = readl(&ehci->ulpi_viewpoint);
> +		if (!(tmp & ulpi_mask))
> +			break;
> +		WATCHDOG_RESET();
> +	}
> +
> +	return !timeout;
> +}
> +
> +int ulpi_wakeup(struct usb_ehci *ehci)
> +{
> +	if (readl(&ehci->ulpi_viewpoint) & ULPI_SS)
> +		return 0; /* already awake */
> +	return ulpi_wait(ehci, ULPI_WU, ULPI_WU);
> +}
> +
> +void ulpi_write(struct usb_ehci *ehci, u32 reg, u32 value)
> +{
> +	u32 tmp;
> +	if (ulpi_wakeup(ehci)) {
> +		printf("ULPI wakeup timed out\n");
> +		return;
> +	}
> +
> +	tmp = ulpi_wait(ehci, ULPI_RWRUN | ULPI_RWCTRL |
> +		reg << ULPI_ADDR_SHIFT | ulpi_write_mask(value), ULPI_RWRUN);
> +	if (tmp)
> +		printf("ULPI write timed out\n");
> +}
> +
> +u32 ulpi_read(struct usb_ehci *ehci, u32 reg)
> +{
> +	if (ulpi_wakeup(ehci)) {
> +		printf("ULPI wakeup timed out\n");
> +		return 0;
> +	}
> +
> +	if (ulpi_wait(ehci, ULPI_RWRUN | reg << ULPI_ADDR_SHIFT, ULPI_RWRUN)) {
> +		printf("ULPI read timed out\n");
> +		return 0;
> +	}
> +
> +	return ulpi_read_mask(readl(&ehci->ulpi_viewpoint));
> +}
> +
> +void ulpi_init(struct usb_ehci *ehci, struct ulpi_regs *ulpi)
> +{
> +	u32 tmp = 0;
> +	int reg, i;
> +
> +	/* Assemble ID from four ULPI ID registers (8 bits each). */
> +	for (reg = ULPI_ID_REGS_COUNT - 1; reg >= 0; reg--)
> +		tmp |= ulpi_read(ehci, reg) << (reg * 8);
> +
> +	/* Split ID into vendor and product ID. */
> +	debug("Found ULPI TX, ID %04x:%04x\n", tmp >> 16, tmp & 0xffff);
> +
> +	/* ULPI integrity check */
> +	for (i = 0; i < 2; i++) {
> +		ulpi_write(ehci, (u32)&ulpi->scratch_write,
> +			ULPI_TEST_VALUE << i);
> +		tmp = ulpi_read(ehci, (u32)&ulpi->scratch_write);
> +
> +		if (tmp != (ULPI_TEST_VALUE << i)) {
> +			printf("ULPI integrity check failed\n");
> +			return;
> +		}
> +	}
> +
> +	/* Set ULPI flags. */
> +	ulpi_write(ehci, (u32)&ulpi->otg_ctrl_write,
> +		ULPI_OTG_EXTVBUSIND |
> +		ULPI_OTG_DM_PULLDOWN | ULPI_OTG_DP_PULLDOWN);
> +	ulpi_write(ehci, (u32)&ulpi->function_ctrl_write,
> +		ULPI_FC_XCVRSEL | ULPI_FC_OPMODE_NORMAL |
> +		ULPI_FC_SUSPENDM);
> +	ulpi_write(ehci, (u32)&ulpi->iface_ctrl_write, 0);
> +	ulpi_write(ehci, (u32)&ulpi->otg_ctrl_set,
> +		ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
> +
> +	/*
> +	 * NOTE: This violates USB specification, but otherwise, USB on Efika
> +	 * doesn't charge VBUS and as a result, USB doesn't work.
> +	 */
> +	ulpi_write(ehci, (u32)&ulpi->otg_ctrl_set, ULPI_OTG_CHRGVBUS);
> +}
> +
> +/*
> + * Solve the VBUS reset problem on Efika
> + * by setting the CHRG_VBUS bit in the reset.
> + */
> +void ehci_fixup(uint32_t *status_reg, uint32_t *reg_ref)
> +{
> +	struct usb_ehci *ehci = (struct usb_ehci *)(OTG_BASE_ADDR +
> +		MX51_REGISTER_LAYOUT_LENGTH);
> +	struct ulpi_regs *ulpi = (struct ulpi_regs *)0;
> +
> +	u32 tmp = ulpi_read(ehci, (u32)&ulpi->otg_ctrl_write);
> +	tmp |= ULPI_OTG_CHRGVBUS;
> +	ulpi_write(ehci, (u32)&ulpi->otg_ctrl_write, tmp);
> +
> +	/* USB 2.0 specification say 50 ms resets on root. */
> +	wait_ms(50);
> +
> +	/* Now terminate the reset. */
> +	*reg_ref = ehci_readl(status_reg);
> +	*reg_ref |= EHCI_PS_PE;
> +}
> +
> +void ehci0_init(struct usb_ehci *ehci)
> +{
> +	writel(MX51_16BIT_UTMI, &ehci->portsc);
> +}
> +
> +void ehci1_init(struct usb_ehci *ehci, struct ulpi_regs *ulpi)
> +{
> +	mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT2);
> +	mxc_iomux_set_pad(MX51_PIN_USBH1_STP, PAD_CTL_DRV_HIGH |
> +				PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST);
> +	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_USBH1_STP), 0);
> +	udelay(1000);
> +	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_USBH1_STP), 1);
> +	udelay(1000);
> +
> +	mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT0);
> +	mxc_iomux_set_pad(MX51_PIN_USBH1_STP, USB_PAD_CONFIG);
> +	udelay(10000);
> +
> +	clrbits_le32(&ehci->usbcmd, MX51_ITC_IMMEDIATE_MASK);
> +	udelay(10000);
> +
> +	writel(MX51_ULPI_MODE_MASK, &ehci->portsc);
> +	udelay(10000);
> +
> +	ulpi_init(ehci, ulpi);
> +}
> +
> +void ehci2_init(struct usb_ehci *ehci, struct ulpi_regs *ulpi)
> +{
> +	mxc_request_iomux(MX51_PIN_EIM_A26, IOMUX_CONFIG_ALT1);
> +	mxc_iomux_set_pad(MX51_PIN_EIM_A26, PAD_CTL_DRV_HIGH |
> +				PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST);
> +	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A26), 0);
> +	udelay(1000);
> +	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A26), 1);
> +	udelay(1000);
> +
> +	mxc_request_iomux(MX51_PIN_EIM_A26, IOMUX_CONFIG_ALT2);
> +	mxc_iomux_set_pad(MX51_PIN_EIM_A26, USB_PAD_CONFIG);
> +
> +	writel(MX51_ULPI_MODE_MASK, &ehci->portsc);
> +	udelay(10000);
> +
> +	ulpi_init(ehci, ulpi);
> +}
> +
> +int ehci_hcd_init(void)
> +{
> +	struct usb_ehci *ehci;
> +	struct mx5_usb_control_regs *mx5_usb_control_regs;
> +	struct ulpi_regs *ulpi;
> +
> +	mx5_usb_control_regs = (struct mx5_usb_control_regs *)(OTG_BASE_ADDR +
> +		 MX5_CTRL_REGS_OFFSET);
> +	control_regs_setup(mx5_usb_control_regs);
> +	ulpi = (struct ulpi_regs *)0;
> +
> +	/* Init EHCI core */
> +	ehci = (struct usb_ehci *)(OTG_BASE_ADDR +
> +		(MX51_REGISTER_LAYOUT_LENGTH * CONFIG_MXC_USB_PORT));
> +	hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
> +	hcor = (struct ehci_hcor *)((uint32_t) hccr +
> +			HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
> +	setbits_le32(&ehci->usbmode, CM_HOST);
> +	setbits_le32(&ehci->control, USB_EN);
> +
> +	/* Init iMX51 EHCI */
> +	efika_usb_phy_reset();
> +	efika_usb_hub_reset();
> +	efika_usb_enable_devices();
> +
> +	switch (CONFIG_MXC_USB_PORT) {
> +	case 0:
> +		ehci0_init(ehci);
> +		break;
> +	case 1:
> +		ehci1_init(ehci, ulpi);
> +		break;
> +	case 2:
> +		if (machine_is_efikasb())
> +			ehci2_init(ehci, ulpi);
> +		break;
> +	};
> +
> +	/* EfikaMX USB has issues ... */
> +	udelay(10000);
> +
> +	return 0;
> +}
> +
> +int ehci_hcd_stop(void)
> +{
> +	return 0;
> +}

Most of the functions and defines above aren't board specific, right?
It would be a good thing to put them in an SoC specific location,
so any other board using that SoC can benefit from them.

I don't want to block on that issue, so if it simplifies you a
further ULPI patches submission - I don't care if you leave it here
and in the next patch set move to a common location.

Although the proper way would be to submit the framework(s) and then
adjust the users.

[...]


-- 
Regards,
Igor.

[U-Boot] [PATCH v7 4/4] usb: add USB support for Efika

[Jana Rapava]

2011/11/2 Igor Grinberg <grinberg@compulab.co.il>

> Hi Jana,
>
> On 11/01/11 21:24, Jana Rapava wrote:
>
> > diff --git a/board/efikamx/efika.h b/board/efikamx/efika.h
> > new file mode 100644
> > index 0000000..fec9ee0
> > --- /dev/null
> > +++ b/board/efikamx/efika.h
> >
> > diff --git a/board/efikamx/efikamx-usb.c b/board/efikamx/efikamx-usb.c
> > new file mode 100644
> > index 0000000..3b42256
> > --- /dev/null
> > +++ b/board/efikamx/efikamx-usb.c
> >
>
> Most of the functions and defines above aren't board specific, right?
> It would be a good thing to put them in an SoC specific location,
> so any other board using that SoC can benefit from them.
>

Ok, so non-board-specific parts should go into ./arch/arm/cpu/armv7/mx5/
and board-specific callbacks should stay here? Do I understand you well?

>
> I don't want to block on that issue, so if it simplifies you a
> further ULPI patches submission - I don't care if you leave it here
> and in the next patch set move to a common location.
>
>
Thanks.


> Although the proper way would be to submit the framework(s) and then
> adjust the users.
>
>
Ok, I'll do it that way in the future patchsets.

[U-Boot] [PATCH v7 4/4] usb: add USB support for Efika

[Stefano Babic]

On 11/02/2011 05:03 PM, Jana Rapava wrote:
> 
> Ok, so non-board-specific parts should go into ./arch/arm/cpu/armv7/mx5/
> and board-specific callbacks should stay here? Do I understand you well?

Yes, I think so

> 
>>
>> I don't want to block on that issue, so if it simplifies you a
>> further ULPI patches submission - I don't care if you leave it here
>> and in the next patch set move to a common location.
>>
>>
> Thanks.

Anyway, as we agree, it is really better to do now the right thing as to
postpone.

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: office at denx.de
=====================================================================

[U-Boot] [PATCH v7 4/4] usb: add USB support for Efika

[Wolfgang Grandegger]

On 11/02/2011 05:16 PM, Stefano Babic wrote:
> On 11/02/2011 05:03 PM, Jana Rapava wrote:
>>
>> Ok, so non-board-specific parts should go into ./arch/arm/cpu/armv7/mx5/
>> and board-specific callbacks should stay here? Do I understand you well?
> 
> Yes, I think so
> 
>>
>>>
>>> I don't want to block on that issue, so if it simplifies you a
>>> further ULPI patches submission - I don't care if you leave it here
>>> and in the next patch set move to a common location.
>>>
>>>
>> Thanks.
> 
> Anyway, as we agree, it is really better to do now the right thing as to
> postpone.

I'm want to provide USB support for mx53loco and maybe mx51evk,
similar to what Jana is doing. Following the "drivers/usb/host/ehci mxc.c"
example, I tried to do it the generic way by implementing
"drivers/usb/host/ehci-mx5.c". Not sure if it's the better approach as
a board specific initialization/reset might be required for some boards.
Therefore board specific callbacks would make sense. I have attached my
patch below for review and comments.

Thanks,

Wolfgang,

[U-Boot] [PATCH v8 4/4] Add USB support for Efika

[Jana Rapava]

This commit adds USB support for EfikaMX and EfikaSB.

Signed-off-by: Jana Rapava <fermata7@gmail.com>
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Wolfgang Grandegger <wg@denx.de>

Acked-by: Marek Vasut <marek.vasut@gmail.com>
---
Changes for v2:
    - introduce temporary variable in ulpi_write
    - whitespace changes
Changes for v3:
     - add protection against multiple inclusion of efika.h
Changes for v4:
      - rename multiple inclusion protection macro in efika.h
Changes for v5:
       - fix unterminated #ifndef in efika.h
Changes for v6:
	- add Acked-by
	- no changes
Changes for v7:
	- use ULPI-related definitions from ./include/usb/ulpi.h
Changes for v8:
	- adjust to new and more generic ULPI implementation

 board/efikamx/Makefile      |    3 +
 board/efikamx/efika.h       |   35 +++++
 board/efikamx/efikamx-usb.c |  344 +++++++++++++++++++++++++++++++++++++++++++
 board/efikamx/efikamx.c     |    3 +
 include/configs/efikamx.h   |   18 +++
 5 files changed, 403 insertions(+), 0 deletions(-)
 create mode 100644 board/efikamx/efika.h
 create mode 100644 board/efikamx/efikamx-usb.c

diff --git a/board/efikamx/Makefile b/board/efikamx/Makefile
index ee4a16e..860e4d2 100644
--- a/board/efikamx/Makefile
+++ b/board/efikamx/Makefile
@@ -28,6 +28,9 @@ include $(TOPDIR)/config.mk
 LIB	= $(obj)lib$(BOARD).o
 
 COBJS	:= efikamx.o
+ifdef	CONFIG_CMD_USB
+COBJS	+= efikamx-usb.o
+endif
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS))
diff --git a/board/efikamx/efika.h b/board/efikamx/efika.h
new file mode 100644
index 0000000..fec9ee0
--- /dev/null
+++ b/board/efikamx/efika.h
@@ -0,0 +1,35 @@
+/*
+ * Copyright (C) 2011 Jana Rapava <fermata7@gmail.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __BOARD_EFIKAMX_EFIKA_H__
+#define __BOARD_EFIKAMX_EFIKA_H__
+
+/*
+ * EHCI USB
+ */
+#ifdef	CONFIG_CMD_USB
+void setup_iomux_usb(void);
+#else
+static inline void setup_iomux_usb(void) { }
+#endif
+
+#endif /* __BOARD_EFIKAMX_EFIKA_H__ */
diff --git a/board/efikamx/efikamx-usb.c b/board/efikamx/efikamx-usb.c
new file mode 100644
index 0000000..cbcdb18
--- /dev/null
+++ b/board/efikamx/efikamx-usb.c
@@ -0,0 +1,344 @@
+/*
+ * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
+ * Copyright (C) 2011 Jana Rapava <fermata7@gmail.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <usb.h>
+#include <asm/io.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/mx5x_pins.h>
+#include <asm/arch/iomux.h>
+#include <asm/gpio.h>
+#include <usb/ehci-fsl.h>
+#include <errno.h>
+#include <watchdog.h>
+
+#include <usb/ehci.h>
+#include <usb/ehci-core.h>
+#include <usb/ulpi.h>
+
+/*
+ * Configure the USB H1 and USB H2 IOMUX.
+ */
+#define USB_PAD_CONFIG	(PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST | \
+			PAD_CTL_DRV_HIGH | PAD_CTL_100K_PU | \
+			PAD_CTL_HYS_ENABLE | PAD_CTL_PUE_PULL)
+void setup_iomux_usb(void)
+{
+	/*
+	 * Configure USBH1 pads
+	 */
+	mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_STP, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_CLK, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_CLK, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DIR, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DIR, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_NXT, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_NXT, USB_PAD_CONFIG);
+
+	mxc_request_iomux(MX51_PIN_USBH1_DATA0, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA0, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA1, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA1, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA2, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA2, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA3, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA3, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA4, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA4, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA5, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA5, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA6, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA6, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA7, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA7, USB_PAD_CONFIG);
+
+	/*
+	 * Configure USBH1 control pads
+	 */
+
+	/* USB PHY reset */
+	mxc_request_iomux(MX51_PIN_EIM_D27, IOMUX_CONFIG_ALT1);
+	mxc_iomux_set_pad(MX51_PIN_EIM_D27, PAD_CTL_PKE_ENABLE |
+			PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH);
+
+	/* USB HUB reset */
+	mxc_request_iomux(MX51_PIN_GPIO1_5, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_GPIO1_5, PAD_CTL_PKE_ENABLE |
+			PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH);
+
+
+	if (machine_is_efikasb()) {
+		/*
+		 * Configure USBH2 pads (used on EfikaSB)
+		 */
+		/* USBH2_DATA */
+		mxc_request_iomux(MX51_PIN_EIM_D16, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D16, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D17, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D17, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D18, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D18, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D19, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D19, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D20, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D20, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D21, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D21, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D22, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D22, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D23, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D23, USB_PAD_CONFIG);
+
+		/* USBH2_CLK */
+		mxc_request_iomux(MX51_PIN_EIM_A24, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_A24, USB_PAD_CONFIG);
+		/* USBH2_DIR */
+		mxc_request_iomux(MX51_PIN_EIM_A25, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_A25, USB_PAD_CONFIG);
+		/* USBH2_STP */
+		mxc_request_iomux(MX51_PIN_EIM_A26, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_A26, USB_PAD_CONFIG);
+		/* USBH2_NXT */
+		mxc_request_iomux(MX51_PIN_EIM_A27, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_A27, USB_PAD_CONFIG);
+	}
+
+	/* WIFI EN (act low) */
+	mxc_request_iomux(MX51_PIN_EIM_A22, IOMUX_CONFIG_GPIO);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A22, 0);
+	/* WIFI RESET */
+	mxc_request_iomux(MX51_PIN_EIM_A16, IOMUX_CONFIG_GPIO);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A16, 0);
+	/* BT EN (act low) */
+	mxc_request_iomux(MX51_PIN_EIM_A17, IOMUX_CONFIG_GPIO);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A17, 0);
+}
+
+/*
+ * Enable devices connected to USB buses.
+ */
+void efika_usb_enable_devices(void)
+{
+	/* Enable Bluetooth */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A17), 0);
+	udelay(10000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A17), 1);
+
+	/* Enable WiFi */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A22), 1);
+	udelay(10000);
+
+	/* Reset the WiFi chip */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A16), 0);
+	udelay(10000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A16), 1);
+}
+
+/*
+ * Reset USB HUB (or HUBs on EfikaSB).
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+void efika_usb_hub_reset(void)
+{
+	/* HUB reset */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 1);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 0);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 1);
+}
+
+/*
+ * Reset USB PHY (or PHYs on EfikaSB).
+ */
+void efika_usb_phy_reset(void)
+{
+	/* SMSC 3317 PHY reset */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_D27), 0);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_D27), 1);
+}
+
+/*
+ * Configure control registers of the USB controller.
+ */
+void control_regs_setup(struct mx5_usb_control_regs *control)
+{
+	clrsetbits_le32(&control->usbctrl,
+		(MXC_OTG_WUE | MXC_OTG_PM | MX51_H1_ULPI_IE | MX51_H1_WUE),
+		MX51_H1_PM);
+
+	clrsetbits_le32(&control->phyctrl0,
+			MX51_OTG_OVERCURD,
+			MX51_EHCI_POWERPINSE);
+
+	clrsetbits_le32(&control->phyctrl1,
+			MX51_SYSCLOCK_MASK,
+			MX51_SYSCLOCK_24_MHZ);
+
+	setbits_le32(&control->usbctrl1, MX51_H1_EXTCLKE);
+
+	clrsetbits_le32(&control->uh2ctrl,
+			(MX51_H2_ULPI_IE | MX51_H2_WUE),
+			MX51_H2_PM);
+
+	udelay(10000);
+}
+
+void ulpi_set_flags(u32 ulpi_viewport, struct ulpi_regs *ulpi)
+{
+	ulpi_otg_ctrl_flags(ulpi_viewport, ulpi, ULPI_WRITE, ULPI_OTG_EXTVBUSIND |
+		ULPI_OTG_DM_PULLDOWN | ULPI_OTG_DP_PULLDOWN);
+	ulpi_function_ctrl_flags(ulpi_viewport, ulpi, ULPI_WRITE, ULPI_FC_XCVRSEL |
+		ULPI_FC_OPMODE_NORMAL | ULPI_FC_SUSPENDM);
+	ulpi_iface_ctrl_flags(ulpi_viewport, ulpi, ULPI_WRITE, 0);
+
+	/*
+	 * NOTE: Setting ULPI_OTG_CHRGVBUS violates USB specification,
+	 * but otherwise, USB on Efika doesn't charge VBUS
+	 * and as a result, USB doesn't work.
+	 */
+	ulpi_otg_ctrl_flags(ulpi_viewport, ulpi, ULPI_SET, ULPI_OTG_DRVVBUS |
+		ULPI_OTG_DRVVBUS_EXT | ULPI_OTG_CHRGVBUS);
+}
+
+/*
+ * Solve the VBUS reset problem on Efika
+ * by setting the CHRG_VBUS bit in the reset.
+ */
+void ehci_fixup(uint32_t *status_reg, uint32_t *reg_ref)
+{
+	struct usb_ehci *ehci = (struct usb_ehci *)(OTG_BASE_ADDR +
+		MX51_REGISTER_LAYOUT_LENGTH);
+	struct ulpi_regs *ulpi = (struct ulpi_regs *)0;
+
+	u32 tmp = ulpi_read((u32)&ehci->ulpi_viewport, (u32)&ulpi->otg_ctrl);
+	tmp |= ULPI_OTG_CHRGVBUS;
+	ulpi_write((u32)&ehci->ulpi_viewport, (u32)&ulpi->otg_ctrl, tmp);
+
+	/* USB 2.0 specification say 50 ms resets on root. */
+	wait_ms(50);
+
+	/* Now terminate the reset. */
+	*reg_ref = ehci_readl(status_reg);
+	*reg_ref |= EHCI_PS_PE;
+}
+
+void ehci0_init(struct usb_ehci *ehci)
+{
+	writel(MX51_16BIT_UTMI, &ehci->portsc);
+}
+
+void ehci1_init(struct usb_ehci *ehci, struct ulpi_regs *ulpi)
+{
+	mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT2);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_STP, PAD_CTL_DRV_HIGH |
+				PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST);
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_USBH1_STP), 0);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_USBH1_STP), 1);
+	udelay(1000);
+
+	mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_STP, USB_PAD_CONFIG);
+	udelay(10000);
+
+	clrbits_le32(&ehci->usbcmd, MX51_ITC_IMMEDIATE_MASK);
+	udelay(10000);
+
+	writel(MX51_ULPI_MODE_MASK, &ehci->portsc);
+	udelay(10000);
+
+	ulpi_init((u32)&ehci->ulpi_viewport, ulpi);
+	ulpi_set_flags((u32)&ehci->ulpi_viewport, ulpi);
+}
+
+void ehci2_init(struct usb_ehci *ehci, struct ulpi_regs *ulpi)
+{
+	mxc_request_iomux(MX51_PIN_EIM_A26, IOMUX_CONFIG_ALT1);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A26, PAD_CTL_DRV_HIGH |
+				PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST);
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A26), 0);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A26), 1);
+	udelay(1000);
+
+	mxc_request_iomux(MX51_PIN_EIM_A26, IOMUX_CONFIG_ALT2);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A26, USB_PAD_CONFIG);
+
+	writel(MX51_ULPI_MODE_MASK, &ehci->portsc);
+	udelay(10000);
+
+	ulpi_init((u32)&ehci->ulpi_viewport, ulpi);
+	ulpi_set_flags((u32)&ehci->ulpi_viewport, ulpi);
+}
+
+int ehci_hcd_init(void)
+{
+	struct usb_ehci *ehci;
+	struct mx5_usb_control_regs *mx5_usb_control_regs;
+	struct ulpi_regs *ulpi;
+
+	mx5_usb_control_regs = (struct mx5_usb_control_regs *)(OTG_BASE_ADDR +
+		 MX5_CTRL_REGS_OFFSET);
+	control_regs_setup(mx5_usb_control_regs);
+	ulpi = (struct ulpi_regs *)0;
+
+	/* Init EHCI core */
+	ehci = (struct usb_ehci *)(OTG_BASE_ADDR +
+		(MX51_REGISTER_LAYOUT_LENGTH * CONFIG_MXC_USB_PORT));
+	hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
+	hcor = (struct ehci_hcor *)((uint32_t) hccr +
+			HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
+	setbits_le32(&ehci->usbmode, CM_HOST);
+	setbits_le32(&ehci->control, USB_EN);
+
+	/* Init iMX51 EHCI */
+	efika_usb_phy_reset();
+	efika_usb_hub_reset();
+	efika_usb_enable_devices();
+
+	switch (CONFIG_MXC_USB_PORT) {
+	case 0:
+		ehci0_init(ehci);
+		break;
+	case 1:
+		ehci1_init(ehci, ulpi);
+		break;
+	case 2:
+		if (machine_is_efikasb())
+			ehci2_init(ehci, ulpi);
+		break;
+	};
+
+	/* EfikaMX USB has issues ... */
+	udelay(10000);
+
+	return 0;
+}
+
+int ehci_hcd_stop(void)
+{
+	return 0;
+}
diff --git a/board/efikamx/efikamx.c b/board/efikamx/efikamx.c
index 0c4e24b..8e9b42b 100644
--- a/board/efikamx/efikamx.c
+++ b/board/efikamx/efikamx.c
@@ -37,6 +37,8 @@
 #include <fsl_pmic.h>
 #include <mc13892.h>
 
+#include "efika.h"
+
 DECLARE_GLOBAL_DATA_PTR;
 
 /*
@@ -678,6 +680,7 @@ int board_late_init(void)
 
 	setup_iomux_led();
 	setup_iomux_ata();
+	setup_iomux_usb();
 
 	efikamx_toggle_led(EFIKAMX_LED_BLUE);
 
diff --git a/include/configs/efikamx.h b/include/configs/efikamx.h
index 54f48e4..1c48376 100644
--- a/include/configs/efikamx.h
+++ b/include/configs/efikamx.h
@@ -44,6 +44,10 @@
 
 #define CONFIG_SYS_TEXT_BASE		0x97800000
 
+#define	CONFIG_L2_OFF
+#define	CONFIG_SYS_ICACHE_OFF
+#define	CONFIG_SYS_DCACHE_OFF
+
 /*
  * Bootloader Components Configuration
  */
@@ -172,6 +176,20 @@
 #endif
 
 /*
+ * USB
+ */
+#define CONFIG_CMD_USB
+#ifdef CONFIG_CMD_USB
+#define CONFIG_USB_EHCI			/* Enable EHCI USB support */
+#define CONFIG_MXC_USB_PORT	1
+#define CONFIG_EHCI_IS_TDI
+#define CONFIG_USB_STORAGE
+#define CONFIG_USB_KEYBOARD
+#define CONFIG_USB_ULPI
+#define CONFIG_USB_ULPI_VIEWPORT
+#endif /* CONFIG_CMD_USB */
+
+/*
  * Filesystems
  */
 #ifdef CONFIG_CMD_FAT
-- 
1.7.6.3

[U-Boot] [PATCH v8 4/4] Add USB support for Efika

[Igor Grinberg]

On 11/12/11 19:45, Jana Rapava wrote:
> This commit adds USB support for EfikaMX and EfikaSB.
> 
> Signed-off-by: Jana Rapava <fermata7@gmail.com>
> Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
> Cc: Remy Bohmer <linux@bohmer.net>
> Cc: Stefano Babic <sbabic@denx.de>
> Cc: Igor Grinberg <grinberg@compulab.co.il>
> Cc: Wolfgang Grandegger <wg@denx.de>
> 
> Acked-by: Marek Vasut <marek.vasut@gmail.com>
> ---
> Changes for v2:
>     - introduce temporary variable in ulpi_write
>     - whitespace changes
> Changes for v3:
>      - add protection against multiple inclusion of efika.h
> Changes for v4:
>       - rename multiple inclusion protection macro in efika.h
> Changes for v5:
>        - fix unterminated #ifndef in efika.h
> Changes for v6:
> 	- add Acked-by
> 	- no changes
> Changes for v7:
> 	- use ULPI-related definitions from ./include/usb/ulpi.h
> Changes for v8:
> 	- adjust to new and more generic ULPI implementation
> 
>  board/efikamx/Makefile      |    3 +
>  board/efikamx/efika.h       |   35 +++++
>  board/efikamx/efikamx-usb.c |  344 +++++++++++++++++++++++++++++++++++++++++++
>  board/efikamx/efikamx.c     |    3 +
>  include/configs/efikamx.h   |   18 +++
>  5 files changed, 403 insertions(+), 0 deletions(-)
>  create mode 100644 board/efikamx/efika.h
>  create mode 100644 board/efikamx/efikamx-usb.c
> 
> diff --git a/board/efikamx/Makefile b/board/efikamx/Makefile
> index ee4a16e..860e4d2 100644
> --- a/board/efikamx/Makefile
> +++ b/board/efikamx/Makefile
> @@ -28,6 +28,9 @@ include $(TOPDIR)/config.mk
>  LIB	= $(obj)lib$(BOARD).o
>  
>  COBJS	:= efikamx.o
> +ifdef	CONFIG_CMD_USB
> +COBJS	+= efikamx-usb.o
> +endif

Please, use the standard construct for such things:
COBJS-$(CONFIG_CMD_USB)	+= efikamx-usb.o

>  
>  SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
>  OBJS	:= $(addprefix $(obj),$(COBJS))
> diff --git a/board/efikamx/efika.h b/board/efikamx/efika.h
> new file mode 100644
> index 0000000..fec9ee0
> --- /dev/null
> +++ b/board/efikamx/efika.h
> @@ -0,0 +1,35 @@
> +/*
> + * Copyright (C) 2011 Jana Rapava <fermata7@gmail.com>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#ifndef __BOARD_EFIKAMX_EFIKA_H__
> +#define __BOARD_EFIKAMX_EFIKA_H__
> +
> +/*
> + * EHCI USB
> + */
> +#ifdef	CONFIG_CMD_USB
> +void setup_iomux_usb(void);
> +#else
> +static inline void setup_iomux_usb(void) { }
> +#endif
> +
> +#endif /* __BOARD_EFIKAMX_EFIKA_H__ */
> diff --git a/board/efikamx/efikamx-usb.c b/board/efikamx/efikamx-usb.c
> new file mode 100644
> index 0000000..cbcdb18
> --- /dev/null
> +++ b/board/efikamx/efikamx-usb.c
> @@ -0,0 +1,344 @@
> +/*
> + * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
> + * Copyright (C) 2011 Jana Rapava <fermata7@gmail.com>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include <common.h>
> +#include <usb.h>
> +#include <asm/io.h>
> +#include <asm/arch/imx-regs.h>
> +#include <asm/arch/mx5x_pins.h>
> +#include <asm/arch/iomux.h>
> +#include <asm/gpio.h>
> +#include <usb/ehci-fsl.h>
> +#include <errno.h>
> +#include <watchdog.h>
> +
> +#include <usb/ehci.h>
> +#include <usb/ehci-core.h>
> +#include <usb/ulpi.h>
> +
> +/*
> + * Configure the USB H1 and USB H2 IOMUX.
> + */
> +#define USB_PAD_CONFIG	(PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST | \
> +			PAD_CTL_DRV_HIGH | PAD_CTL_100K_PU | \
> +			PAD_CTL_HYS_ENABLE | PAD_CTL_PUE_PULL)
> +void setup_iomux_usb(void)
> +{
> +	/*
> +	 * Configure USBH1 pads
> +	 */
> +	mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT0);
> +	mxc_iomux_set_pad(MX51_PIN_USBH1_STP, USB_PAD_CONFIG);
> +	mxc_request_iomux(MX51_PIN_USBH1_CLK, IOMUX_CONFIG_ALT0);
> +	mxc_iomux_set_pad(MX51_PIN_USBH1_CLK, USB_PAD_CONFIG);
> +	mxc_request_iomux(MX51_PIN_USBH1_DIR, IOMUX_CONFIG_ALT0);
> +	mxc_iomux_set_pad(MX51_PIN_USBH1_DIR, USB_PAD_CONFIG);
> +	mxc_request_iomux(MX51_PIN_USBH1_NXT, IOMUX_CONFIG_ALT0);
> +	mxc_iomux_set_pad(MX51_PIN_USBH1_NXT, USB_PAD_CONFIG);
> +
> +	mxc_request_iomux(MX51_PIN_USBH1_DATA0, IOMUX_CONFIG_ALT0);
> +	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA0, USB_PAD_CONFIG);
> +	mxc_request_iomux(MX51_PIN_USBH1_DATA1, IOMUX_CONFIG_ALT0);
> +	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA1, USB_PAD_CONFIG);
> +	mxc_request_iomux(MX51_PIN_USBH1_DATA2, IOMUX_CONFIG_ALT0);
> +	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA2, USB_PAD_CONFIG);
> +	mxc_request_iomux(MX51_PIN_USBH1_DATA3, IOMUX_CONFIG_ALT0);
> +	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA3, USB_PAD_CONFIG);
> +	mxc_request_iomux(MX51_PIN_USBH1_DATA4, IOMUX_CONFIG_ALT0);
> +	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA4, USB_PAD_CONFIG);
> +	mxc_request_iomux(MX51_PIN_USBH1_DATA5, IOMUX_CONFIG_ALT0);
> +	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA5, USB_PAD_CONFIG);
> +	mxc_request_iomux(MX51_PIN_USBH1_DATA6, IOMUX_CONFIG_ALT0);
> +	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA6, USB_PAD_CONFIG);
> +	mxc_request_iomux(MX51_PIN_USBH1_DATA7, IOMUX_CONFIG_ALT0);
> +	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA7, USB_PAD_CONFIG);
> +
> +	/*
> +	 * Configure USBH1 control pads
> +	 */
> +
> +	/* USB PHY reset */
> +	mxc_request_iomux(MX51_PIN_EIM_D27, IOMUX_CONFIG_ALT1);
> +	mxc_iomux_set_pad(MX51_PIN_EIM_D27, PAD_CTL_PKE_ENABLE |
> +			PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH);
> +
> +	/* USB HUB reset */
> +	mxc_request_iomux(MX51_PIN_GPIO1_5, IOMUX_CONFIG_ALT0);
> +	mxc_iomux_set_pad(MX51_PIN_GPIO1_5, PAD_CTL_PKE_ENABLE |
> +			PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH);
> +
> +
> +	if (machine_is_efikasb()) {
> +		/*
> +		 * Configure USBH2 pads (used on EfikaSB)
> +		 */
> +		/* USBH2_DATA */
> +		mxc_request_iomux(MX51_PIN_EIM_D16, IOMUX_CONFIG_ALT2);
> +		mxc_iomux_set_pad(MX51_PIN_EIM_D16, USB_PAD_CONFIG);
> +		mxc_request_iomux(MX51_PIN_EIM_D17, IOMUX_CONFIG_ALT2);
> +		mxc_iomux_set_pad(MX51_PIN_EIM_D17, USB_PAD_CONFIG);
> +		mxc_request_iomux(MX51_PIN_EIM_D18, IOMUX_CONFIG_ALT2);
> +		mxc_iomux_set_pad(MX51_PIN_EIM_D18, USB_PAD_CONFIG);
> +		mxc_request_iomux(MX51_PIN_EIM_D19, IOMUX_CONFIG_ALT2);
> +		mxc_iomux_set_pad(MX51_PIN_EIM_D19, USB_PAD_CONFIG);
> +		mxc_request_iomux(MX51_PIN_EIM_D20, IOMUX_CONFIG_ALT2);
> +		mxc_iomux_set_pad(MX51_PIN_EIM_D20, USB_PAD_CONFIG);
> +		mxc_request_iomux(MX51_PIN_EIM_D21, IOMUX_CONFIG_ALT2);
> +		mxc_iomux_set_pad(MX51_PIN_EIM_D21, USB_PAD_CONFIG);
> +		mxc_request_iomux(MX51_PIN_EIM_D22, IOMUX_CONFIG_ALT2);
> +		mxc_iomux_set_pad(MX51_PIN_EIM_D22, USB_PAD_CONFIG);
> +		mxc_request_iomux(MX51_PIN_EIM_D23, IOMUX_CONFIG_ALT2);
> +		mxc_iomux_set_pad(MX51_PIN_EIM_D23, USB_PAD_CONFIG);
> +
> +		/* USBH2_CLK */
> +		mxc_request_iomux(MX51_PIN_EIM_A24, IOMUX_CONFIG_ALT2);
> +		mxc_iomux_set_pad(MX51_PIN_EIM_A24, USB_PAD_CONFIG);
> +		/* USBH2_DIR */
> +		mxc_request_iomux(MX51_PIN_EIM_A25, IOMUX_CONFIG_ALT2);
> +		mxc_iomux_set_pad(MX51_PIN_EIM_A25, USB_PAD_CONFIG);
> +		/* USBH2_STP */
> +		mxc_request_iomux(MX51_PIN_EIM_A26, IOMUX_CONFIG_ALT2);
> +		mxc_iomux_set_pad(MX51_PIN_EIM_A26, USB_PAD_CONFIG);
> +		/* USBH2_NXT */
> +		mxc_request_iomux(MX51_PIN_EIM_A27, IOMUX_CONFIG_ALT2);
> +		mxc_iomux_set_pad(MX51_PIN_EIM_A27, USB_PAD_CONFIG);
> +	}
> +
> +	/* WIFI EN (act low) */
> +	mxc_request_iomux(MX51_PIN_EIM_A22, IOMUX_CONFIG_GPIO);
> +	mxc_iomux_set_pad(MX51_PIN_EIM_A22, 0);
> +	/* WIFI RESET */
> +	mxc_request_iomux(MX51_PIN_EIM_A16, IOMUX_CONFIG_GPIO);
> +	mxc_iomux_set_pad(MX51_PIN_EIM_A16, 0);
> +	/* BT EN (act low) */
> +	mxc_request_iomux(MX51_PIN_EIM_A17, IOMUX_CONFIG_GPIO);
> +	mxc_iomux_set_pad(MX51_PIN_EIM_A17, 0);
> +}
> +
> +/*
> + * Enable devices connected to USB buses.
> + */
> +void efika_usb_enable_devices(void)
> +{
> +	/* Enable Bluetooth */
> +	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A17), 0);
> +	udelay(10000);
> +	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A17), 1);
> +
> +	/* Enable WiFi */
> +	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A22), 1);
> +	udelay(10000);
> +
> +	/* Reset the WiFi chip */
> +	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A16), 0);
> +	udelay(10000);
> +	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A16), 1);
> +}
> +
> +/*
> + * Reset USB HUB (or HUBs on EfikaSB).
> + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
> + */
> +void efika_usb_hub_reset(void)
> +{
> +	/* HUB reset */
> +	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 1);
> +	udelay(1000);
> +	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 0);
> +	udelay(1000);
> +	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 1);
> +}
> +
> +/*
> + * Reset USB PHY (or PHYs on EfikaSB).
> + */
> +void efika_usb_phy_reset(void)
> +{
> +	/* SMSC 3317 PHY reset */
> +	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_D27), 0);
> +	udelay(1000);
> +	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_D27), 1);
> +}
> +
> +/*
> + * Configure control registers of the USB controller.
> + */
> +void control_regs_setup(struct mx5_usb_control_regs *control)
> +{
> +	clrsetbits_le32(&control->usbctrl,
> +		(MXC_OTG_WUE | MXC_OTG_PM | MX51_H1_ULPI_IE | MX51_H1_WUE),
> +		MX51_H1_PM);
> +
> +	clrsetbits_le32(&control->phyctrl0,
> +			MX51_OTG_OVERCURD,
> +			MX51_EHCI_POWERPINSE);
> +
> +	clrsetbits_le32(&control->phyctrl1,
> +			MX51_SYSCLOCK_MASK,
> +			MX51_SYSCLOCK_24_MHZ);
> +
> +	setbits_le32(&control->usbctrl1, MX51_H1_EXTCLKE);
> +
> +	clrsetbits_le32(&control->uh2ctrl,
> +			(MX51_H2_ULPI_IE | MX51_H2_WUE),
> +			MX51_H2_PM);
> +
> +	udelay(10000);
> +}

Is this function also board specific?

> +
> +void ulpi_set_flags(u32 ulpi_viewport, struct ulpi_regs *ulpi)
> +{
> +	ulpi_otg_ctrl_flags(ulpi_viewport, ulpi, ULPI_WRITE, ULPI_OTG_EXTVBUSIND |
> +		ULPI_OTG_DM_PULLDOWN | ULPI_OTG_DP_PULLDOWN);
> +	ulpi_function_ctrl_flags(ulpi_viewport, ulpi, ULPI_WRITE, ULPI_FC_XCVRSEL |
> +		ULPI_FC_OPMODE_NORMAL | ULPI_FC_SUSPENDM);
> +	ulpi_iface_ctrl_flags(ulpi_viewport, ulpi, ULPI_WRITE, 0);
> +
> +	/*
> +	 * NOTE: Setting ULPI_OTG_CHRGVBUS violates USB specification,
> +	 * but otherwise, USB on Efika doesn't charge VBUS
> +	 * and as a result, USB doesn't work.
> +	 */
> +	ulpi_otg_ctrl_flags(ulpi_viewport, ulpi, ULPI_SET, ULPI_OTG_DRVVBUS |
> +		ULPI_OTG_DRVVBUS_EXT | ULPI_OTG_CHRGVBUS);
> +}
> +
> +/*
> + * Solve the VBUS reset problem on Efika
> + * by setting the CHRG_VBUS bit in the reset.
> + */
> +void ehci_fixup(uint32_t *status_reg, uint32_t *reg_ref)
> +{
> +	struct usb_ehci *ehci = (struct usb_ehci *)(OTG_BASE_ADDR +
> +		MX51_REGISTER_LAYOUT_LENGTH);
> +	struct ulpi_regs *ulpi = (struct ulpi_regs *)0;
> +
> +	u32 tmp = ulpi_read((u32)&ehci->ulpi_viewport, (u32)&ulpi->otg_ctrl);
> +	tmp |= ULPI_OTG_CHRGVBUS;
> +	ulpi_write((u32)&ehci->ulpi_viewport, (u32)&ulpi->otg_ctrl, tmp);
> +
> +	/* USB 2.0 specification say 50 ms resets on root. */
> +	wait_ms(50);
> +
> +	/* Now terminate the reset. */
> +	*reg_ref = ehci_readl(status_reg);
> +	*reg_ref |= EHCI_PS_PE;
> +}
> +
> +void ehci0_init(struct usb_ehci *ehci)
> +{
> +	writel(MX51_16BIT_UTMI, &ehci->portsc);
> +}
> +
> +void ehci1_init(struct usb_ehci *ehci, struct ulpi_regs *ulpi)
> +{
> +	mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT2);
> +	mxc_iomux_set_pad(MX51_PIN_USBH1_STP, PAD_CTL_DRV_HIGH |
> +				PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST);
> +	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_USBH1_STP), 0);
> +	udelay(1000);
> +	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_USBH1_STP), 1);
> +	udelay(1000);
> +
> +	mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT0);
> +	mxc_iomux_set_pad(MX51_PIN_USBH1_STP, USB_PAD_CONFIG);
> +	udelay(10000);
> +
> +	clrbits_le32(&ehci->usbcmd, MX51_ITC_IMMEDIATE_MASK);
> +	udelay(10000);
> +
> +	writel(MX51_ULPI_MODE_MASK, &ehci->portsc);
> +	udelay(10000);
> +
> +	ulpi_init((u32)&ehci->ulpi_viewport, ulpi);
> +	ulpi_set_flags((u32)&ehci->ulpi_viewport, ulpi);
> +}
> +
> +void ehci2_init(struct usb_ehci *ehci, struct ulpi_regs *ulpi)
> +{
> +	mxc_request_iomux(MX51_PIN_EIM_A26, IOMUX_CONFIG_ALT1);
> +	mxc_iomux_set_pad(MX51_PIN_EIM_A26, PAD_CTL_DRV_HIGH |
> +				PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST);
> +	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A26), 0);
> +	udelay(1000);
> +	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A26), 1);
> +	udelay(1000);
> +
> +	mxc_request_iomux(MX51_PIN_EIM_A26, IOMUX_CONFIG_ALT2);
> +	mxc_iomux_set_pad(MX51_PIN_EIM_A26, USB_PAD_CONFIG);
> +
> +	writel(MX51_ULPI_MODE_MASK, &ehci->portsc);
> +	udelay(10000);
> +
> +	ulpi_init((u32)&ehci->ulpi_viewport, ulpi);
> +	ulpi_set_flags((u32)&ehci->ulpi_viewport, ulpi);
> +}

The above two functions (ehcix_init()) look very similar,
can't those be consolidated?

> +
> +int ehci_hcd_init(void)
> +{
> +	struct usb_ehci *ehci;
> +	struct mx5_usb_control_regs *mx5_usb_control_regs;
> +	struct ulpi_regs *ulpi;
> +
> +	mx5_usb_control_regs = (struct mx5_usb_control_regs *)(OTG_BASE_ADDR +
> +		 MX5_CTRL_REGS_OFFSET);
> +	control_regs_setup(mx5_usb_control_regs);
> +	ulpi = (struct ulpi_regs *)0;
> +
> +	/* Init EHCI core */
> +	ehci = (struct usb_ehci *)(OTG_BASE_ADDR +
> +		(MX51_REGISTER_LAYOUT_LENGTH * CONFIG_MXC_USB_PORT));
> +	hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
> +	hcor = (struct ehci_hcor *)((uint32_t) hccr +
> +			HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
> +	setbits_le32(&ehci->usbmode, CM_HOST);
> +	setbits_le32(&ehci->control, USB_EN);
> +
> +	/* Init iMX51 EHCI */
> +	efika_usb_phy_reset();
> +	efika_usb_hub_reset();
> +	efika_usb_enable_devices();
> +
> +	switch (CONFIG_MXC_USB_PORT) {
> +	case 0:
> +		ehci0_init(ehci);
> +		break;
> +	case 1:
> +		ehci1_init(ehci, ulpi);
> +		break;
> +	case 2:
> +		if (machine_is_efikasb())
> +			ehci2_init(ehci, ulpi);
> +		break;
> +	};
> +
> +	/* EfikaMX USB has issues ... */
> +	udelay(10000);
> +
> +	return 0;
> +}

This function mixes board specific with SoC specific initializations.

> +
> +int ehci_hcd_stop(void)
> +{
> +	return 0;
> +}

Don't you want to do anything here? I don't mind, but...

> diff --git a/board/efikamx/efikamx.c b/board/efikamx/efikamx.c
> index 0c4e24b..8e9b42b 100644
> --- a/board/efikamx/efikamx.c
> +++ b/board/efikamx/efikamx.c
> @@ -37,6 +37,8 @@
>  #include <fsl_pmic.h>
>  #include <mc13892.h>
>  
> +#include "efika.h"
> +
>  DECLARE_GLOBAL_DATA_PTR;
>  
>  /*
> @@ -678,6 +680,7 @@ int board_late_init(void)
>  
>  	setup_iomux_led();
>  	setup_iomux_ata();
> +	setup_iomux_usb();
>  
>  	efikamx_toggle_led(EFIKAMX_LED_BLUE);
>  
> diff --git a/include/configs/efikamx.h b/include/configs/efikamx.h
> index 54f48e4..1c48376 100644
> --- a/include/configs/efikamx.h
> +++ b/include/configs/efikamx.h
> @@ -44,6 +44,10 @@
>  
>  #define CONFIG_SYS_TEXT_BASE		0x97800000
>  
> +#define	CONFIG_L2_OFF
> +#define	CONFIG_SYS_ICACHE_OFF
> +#define	CONFIG_SYS_DCACHE_OFF
> +
>  /*
>   * Bootloader Components Configuration
>   */
> @@ -172,6 +176,20 @@
>  #endif
>  
>  /*
> + * USB
> + */
> +#define CONFIG_CMD_USB
> +#ifdef CONFIG_CMD_USB
> +#define CONFIG_USB_EHCI			/* Enable EHCI USB support */
> +#define CONFIG_MXC_USB_PORT	1
> +#define CONFIG_EHCI_IS_TDI
> +#define CONFIG_USB_STORAGE
> +#define CONFIG_USB_KEYBOARD
> +#define CONFIG_USB_ULPI
> +#define CONFIG_USB_ULPI_VIEWPORT

I think it will be useful to have CONFIG_USB_ULPI_TIMEOUT
option, so boards can easily override the default.

> +#endif /* CONFIG_CMD_USB */
> +
> +/*
>   * Filesystems
>   */
>  #ifdef CONFIG_CMD_FAT

-- 
Regards,
Igor.

[U-Boot] [PATCH v8 4/4] Add USB support for Efika

[Wolfgang Grandegger]

On 11/12/2011 06:45 PM, Jana Rapava wrote:
> This commit adds USB support for EfikaMX and EfikaSB.
> 
> Signed-off-by: Jana Rapava <fermata7@gmail.com>
> Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
> Cc: Remy Bohmer <linux@bohmer.net>
> Cc: Stefano Babic <sbabic@denx.de>
> Cc: Igor Grinberg <grinberg@compulab.co.il>
> Cc: Wolfgang Grandegger <wg@denx.de>
> 
> Acked-by: Marek Vasut <marek.vasut@gmail.com>
> ---
> Changes for v2:
>     - introduce temporary variable in ulpi_write
>     - whitespace changes
> Changes for v3:
>      - add protection against multiple inclusion of efika.h
> Changes for v4:
>       - rename multiple inclusion protection macro in efika.h
> Changes for v5:
>        - fix unterminated #ifndef in efika.h
> Changes for v6:
> 	- add Acked-by
> 	- no changes
> Changes for v7:
> 	- use ULPI-related definitions from ./include/usb/ulpi.h
> Changes for v8:
> 	- adjust to new and more generic ULPI implementation
> 
>  board/efikamx/Makefile      |    3 +
>  board/efikamx/efika.h       |   35 +++++
>  board/efikamx/efikamx-usb.c |  344 +++++++++++++++++++++++++++++++++++++++++++
>  board/efikamx/efikamx.c     |    3 +
>  include/configs/efikamx.h   |   18 +++
>  5 files changed, 403 insertions(+), 0 deletions(-)
>  create mode 100644 board/efikamx/efika.h
>  create mode 100644 board/efikamx/efikamx-usb.c
> 
...
> diff --git a/board/efikamx/efikamx-usb.c b/board/efikamx/efikamx-usb.c
> new file mode 100644
> index 0000000..cbcdb18
> --- /dev/null
> +++ b/board/efikamx/efikamx-usb.c
...
> +/*
> + * Configure control registers of the USB controller.
> + */
> +void control_regs_setup(struct mx5_usb_control_regs *control)
> +{
> +	clrsetbits_le32(&control->usbctrl,
> +		(MXC_OTG_WUE | MXC_OTG_PM | MX51_H1_ULPI_IE | MX51_H1_WUE),
> +		MX51_H1_PM);
> +
> +	clrsetbits_le32(&control->phyctrl0,
> +			MX51_OTG_OVERCURD,
> +			MX51_EHCI_POWERPINSE);
> +
> +	clrsetbits_le32(&control->phyctrl1,
> +			MX51_SYSCLOCK_MASK,
> +			MX51_SYSCLOCK_24_MHZ);
> +
> +	setbits_le32(&control->usbctrl1, MX51_H1_EXTCLKE);
> +
> +	clrsetbits_le32(&control->uh2ctrl,
> +			(MX51_H2_ULPI_IE | MX51_H2_WUE),
> +			MX51_H2_PM);
> +
> +	udelay(10000);
> +}
> +
> +void ulpi_set_flags(u32 ulpi_viewport, struct ulpi_regs *ulpi)
> +{
> +	ulpi_otg_ctrl_flags(ulpi_viewport, ulpi, ULPI_WRITE, ULPI_OTG_EXTVBUSIND |
> +		ULPI_OTG_DM_PULLDOWN | ULPI_OTG_DP_PULLDOWN);
> +	ulpi_function_ctrl_flags(ulpi_viewport, ulpi, ULPI_WRITE, ULPI_FC_XCVRSEL |
> +		ULPI_FC_OPMODE_NORMAL | ULPI_FC_SUSPENDM);
> +	ulpi_iface_ctrl_flags(ulpi_viewport, ulpi, ULPI_WRITE, 0);
> +
> +	/*
> +	 * NOTE: Setting ULPI_OTG_CHRGVBUS violates USB specification,
> +	 * but otherwise, USB on Efika doesn't charge VBUS
> +	 * and as a result, USB doesn't work.
> +	 */
> +	ulpi_otg_ctrl_flags(ulpi_viewport, ulpi, ULPI_SET, ULPI_OTG_DRVVBUS |
> +		ULPI_OTG_DRVVBUS_EXT | ULPI_OTG_CHRGVBUS);
> +}
> +
> +/*
> + * Solve the VBUS reset problem on Efika
> + * by setting the CHRG_VBUS bit in the reset.
> + */
> +void ehci_fixup(uint32_t *status_reg, uint32_t *reg_ref)
> +{
> +	struct usb_ehci *ehci = (struct usb_ehci *)(OTG_BASE_ADDR +
> +		MX51_REGISTER_LAYOUT_LENGTH);
> +	struct ulpi_regs *ulpi = (struct ulpi_regs *)0;
> +
> +	u32 tmp = ulpi_read((u32)&ehci->ulpi_viewport, (u32)&ulpi->otg_ctrl);
> +	tmp |= ULPI_OTG_CHRGVBUS;
> +	ulpi_write((u32)&ehci->ulpi_viewport, (u32)&ulpi->otg_ctrl, tmp);
> +
> +	/* USB 2.0 specification say 50 ms resets on root. */
> +	wait_ms(50);
> +
> +	/* Now terminate the reset. */
> +	*reg_ref = ehci_readl(status_reg);
> +	*reg_ref |= EHCI_PS_PE;
> +}
> +
> +void ehci0_init(struct usb_ehci *ehci)
> +{
> +	writel(MX51_16BIT_UTMI, &ehci->portsc);
> +}
> +
> +void ehci1_init(struct usb_ehci *ehci, struct ulpi_regs *ulpi)
> +{
> +	mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT2);
> +	mxc_iomux_set_pad(MX51_PIN_USBH1_STP, PAD_CTL_DRV_HIGH |
> +				PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST);
> +	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_USBH1_STP), 0);
> +	udelay(1000);
> +	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_USBH1_STP), 1);
> +	udelay(1000);
> +
> +	mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT0);
> +	mxc_iomux_set_pad(MX51_PIN_USBH1_STP, USB_PAD_CONFIG);
> +	udelay(10000);
> +
> +	clrbits_le32(&ehci->usbcmd, MX51_ITC_IMMEDIATE_MASK);
> +	udelay(10000);
> +
> +	writel(MX51_ULPI_MODE_MASK, &ehci->portsc);
> +	udelay(10000);
> +
> +	ulpi_init((u32)&ehci->ulpi_viewport, ulpi);
> +	ulpi_set_flags((u32)&ehci->ulpi_viewport, ulpi);
> +}
> +
> +void ehci2_init(struct usb_ehci *ehci, struct ulpi_regs *ulpi)
> +{
> +	mxc_request_iomux(MX51_PIN_EIM_A26, IOMUX_CONFIG_ALT1);
> +	mxc_iomux_set_pad(MX51_PIN_EIM_A26, PAD_CTL_DRV_HIGH |
> +				PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST);
> +	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A26), 0);
> +	udelay(1000);
> +	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A26), 1);
> +	udelay(1000);
> +
> +	mxc_request_iomux(MX51_PIN_EIM_A26, IOMUX_CONFIG_ALT2);
> +	mxc_iomux_set_pad(MX51_PIN_EIM_A26, USB_PAD_CONFIG);
> +
> +	writel(MX51_ULPI_MODE_MASK, &ehci->portsc);
> +	udelay(10000);
> +
> +	ulpi_init((u32)&ehci->ulpi_viewport, ulpi);
> +	ulpi_set_flags((u32)&ehci->ulpi_viewport, ulpi);
> +}
> +
> +int ehci_hcd_init(void)
> +{
> +	struct usb_ehci *ehci;
> +	struct mx5_usb_control_regs *mx5_usb_control_regs;
> +	struct ulpi_regs *ulpi;
> +
> +	mx5_usb_control_regs = (struct mx5_usb_control_regs *)(OTG_BASE_ADDR +
> +		 MX5_CTRL_REGS_OFFSET);
> +	control_regs_setup(mx5_usb_control_regs);
> +	ulpi = (struct ulpi_regs *)0;
> +
> +	/* Init EHCI core */
> +	ehci = (struct usb_ehci *)(OTG_BASE_ADDR +
> +		(MX51_REGISTER_LAYOUT_LENGTH * CONFIG_MXC_USB_PORT));
> +	hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
> +	hcor = (struct ehci_hcor *)((uint32_t) hccr +
> +			HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
> +	setbits_le32(&ehci->usbmode, CM_HOST);
> +	setbits_le32(&ehci->control, USB_EN);
> +
> +	/* Init iMX51 EHCI */
> +	efika_usb_phy_reset();
> +	efika_usb_hub_reset();
> +	efika_usb_enable_devices();
> +
> +	switch (CONFIG_MXC_USB_PORT) {
> +	case 0:
> +		ehci0_init(ehci);
> +		break;
> +	case 1:
> +		ehci1_init(ehci, ulpi);
> +		break;
> +	case 2:
> +		if (machine_is_efikasb())
> +			ehci2_init(ehci, ulpi);
> +		break;
> +	};
> +
> +	/* EfikaMX USB has issues ... */
> +	udelay(10000);
> +
> +	return 0;
> +}
> +
> +int ehci_hcd_stop(void)
> +{
> +	return 0;
> +}

We should share part of the code above, similar to
drivers/usb/ehci-mxc.c. The board specific code could then be put in
board_ehci_hcd_init().

> diff --git a/board/efikamx/efikamx.c b/board/efikamx/efikamx.c
> index 0c4e24b..8e9b42b 100644
> --- a/board/efikamx/efikamx.c
> +++ b/board/efikamx/efikamx.c
> @@ -37,6 +37,8 @@
>  #include <fsl_pmic.h>
>  #include <mc13892.h>
>  
> +#include "efika.h"
> +
>  DECLARE_GLOBAL_DATA_PTR;
>  
>  /*
> @@ -678,6 +680,7 @@ int board_late_init(void)
>  
>  	setup_iomux_led();
>  	setup_iomux_ata();
> +	setup_iomux_usb();
>  
>  	efikamx_toggle_led(EFIKAMX_LED_BLUE);
>  
> diff --git a/include/configs/efikamx.h b/include/configs/efikamx.h
> index 54f48e4..1c48376 100644
> --- a/include/configs/efikamx.h
> +++ b/include/configs/efikamx.h
> @@ -44,6 +44,10 @@
>  
>  #define CONFIG_SYS_TEXT_BASE		0x97800000
>  
> +#define	CONFIG_L2_OFF
> +#define	CONFIG_SYS_ICACHE_OFF
> +#define	CONFIG_SYS_DCACHE_OFF
> +
>  /*
>   * Bootloader Components Configuration
>   */
> @@ -172,6 +176,20 @@
>  #endif
>  
>  /*
> + * USB
> + */
> +#define CONFIG_CMD_USB
> +#ifdef CONFIG_CMD_USB
> +#define CONFIG_USB_EHCI			/* Enable EHCI USB support */
> +#define CONFIG_MXC_USB_PORT	1

The other related option should then be used as well.

> +#define CONFIG_EHCI_IS_TDI
> +#define CONFIG_USB_STORAGE
> +#define CONFIG_USB_KEYBOARD
> +#define CONFIG_USB_ULPI
> +#define CONFIG_USB_ULPI_VIEWPORT
> +#endif /* CONFIG_CMD_USB */
> +
> +/*
>   * Filesystems
>   */
>  #ifdef CONFIG_CMD_FAT


Wolfgang.

[U-Boot] [PATCH v8 4/4] Add USB support for Efika

[Marek Vasut]

> On 11/12/2011 06:45 PM, Jana Rapava wrote:
> > This commit adds USB support for EfikaMX and EfikaSB.
> > 
> > Signed-off-by: Jana Rapava <fermata7@gmail.com>
> > Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
> > Cc: Remy Bohmer <linux@bohmer.net>
> > Cc: Stefano Babic <sbabic@denx.de>
> > Cc: Igor Grinberg <grinberg@compulab.co.il>
> > Cc: Wolfgang Grandegger <wg@denx.de>
> > 
> > Acked-by: Marek Vasut <marek.vasut@gmail.com>

Ok, I think I've had just about enough of this damn shit going on here. I see no 
updates, no progress, nothing. Basically, I dropped these patches from my tree 
and applied the old ones from my reflog. I think there was about enough time to 
get the patches into shape (3 months, maybe more).

Wolfgang, let's get a merge between your work and mine, shall we? I'll have 
something ready about tomorrow or so. This is high-prio for me now. btw. if you 
use Jabber, can you please PM me your jabber ID?

Also, there's a problem with Remy now, is he around at all? I see a few USB 
patches hoarding in his mailbox with no reply whatsoever. Anyone has any idea 
what's with him?

M

[U-Boot] [PATCH v8 4/4] Add USB support for Efika

[Jana Rapava]

2011/11/24 Marek Vasut <marek.vasut@gmail.com>

> > On 11/12/2011 06:45 PM, Jana Rapava wrote:
> > > This commit adds USB support for EfikaMX and EfikaSB.
> > >
> > > Signed-off-by: Jana Rapava <fermata7@gmail.com>
> > > Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
> > > Cc: Remy Bohmer <linux@bohmer.net>
> > > Cc: Stefano Babic <sbabic@denx.de>
> > > Cc: Igor Grinberg <grinberg@compulab.co.il>
> > > Cc: Wolfgang Grandegger <wg@denx.de>
> > >
> > > Acked-by: Marek Vasut <marek.vasut@gmail.com>
>
> Ok, I think I've had just about enough of this damn shit going on here. I
> see no
> updates, no progress, nothing. Basically, I dropped these patches from my
> tree
> and applied the old ones from my reflog. I think there was about enough
> time to
> get the patches into shape (3 months, maybe more).
>

Ok, I'm really stuck with this stuff (I haven't any idea how to split this
patch into general and board-specific code how was demanded), so your
suggestion is probably a better way how to do it.
I finally have something which I consider a usable version of ULPI support
patch, so I'll post it today and you can use it if you want.

Regards,
Jana Rapava

[U-Boot] [PATCH 0/4] Move ehci headers, add Efika USB support

[Marek Vasut]

On Thursday, September 29, 2011 01:52:47 AM Jana Rapava wrote:
> This patchset moves header files ehci.h and ehci-core.h
> from drivers/usb/host/ to /include/usb and adds USB support for Efika
> with cleanup of file /drivers/usb/host/ehci-mxc.c.
> 
> In the previous revisions I messed up versioning and some From: and
> In-Reply-To: headers, so I want to bury this mess and start with a clean
> plate. Version of patches in this patchset will then be 1.
> 
> Fabio Estevam (1):
>   usb: Move ehci.h and ehci-core.h to include/usb directory
> 
> Jana Rapava (3):
>   EHCI: add callback ehci_fixup
>   EHCI: adjust for mx5
>   Add USB support for Efika
> 
>  board/efikamx/Makefile           |    3 +
>  board/efikamx/efika.h            |   30 +++
>  board/efikamx/efikamx-usb.c      |  420
> ++++++++++++++++++++++++++++++++++++++ board/efikamx/efikamx.c          | 
>   3 +
>  drivers/usb/host/ehci-core.h     |   29 ---
>  drivers/usb/host/ehci-fsl.c      |    4 +-
>  drivers/usb/host/ehci-hcd.c      |   16 ++-
>  drivers/usb/host/ehci-ixp4xx.c   |    4 +-
>  drivers/usb/host/ehci-kirkwood.c |    4 +-
>  drivers/usb/host/ehci-mpc512x.c  |    4 +-
>  drivers/usb/host/ehci-mxc.c      |   35 +---
>  drivers/usb/host/ehci-pci.c      |    4 +-
>  drivers/usb/host/ehci-ppc4xx.c   |    4 +-
>  drivers/usb/host/ehci-vct.c      |    4 +-
>  drivers/usb/host/ehci.h          |  203 ------------------
>  include/configs/efikamx.h        |   16 ++
>  include/usb/ehci-core.h          |   29 +++
>  include/usb/ehci-fsl.h           |  146 +++++++++++++-
>  include/usb/ehci.h               |  203 ++++++++++++++++++
>  19 files changed, 882 insertions(+), 279 deletions(-)
>  create mode 100644 board/efikamx/efika.h
>  create mode 100644 board/efikamx/efikamx-usb.c
>  delete mode 100644 drivers/usb/host/ehci-core.h
>  delete mode 100644 drivers/usb/host/ehci.h
>  create mode 100644 include/usb/ehci-core.h
>  create mode 100644 include/usb/ehci.h

You actually didn't Cc anyone in here ... please be more careful next time.

[U-Boot] [PATCH v2 0/4] Move ehci headers, add Efika USB support

[Jana Rapava]

This patchset moves header files ehci.h and ehci-core.h 
from drivers/usb/host/ to /include/usb and adds USB support for Efika
with cleanup of file /drivers/usb/host/ehci-mxc.c.

In the previous revisions I messed up versioning and some From: and
In-Reply-To: headers, so I want to bury this mess and start with a clean
plate. Version of patches in this patchset will then be 1.

Changes for v2:
	- no changes, I only forget to add Cc: when I sent this

Fabio Estevam (1):
  usb: Move ehci.h and ehci-core.h to include/usb directory

Jana Rapava (3):
  EHCI: add callback ehci_fixup
  EHCI: adjust for mx5
  Add USB support for Efika

 board/efikamx/Makefile           |    3 +
 board/efikamx/efika.h            |   30 +++
 board/efikamx/efikamx-usb.c      |  420 ++++++++++++++++++++++++++++++++++++++
 board/efikamx/efikamx.c          |    3 +
 drivers/usb/host/ehci-core.h     |   29 ---
 drivers/usb/host/ehci-fsl.c      |    4 +-
 drivers/usb/host/ehci-hcd.c      |   16 ++-
 drivers/usb/host/ehci-ixp4xx.c   |    4 +-
 drivers/usb/host/ehci-kirkwood.c |    4 +-
 drivers/usb/host/ehci-mpc512x.c  |    4 +-
 drivers/usb/host/ehci-mxc.c      |   35 +---
 drivers/usb/host/ehci-pci.c      |    4 +-
 drivers/usb/host/ehci-ppc4xx.c   |    4 +-
 drivers/usb/host/ehci-vct.c      |    4 +-
 drivers/usb/host/ehci.h          |  203 ------------------
 include/configs/efikamx.h        |   16 ++
 include/usb/ehci-core.h          |   29 +++
 include/usb/ehci-fsl.h           |  146 +++++++++++++-
 include/usb/ehci.h               |  203 ++++++++++++++++++
 19 files changed, 882 insertions(+), 279 deletions(-)
 create mode 100644 board/efikamx/efika.h
 create mode 100644 board/efikamx/efikamx-usb.c
 delete mode 100644 drivers/usb/host/ehci-core.h
 delete mode 100644 drivers/usb/host/ehci.h
 create mode 100644 include/usb/ehci-core.h
 create mode 100644 include/usb/ehci.h

-- 
1.7.6.3

[U-Boot] [PATCH v8 3/4] EHCI: adjust for mx5

[Jana Rapava]

Add macros and structures needed by Efika USB support code.
Move shared offset and bits definitions into common header file.

Signed-off-by: Jana Rapava <fermata7@gmail.com>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Stefano Babic <sbabic@denx.de>
---
Changes for v1:
   - split into patchset
Changes for v2:
     - make this the third patch in series
     - move all #define's from ehci-mxc.c to ehci-fsl.h
     - rename structures
Changes for v3:
      - rebase on top of u-boot-imx/next
       (no actual changes)
Changes for v4:
       - no changes
       - change changelog versioning from per patchset to per patch
Changes for v5:
	- whitespace changes (no actual changes)

 drivers/usb/host/ehci-mxc.c |   31 +--------
 include/usb/ehci-fsl.h      |  146 ++++++++++++++++++++++++++++++++++++++++++-
 2 files changed, 148 insertions(+), 29 deletions(-)

diff --git a/drivers/usb/host/ehci-mxc.c b/drivers/usb/host/ehci-mxc.c
index fde1f0f..2c1295f 100644
--- a/drivers/usb/host/ehci-mxc.c
+++ b/drivers/usb/host/ehci-mxc.c
@@ -27,31 +27,6 @@
 #include <usb/ehci.h>
 #include <usb/ehci-core.h>
 
-#define USBCTRL_OTGBASE_OFFSET	0x600
-
-#ifdef CONFIG_MX25
-#define MX25_USB_CTRL_IP_PUE_DOWN_BIT	(1<<6)
-#define MX25_USB_CTRL_HSTD_BIT		(1<<5)
-#define MX25_USB_CTRL_USBTE_BIT		(1<<4)
-#define MX25_USB_CTRL_OCPOL_OTG_BIT	(1<<3)
-#endif
-
-#ifdef CONFIG_MX31
-#define MX31_OTG_SIC_SHIFT	29
-#define MX31_OTG_SIC_MASK	(0x3 << MX31_OTG_SIC_SHIFT)
-#define MX31_OTG_PM_BIT		(1 << 24)
-
-#define MX31_H2_SIC_SHIFT	21
-#define MX31_H2_SIC_MASK	(0x3 << MX31_H2_SIC_SHIFT)
-#define MX31_H2_PM_BIT		(1 << 16)
-#define MX31_H2_DT_BIT		(1 << 5)
-
-#define MX31_H1_SIC_SHIFT	13
-#define MX31_H1_SIC_MASK	(0x3 << MX31_H1_SIC_SHIFT)
-#define MX31_H1_PM_BIT		(1 << 8)
-#define MX31_H1_DT_BIT		(1 << 4)
-#endif
-
 static int mxc_set_usbcontrol(int port, unsigned int flags)
 {
 	unsigned int v;
@@ -66,11 +41,11 @@ static int mxc_set_usbcontrol(int port, unsigned int flags)
 
 		switch (port) {
 		case 0:	/* OTG port */
-			v &= ~(MX31_OTG_SIC_MASK | MX31_OTG_PM_BIT);
+			v &= ~(MXC_OTG_SIC_MASK | MXC_OTG_PM_BIT);
 			v |= (flags & MXC_EHCI_INTERFACE_MASK)
-					<< MX31_OTG_SIC_SHIFT;
+					<< MXC_OTG_SIC_SHIFT;
 			if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
-				v |= MX31_OTG_PM_BIT;
+				v |= MXC_OTG_PM_BIT;
 
 			break;
 		case 1: /* H1 port */
diff --git a/include/usb/ehci-fsl.h b/include/usb/ehci-fsl.h
index 67600ed..727134f 100644
--- a/include/usb/ehci-fsl.h
+++ b/include/usb/ehci-fsl.h
@@ -169,6 +169,106 @@
 #define CONFIG_SYS_FSL_USB_ADDR CONFIG_SYS_MPC512x_USB_ADDR
 #endif
 
+#if defined(CONFIG_MX25) || defined(CONFIG_MX31)
+#define USBCTRL_OTGBASE_OFFSET	0x600
+#endif
+
+#ifdef CONFIG_MX25
+#define MX25_USB_CTRL_IP_PUE_DOWN_BIT	(1<<6)
+#define MX25_USB_CTRL_HSTD_BIT		(1<<5)
+#define MX25_USB_CTRL_USBTE_BIT	(1<<4)
+#define MX25_USB_CTRL_OCPOL_OTG_BIT	(1<<3)
+#endif
+
+#ifdef CONFIG_MX31
+#define MX31_H2_SIC_SHIFT	21
+#define MX31_H2_SIC_MASK	(0x3 << MX31_H2_SIC_SHIFT)
+#define MX31_H2_PM_BIT		(1 << 16)
+#define MX31_H2_DT_BIT		(1 << 5)
+
+#define MX31_H1_SIC_SHIFT	13
+#define MX31_H1_SIC_MASK	(0x3 << MX31_H1_SIC_SHIFT)
+#define MX31_H1_PM_BIT		(1 << 8)
+#define MX31_H1_DT_BIT		(1 << 4)
+#endif
+
+#if defined(CONFIG_MX51) || defined(CONFIG_MX53)
+/* offset for first USB CTRL register */
+#define MX5_CTRL_REGS_OFFSET	0x800
+#endif
+
+#if defined(CONFIG_MX51) || defined(CONFIG_MX31)
+/* USB_CTRL register bits of interest*/
+#define MXC_OTG_SIC_SHIFT	29
+#define MXC_OTG_SIC_MASK	(0x3 << MX31_OTG_SIC_SHIFT)
+#define MXC_OTG_WUE		(1 << 27)
+#define MXC_OTG_PM		(1 << 24)
+#endif
+
+#ifdef CONFIG_MX51
+#define MX51_REGISTER_LAYOUT_LENGTH	0x200
+
+/* Register offsets for MX51 */
+#define MX51_OTG_ID	0x000
+#define MX51_UH1_ID	0x200
+#define MX51_UH2_ID	0x400
+
+/* USB_CTRL register bits of interest*/
+#define MX51_OTG_PM		(1 << 24)
+#define MX51_H1_ULPI_IE	(1 << 12)
+#define MX51_H1_WUE		(1 << 11)
+#define MX51_H1_PM		(1 << 8)
+
+/* PHY_CTRL_0 register bits of interest */
+#define MX51_OTG_OVERCURD	(1 << 8)
+#define MX51_EHCI_POWERPINSE	(1 << 5)
+
+/* PHY_CTRL_1 register bits of interest */
+#define MX51_SYSCLOCK_24_MHZ	(1 << 0)
+#define MX51_SYSCLOCK_MASK	(~(0xffffffff << 2))
+
+/* USB_CTRL_1 register bits of interest */
+#define MX51_H1_EXTCLKE	(1 << 25)
+
+/* USB Host 2 CTRL register bits of interest */
+#define MX51_H2_ULPI_IE	(1 << 8)
+#define MX51_H2_WUE		(1 << 7)
+#define MX51_H2_PM		(1 << 4)
+
+/* PORTSCx bits of interest */
+#define MX51_ULPI_MODE_MASK	(2 << 30)
+#define MX51_16BIT_UTMI	(1 << 28)
+
+/* USBCMD bits of interest */
+#define MX51_ITC_IMMEDIATE_MASK	(0xff << 16)
+#endif
+
+/*
+* ULPI
+*/
+#define ULPI_ID_REGS_COUNT	4
+#define ULPI_TEST_VALUE	0x55
+#define ULPI_TIMEOUT		1000 /* some reasonable value */
+
+/* ULPI viewport control bits */
+#define ULPI_WU	(1 << 31)
+#define ULPI_SS	(1 << 27)
+#define ULPI_RWRUN	(1 << 30)
+#define ULPI_RWCTRL	(1 << 29)
+
+/* ULPI OTG Control bits of interest */
+#define ULPI_OTG_EXT_VBUS_IND	(1 << 7)
+#define ULPI_OTG_DM_PULLDOWN	(1 << 2)
+#define ULPI_OTG_DP_PULLDOWN	(1 << 1)
+#define ULPI_OTG_DRV_VBUS	(1 << 5)
+#define ULPI_OTG_DRV_VBUS_EXT	(1 << 6)
+#define ULPI_OTG_CHRG_VBUS	(1 << 4)
+
+/* ULPI Function Control bits of interest */
+#define ULPI_FC_XCVR_SELECT	(1 << 0)
+#define ULPI_FC_OPMODE_NORMAL	(0 << 3)
+#define ULPI_FC_SUSPENDM_PWRED	(1 << 6)
+
 /*
  * USB Registers
  */
@@ -210,7 +310,7 @@ struct usb_ehci {
 	u32	txfilltuning;	/* 0x164 - Host TT Transmit
 					   pre-buffer packet tuning */
 	u8	res7[0x8];
-	u32	ulpi_viewpoint;	/* 0x170 - ULPI Reister Access */
+	u32	ulpi_viewpoint;	/* 0x170 - ULPI Register Access */
 	u8	res8[0xc];
 	u32	config_flag;	/* 0x180 - Configured Flag Register */
 	u32	portsc;		/* 0x184 - Port status/control */
@@ -242,4 +342,48 @@ struct usb_ehci {
 	u8	res13[0xafc];
 };
 
+struct mx5_usb_control_regs {
+	u32	usbctrl;	/* 0x800 - USB Control */
+	u32	otgmirror;	/* 0x804 - OTG Port Mirror */
+	u32	phyctrl0;	/* 0x808 - UTMI PHY Control Register 0 */
+	u32	phyctrl1;	/* 0x80C - UTMI PHY Control Register 1 */
+	u32	usbctrl1;	/* 0x810 - USB Control Register 1 */
+	u32	uh2ctrl;	/* 0x814 - USB Host2 Control */
+	u32	uh3ctrl;	/* 0x818 - USB Host3 Control */
+};
+
+struct mxc_ulpi_regs {
+	u8	vendor_id_low;		/* 0x00 - Vendor ID lower byte */
+	u8	vendor_id_high;		/* 0x01 - Vendor ID upper byte */
+	u8	product_id_low;		/* 0x02 - Product ID lower byte */
+	u8	product_id_high;	/* 0x03 - Product ID higher byte */
+	/* Function Control; 0x04 - 0x06 Read, 0x04 Write */
+	u8	function_ctrl_write;
+	u8	function_ctrl_set;	/* 0x05 Set */
+	u8	function_ctrl_clear;	/* 0x06 Clear */
+	/* Interface Control; 0x07 - 0x09 Read, 0x07 Write */
+	u8	iface_ctrl_write;
+	u8	iface_ctrl_set;		/* 0x08 Set */
+	u8	iface_ctrl_clear;	/* 0x09 Clear */
+	/* OTG Control; 0x0A - 0x0C Read, 0x0A Write */
+	u8	otg_ctrl_write;
+	u8	otg_ctrl_set;		/* 0x0B Set */
+	u8	otg_ctrl_clear;		/* 0x0C Clear */
+	/* USB Interrupt Enable Rising; 0x0D - 0x0F Read, 0x0D Write */
+	u8	usb_ie_rising_write;
+	u8	usb_ie_rising_set;	/* 0x0E Set */
+	u8	usb_ie_rising_clear;	/* 0x0F Clear */
+	/* USB Interrupt Enable Falling; 0x10 - 0x12 Read, 0x10 Write */
+	u8	usb_ie_falling_write;
+	u8	usb_ie_falling_set;	/* 0x11 Set */
+	u8	usb_ie_falling_clear;	/* 0x12 Clear */
+	u8	usb_int_status;		/* 0x13 - USB Interrupt Status */
+	u8	usb_int_latch;		/* 0x14 - USB Interrupt Latch */
+	u8	debug;			/* 0x15 - Debug */
+	/* Scratch Register; 0x16 - 0x18 Read, 0x16 Write */
+	u8	scratch_write;
+	u8	scratch_set;		/* 0x17 Set */
+	u8	scratch_clear;		/* 0x18 Clear*/
+};
+
 #endif /* _EHCI_FSL_H */
-- 
1.7.6.3

[U-Boot] [PATCH v8 4/4] Add USB support for Efika

[Jana Rapava]

This commit adds USB support for EfikaMX and EfikaSB.

Signed-off-by: Jana Rapava <fermata7@gmail.com>
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Stefano Babic <sbabic@denx.de>
---
Changes for v2:
  - changed to proper patch
Changes for v3:
  - merged other USB patches from u-boot-pxa/efikasb
  - offset-based access changed to struct-based access
  - use {clrset,clr,set}bits_le32() calls
  - CodingStyle and naming cleanup
Changes for v4:
   - split into patchset
   - CodingStyle and naming cleanup
   - remove endless loops
   - silence compiler warnings
Changes for v5:
     - change order of arguments in ulpi* functions
     - change type of reg argument
     - rename offset macro
Changes for v6:
      - rebase on top of u-boot-imx/next
      - cleanup of CodingStyle and comments
      - use macro machine_is_efikasb()
      - introduce header file efika.h
Changes for v7:
       - add proper header to efika.h
       - include efika.h into efikamx.c
       - check return values from ulpi_wait()
Changes for v8:
	- change the return value of ulpi_wait()
	- CodingStyle cleanup
	- add proper header to efikamx-usb.c

 board/efikamx/Makefile      |    3 +
 board/efikamx/efika.h       |   30 +++
 board/efikamx/efikamx-usb.c |  420 +++++++++++++++++++++++++++++++++++++++++++
 board/efikamx/efikamx.c     |    3 +
 include/configs/efikamx.h   |   16 ++
 5 files changed, 472 insertions(+), 0 deletions(-)
 create mode 100644 board/efikamx/efika.h
 create mode 100644 board/efikamx/efikamx-usb.c

diff --git a/board/efikamx/Makefile b/board/efikamx/Makefile
index ee4a16e..860e4d2 100644
--- a/board/efikamx/Makefile
+++ b/board/efikamx/Makefile
@@ -28,6 +28,9 @@ include $(TOPDIR)/config.mk
 LIB	= $(obj)lib$(BOARD).o
 
 COBJS	:= efikamx.o
+ifdef	CONFIG_CMD_USB
+COBJS	+= efikamx-usb.o
+endif
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS))
diff --git a/board/efikamx/efika.h b/board/efikamx/efika.h
new file mode 100644
index 0000000..b3532e2
--- /dev/null
+++ b/board/efikamx/efika.h
@@ -0,0 +1,30 @@
+/*
+ * Copyright (C) 2011 Jana Rapava <fermata7@gmail.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * EHCI USB
+ */
+#ifdef	CONFIG_CMD_USB
+void setup_iomux_usb(void);
+#else
+static inline void setup_iomux_usb(void) { }
+#endif
diff --git a/board/efikamx/efikamx-usb.c b/board/efikamx/efikamx-usb.c
new file mode 100644
index 0000000..fc4ebfa
--- /dev/null
+++ b/board/efikamx/efikamx-usb.c
@@ -0,0 +1,420 @@
+/*
+ * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
+ * Copyright (C) 2011 Jana Rapava <fermata7@gmail.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <usb.h>
+#include <asm/io.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/mx5x_pins.h>
+#include <asm/arch/iomux.h>
+#include <asm/gpio.h>
+#include <usb/ehci-fsl.h>
+#include <errno.h>
+#include <watchdog.h>
+
+#include <usb/ehci.h>
+#include <usb/ehci-core.h>
+
+/*
+ * Configure the USB H1 and USB H2 IOMUX.
+ */
+#define USB_PAD_CONFIG	(PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST | \
+			PAD_CTL_DRV_HIGH | PAD_CTL_100K_PU | \
+			PAD_CTL_HYS_ENABLE | PAD_CTL_PUE_PULL)
+void setup_iomux_usb(void)
+{
+	/*
+	 * Configure USBH1 pads
+	 */
+	mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_STP, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_CLK, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_CLK, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DIR, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DIR, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_NXT, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_NXT, USB_PAD_CONFIG);
+
+	mxc_request_iomux(MX51_PIN_USBH1_DATA0, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA0, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA1, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA1, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA2, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA2, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA3, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA3, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA4, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA4, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA5, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA5, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA6, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA6, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA7, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA7, USB_PAD_CONFIG);
+
+	/*
+	 * Configure USBH1 control pads
+	 */
+
+	/* USB PHY reset */
+	mxc_request_iomux(MX51_PIN_EIM_D27, IOMUX_CONFIG_ALT1);
+	mxc_iomux_set_pad(MX51_PIN_EIM_D27, PAD_CTL_PKE_ENABLE |
+			PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH);
+
+	/* USB HUB reset */
+	mxc_request_iomux(MX51_PIN_GPIO1_5, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_GPIO1_5, PAD_CTL_PKE_ENABLE |
+			PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH);
+
+
+	if (machine_is_efikasb()) {
+		/*
+		 * Configure USBH2 pads (used on EfikaSB)
+		 */
+		/* USBH2_DATA */
+		mxc_request_iomux(MX51_PIN_EIM_D16, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D16, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D17, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D17, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D18, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D18, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D19, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D19, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D20, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D20, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D21, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D21, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D22, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D22, USB_PAD_CONFIG);
+		mxc_request_iomux(MX51_PIN_EIM_D23, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_D23, USB_PAD_CONFIG);
+
+		/* USBH2_CLK */
+		mxc_request_iomux(MX51_PIN_EIM_A24, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_A24, USB_PAD_CONFIG);
+		/* USBH2_DIR */
+		mxc_request_iomux(MX51_PIN_EIM_A25, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_A25, USB_PAD_CONFIG);
+		/* USBH2_STP */
+		mxc_request_iomux(MX51_PIN_EIM_A26, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_A26, USB_PAD_CONFIG);
+		/* USBH2_NXT */
+		mxc_request_iomux(MX51_PIN_EIM_A27, IOMUX_CONFIG_ALT2);
+		mxc_iomux_set_pad(MX51_PIN_EIM_A27, USB_PAD_CONFIG);
+	}
+
+	/* WIFI EN (act low) */
+	mxc_request_iomux(MX51_PIN_EIM_A22, IOMUX_CONFIG_GPIO);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A22, 0);
+	/* WIFI RESET */
+	mxc_request_iomux(MX51_PIN_EIM_A16, IOMUX_CONFIG_GPIO);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A16, 0);
+	/* BT EN (act low) */
+	mxc_request_iomux(MX51_PIN_EIM_A17, IOMUX_CONFIG_GPIO);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A17, 0);
+}
+
+/*
+ * Enable devices connected to USB BUSes.
+ */
+void efika_usb_enable_devices(void)
+{
+	/* Enable Bluetooth */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A17), 0);
+	udelay(10000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A17), 1);
+
+	/* Enable WiFi */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A22), 1);
+	udelay(10000);
+
+	/* Reset the WiFi chip */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A16), 0);
+	udelay(10000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A16), 1);
+}
+
+/*
+ * Reset USB HUB (or HUBs on EfikaSB).
+ */
+void efika_usb_hub_reset(void)
+{
+	/* HUB reset */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 1);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 0);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 1);
+}
+
+/*
+ * Reset USB PHY (or PHYs on EfikaSB).
+ */
+void efika_usb_phy_reset(void)
+{
+	/* SMSC 3317 PHY reset */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_D27), 0);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_D27), 1);
+}
+
+/*
+ * Configure control registers of the USB controller.
+ */
+void control_regs_setup(struct mx5_usb_control_regs *control)
+{
+	clrsetbits_le32(&control->usbctrl,
+		(MXC_OTG_WUE | MXC_OTG_PM | MX51_H1_ULPI_IE | MX51_H1_WUE),
+		MX51_H1_PM);
+
+	clrsetbits_le32(&control->phyctrl0,
+			MX51_OTG_OVERCURD,
+			MX51_EHCI_POWERPINSE);
+
+	clrsetbits_le32(&control->phyctrl1,
+			MX51_SYSCLOCK_MASK,
+			MX51_SYSCLOCK_24_MHZ);
+
+	setbits_le32(&control->usbctrl1, MX51_H1_EXTCLKE);
+
+	clrsetbits_le32(&control->uh2ctrl,
+			(MX51_H2_ULPI_IE | MX51_H2_WUE),
+			MX51_H2_PM);
+
+	udelay(10000);
+}
+
+#define ULPI_ADDR_SHIFT		16
+#define ulpi_write_mask(value)	((value) & 0xff)
+#define ulpi_read_mask(value)	(((value) >> 8) & 0xff)
+
+int ulpi_wait(struct usb_ehci *ehci, u32 ulpi_bit)
+{
+	int timeout = ULPI_TIMEOUT;
+	u32 tmp;
+
+	/* Wait for the ulpi_bit to become zero. */
+	while (--timeout) {
+		tmp = readl(&ehci->ulpi_viewpoint);
+		if (!(tmp & ulpi_bit))
+			break;
+		WATCHDOG_RESET();
+	}
+
+	if (!timeout)
+		return -1;
+	else
+		return tmp;
+}
+
+void ulpi_write(struct usb_ehci *ehci, u32 reg, u32 value)
+{
+	if (!(readl(&ehci->ulpi_viewpoint) & ULPI_SS)) {
+		writel(ULPI_WU, &ehci->ulpi_viewpoint);
+		if (ulpi_wait(ehci, ULPI_WU) == -1)
+			printf("ULPI wakeup timed out\n");
+	}
+
+	writel(ULPI_RWRUN | ULPI_RWCTRL |
+		reg << ULPI_ADDR_SHIFT | ulpi_write_mask(value),
+		&ehci->ulpi_viewpoint);
+	if (ulpi_wait(ehci, ULPI_RWRUN) == -1)
+		printf("ULPI write timed out\n");
+}
+
+u32 ulpi_read(struct usb_ehci *ehci, u32 reg)
+{
+	u32 tmp;
+	if (!(readl(&ehci->ulpi_viewpoint) & ULPI_SS)) {
+		writel(ULPI_WU, &ehci->ulpi_viewpoint);
+		if (ulpi_wait(ehci, ULPI_WU) == -1)
+			printf("ULPI wakeup timed out\n");
+	}
+
+	writel(ULPI_RWRUN | reg << ULPI_ADDR_SHIFT, &ehci->ulpi_viewpoint);
+	tmp = ulpi_wait(ehci, ULPI_RWRUN);
+	if (tmp == -1) {
+		printf("ULPI read timed out\n");
+		return 0;
+	}
+	return ulpi_read_mask(tmp);
+}
+
+void ulpi_init(struct usb_ehci *ehci, struct mxc_ulpi_regs *ulpi)
+{
+	u32 tmp = 0;
+	int reg, i;
+
+	/* get ID from ULPI immediate registers */
+	for (reg = ULPI_ID_REGS_COUNT - 1; reg >= 0; reg--)
+		tmp |= ulpi_read(ehci, reg) << (reg * 8);
+	/* split into vendor and product ID */
+	debug("Found ULPI TX, ID %04x:%04x\n", tmp >> 16, tmp & 0xffff);
+
+	/* ULPI check integrity */
+	for (i = 0; i < 2; i++) {
+		ulpi_write(ehci, (u32)&ulpi->scratch_write,
+			ULPI_TEST_VALUE << i);
+		tmp = ulpi_read(ehci, (u32)&ulpi->scratch_write);
+
+		if (tmp != (ULPI_TEST_VALUE << i)) {
+			printf("ULPI integrity check failed\n");
+			return;
+		}
+	}
+
+	/* ULPI set flags */
+	ulpi_write(ehci, (u32)&ulpi->otg_ctrl_write,
+		ULPI_OTG_EXT_VBUS_IND |
+		ULPI_OTG_DM_PULLDOWN | ULPI_OTG_DP_PULLDOWN);
+	ulpi_write(ehci, (u32)&ulpi->function_ctrl_write,
+		ULPI_FC_XCVR_SELECT | ULPI_FC_OPMODE_NORMAL |
+		ULPI_FC_SUSPENDM_PWRED);
+	ulpi_write(ehci, (u32)&ulpi->iface_ctrl_write, 0);
+	ulpi_write(ehci, (u32)&ulpi->otg_ctrl_set,
+		ULPI_OTG_DRV_VBUS | ULPI_OTG_DRV_VBUS_EXT);
+
+	/*
+	 * NOTE: This violates USB specification, but otherwise, USB on Efika
+	 * doesn't charge VBUS and as a result, USB doesn't work.
+	 */
+	ulpi_write(ehci, (u32)&ulpi->otg_ctrl_set, ULPI_OTG_CHRG_VBUS);
+}
+
+/*
+ * Solve the VBUS reset problem on Efika
+ * by setting the CHRG_VBUS bit in the reset.
+ */
+void ehci_fixup(uint32_t *status_reg, uint32_t *reg_ref)
+{
+	struct usb_ehci *ehci = (struct usb_ehci *)(OTG_BASE_ADDR +
+		MX51_REGISTER_LAYOUT_LENGTH);
+	struct mxc_ulpi_regs *ulpi = (struct mxc_ulpi_regs *)0;
+
+	u32 tmp = ulpi_read(ehci, (u32)&ulpi->otg_ctrl_write);
+	tmp |= ULPI_OTG_CHRG_VBUS;
+	ulpi_write(ehci, (u32)&ulpi->otg_ctrl_write, tmp);
+
+	/* USB 2.0 specification say 50 ms resets on root. */
+	wait_ms(50);
+
+	/* Now terminate the reset. */
+	*reg_ref = ehci_readl(status_reg);
+	*reg_ref |= EHCI_PS_PE;
+}
+
+void ehci0_init(struct usb_ehci *ehci)
+{
+	writel(MX51_16BIT_UTMI, &ehci->portsc);
+}
+
+void ehci1_init(struct usb_ehci *ehci, struct mxc_ulpi_regs *ulpi)
+{
+	mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT2);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_STP, PAD_CTL_DRV_HIGH |
+				PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST);
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_USBH1_STP), 0);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_USBH1_STP), 1);
+	udelay(1000);
+
+	mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_STP, USB_PAD_CONFIG);
+	udelay(10000);
+
+	clrbits_le32(&ehci->usbcmd, MX51_ITC_IMMEDIATE_MASK);
+	udelay(10000);
+
+	writel(MX51_ULPI_MODE_MASK, &ehci->portsc);
+	udelay(10000);
+
+	ulpi_init(ehci, ulpi);
+}
+
+void ehci2_init(struct usb_ehci *ehci, struct mxc_ulpi_regs *ulpi)
+{
+	mxc_request_iomux(MX51_PIN_EIM_A26, IOMUX_CONFIG_ALT1);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A26, PAD_CTL_DRV_HIGH |
+				PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST);
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A26), 0);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A26), 1);
+	udelay(1000);
+
+	mxc_request_iomux(MX51_PIN_EIM_A26, IOMUX_CONFIG_ALT2);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A26, USB_PAD_CONFIG);
+
+	writel(MX51_ULPI_MODE_MASK, &ehci->portsc);
+	udelay(10000);
+
+	ulpi_init(ehci, ulpi);
+}
+
+int ehci_hcd_init(void)
+{
+	struct usb_ehci *ehci;
+	struct mx5_usb_control_regs *mx5_usb_control_regs;
+	struct mxc_ulpi_regs *ulpi;
+
+	mx5_usb_control_regs = (struct mx5_usb_control_regs *)(OTG_BASE_ADDR +
+		 MX5_CTRL_REGS_OFFSET);
+	control_regs_setup(mx5_usb_control_regs);
+	ulpi = (struct mxc_ulpi_regs *)0;
+
+	/* Init EHCI core */
+	ehci = (struct usb_ehci *)(OTG_BASE_ADDR +
+		(MX51_REGISTER_LAYOUT_LENGTH * CONFIG_MXC_USB_PORT));
+	hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
+	hcor = (struct ehci_hcor *)((uint32_t) hccr +
+			HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
+	setbits_le32(&ehci->usbmode, CM_HOST);
+	setbits_le32(&ehci->control, USB_EN);
+	
+	/* Init iMX51 EHCI */
+	efika_usb_phy_reset();
+	efika_usb_hub_reset();
+	efika_usb_enable_devices();
+
+	switch (CONFIG_MXC_USB_PORT) {
+	case 0:
+		ehci0_init(ehci);
+		break;
+	case 1:
+		ehci1_init(ehci, ulpi);
+		break;
+	case 2:
+		if (machine_is_efikasb())
+			ehci2_init(ehci, ulpi);
+		break;
+	};
+
+	/* EfikaMX USB has issues ... */
+	udelay(10000);
+
+	return 0;
+}
+
+int ehci_hcd_stop(void)
+{
+	return 0;
+}
diff --git a/board/efikamx/efikamx.c b/board/efikamx/efikamx.c
index 0c4e24b..8e9b42b 100644
--- a/board/efikamx/efikamx.c
+++ b/board/efikamx/efikamx.c
@@ -37,6 +37,8 @@
 #include <fsl_pmic.h>
 #include <mc13892.h>
 
+#include "efika.h"
+
 DECLARE_GLOBAL_DATA_PTR;
 
 /*
@@ -678,6 +680,7 @@ int board_late_init(void)
 
 	setup_iomux_led();
 	setup_iomux_ata();
+	setup_iomux_usb();
 
 	efikamx_toggle_led(EFIKAMX_LED_BLUE);
 
diff --git a/include/configs/efikamx.h b/include/configs/efikamx.h
index 54f48e4..010a16a 100644
--- a/include/configs/efikamx.h
+++ b/include/configs/efikamx.h
@@ -44,6 +44,10 @@
 
 #define CONFIG_SYS_TEXT_BASE		0x97800000
 
+#define	CONFIG_L2_OFF
+#define	CONFIG_SYS_ICACHE_OFF
+#define	CONFIG_SYS_DCACHE_OFF
+
 /*
  * Bootloader Components Configuration
  */
@@ -172,6 +176,18 @@
 #endif
 
 /*
+ * USB
+ */
+#define CONFIG_CMD_USB
+#ifdef CONFIG_CMD_USB
+#define CONFIG_USB_EHCI			/* Enable EHCI USB support */
+#define CONFIG_MXC_USB_PORT	1
+#define CONFIG_EHCI_IS_TDI
+#define CONFIG_USB_STORAGE
+#define CONFIG_USB_KEYBOARD
+#endif /* CONFIG_CMD_USB */
+
+/*
  * Filesystems
  */
 #ifdef CONFIG_CMD_FAT
-- 
1.7.6.3

[U-Boot] [PATCH v8 4/4] Add USB support for Efika

[Marek Vasut]

> This commit adds USB support for EfikaMX and EfikaSB.
> 
> Signed-off-by: Jana Rapava <fermata7@gmail.com>
> Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
> Cc: Remy Bohmer <linux@bohmer.net>
> Cc: Stefano Babic <sbabic@denx.de>
> ---
> Changes for v2:
>? ?  - changed to proper patch
> Changes for v3:
>? ?  - merged other USB patches from u-boot-pxa/efikasb
>? ?  - offset-based access changed to struct-based access
>? ?  - use {clrset,clr,set}bits_le32() calls
>? ?  - CodingStyle and naming cleanup
> Changes for v4:
>? ? ?  - split into patchset
>? ? ?  - CodingStyle and naming cleanup
>? ? ?  - remove endless loops
>? ? ?  - silence compiler warnings
> Changes for v5:
>? ? ? ? ?  - change order of arguments in ulpi* functions
>? ? ? ? ?  - change type of reg argument
>? ? ? ? ?  - rename offset macro
> Changes for v6:
>? ? ? ? ? ?  - rebase on top of u-boot-imx/next
>? ? ? ? ? ?  - cleanup of CodingStyle and comments
>? ? ? ? ? ?  - use macro machine_is_efikasb()
>? ? ? ? ? ?  - introduce header file efika.h
> Changes for v7:
>? ? ? ? ? ? ?  - add proper header to efika.h
>? ? ? ? ? ? ?  - include efika.h into efikamx.c
>? ? ? ? ? ? ?  - check return values from ulpi_wait()
> Changes for v8:
> ??? - change the return value of ulpi_wait()
> ??? - CodingStyle cleanup
> ??? - add proper header to efikamx-usb.c

Dear Jana Rapava,

[...]

> +int ulpi_wait(struct usb_ehci *ehci, u32 ulpi_bit)
> +{
> +??? int timeout = ULPI_TIMEOUT;
> +??? u32 tmp;
> +
> +??? /* Wait for the ulpi_bit to become zero. */
> +??? while (--timeout) {
> +??? ??? tmp = readl(&ehci->ulpi_viewpoint);
> +??? ??? if (!(tmp & ulpi_bit))
> +??? ??? ??? break;
> +??? ??? WATCHDOG_RESET();
> +??? }
> +
> +??? if (!timeout)
> +??? ??? return -1;
> +??? else
> +??? ??? return tmp;
> +}

Won't 'return !timeout;' be enough?

Also, can you change 'ulpi_bit' to 'ulpi_mask'? That seems more appropriate.

Maybe this can be even changed to ulpi_wait(ehci, value_to_be_written, bit_to_be_polled), then you won't need those writel()s before every write to ulpi anymore.

> +
> +void ulpi_write(struct usb_ehci *ehci, u32 reg, u32 value)
> +{
> +??? if (!(readl(&ehci->ulpi_viewpoint) & ULPI_SS)) {
> +??? ??? writel(ULPI_WU, &ehci->ulpi_viewpoint);
> +??? ??? if (ulpi_wait(ehci, ULPI_WU) == -1)
> +??? ??? ??? printf("ULPI wakeup timed out\n");
> +??? }
> +
> +??? writel(ULPI_RWRUN | ULPI_RWCTRL |
> +??? ??? reg << ULPI_ADDR_SHIFT | ulpi_write_mask(value),
> +??? ??? &ehci->ulpi_viewpoint);
> +??? if (ulpi_wait(ehci, ULPI_RWRUN) == -1)
> +??? ??? printf("ULPI write timed out\n");
> +}


aha here - if(ulpi_wait(ehci, ULPI_RWRUN | ULPI_RWCTRL ..., uLPI_RWRUN))...

> +
> +u32 ulpi_read(struct usb_ehci *ehci, u32 reg)
> +{
> +??? u32 tmp;
> +??? if (!(readl(&ehci->ulpi_viewpoint) & ULPI_SS)) {
> +??? ??? writel(ULPI_WU, &ehci->ulpi_viewpoint);
> +??? ??? if (ulpi_wait(ehci, ULPI_WU) == -1)
> +??? ??? ??? printf("ULPI wakeup timed out\n");
> +??? }
> +
> +??? writel(ULPI_RWRUN | reg << ULPI_ADDR_SHIFT, &ehci->ulpi_viewpoint);
> +??? tmp = ulpi_wait(ehci, ULPI_RWRUN);
> +??? if (tmp == -1) {
> +??? ??? printf("ULPI read timed out\n");
> +??? ??? return 0;
> +??? }
> +??? return ulpi_read_mask(tmp);
> +}
> +
> +void ulpi_init(struct usb_ehci *ehci, struct mxc_ulpi_regs *ulpi)
> +{
> +??? u32 tmp = 0;
> +??? int reg, i;
> +
> +??? /* get ID from ULPI immediate registers */
> +??? for (reg = ULPI_ID_REGS_COUNT - 1; reg >= 0; reg--)
> +??? ??? tmp |= ulpi_read(ehci, reg) << (reg * 8);

Still (three revs already) no newline here!!

> +??? /* split into vendor and product ID */
> +??? debug("Found ULPI TX, ID %04x:%04x\n", tmp >> 16, tmp & 0xffff);

cheers

[U-Boot] [PATCH v8 4/4] Add USB support for Efika

[Jana Rapava]

2011/9/28 Marek Vasut <marek.vasut.n900@gmail.com>

> > +    if (!timeout)
> > +        return -1;
> > +    else
> > +        return tmp;
> > +}
>
> Won't 'return !timeout;' be enough?
>
> > +    tmp = ulpi_wait(ehci, ULPI_RWRUN);
> +    if (tmp == -1) {
> +        printf("ULPI read timed out\n");
> +        return 0;
> +    }
> +    return ulpi_read_mask(tmp);
> +}

Here in ulpi_read() I need to store and return value which was read in
ulpi_wait(). What is the proper way to do this, If ulpi_wait() should return
!timeout ?


> Also, can you change 'ulpi_bit' to 'ulpi_mask'? That seems more
> appropriate.
>
> Maybe this can be even changed to ulpi_wait(ehci, value_to_be_written,
> bit_to_be_polled), then you won't need those writel()s before every write to
> ulpi anymore.
>

Ok.


> cheers
>

[U-Boot] [PATCH v8 4/4] Add USB support for Efika

[Marek Vasut]

On Wednesday, September 28, 2011 08:12:08 PM Jana Rapava wrote:
> 2011/9/28 Marek Vasut <marek.vasut.n900@gmail.com>
> 
> > > +    if (!timeout)
> > > +        return -1;
> > > +    else
> > > +        return tmp;
> > > +}
> > 
> > Won't 'return !timeout;' be enough?
> > 
> > > +    tmp = ulpi_wait(ehci, ULPI_RWRUN);
> > 
> > +    if (tmp == -1) {
> > +        printf("ULPI read timed out\n");
> > +        return 0;
> > +    }
> > +    return ulpi_read_mask(tmp);
> > +}
> 
> Here in ulpi_read() I need to store and return value which was read in
> ulpi_wait(). What is the proper way to do this, If ulpi_wait() should
> return !timeout ?

You can read again ... it's more systematic. Anyway ... use the approach below, 
it seems better.

> 
> > Also, can you change 'ulpi_bit' to 'ulpi_mask'? That seems more
> > appropriate.
> > 
> > Maybe this can be even changed to ulpi_wait(ehci, value_to_be_written,
> > bit_to_be_polled), then you won't need those writel()s before every write
> > to ulpi anymore.
> 
> Ok.
> 
> > cheers

[U-Boot] [PATCH v8 4/4] Add USB support for Efika

[Wolfgang Denk]

Dear Jana Rapava,

In message <1317222457-18412-1-git-send-email-fermata7@gmail.com> you wrote:
> This commit adds USB support for EfikaMX and EfikaSB.
> 
> Signed-off-by: Jana Rapava <fermata7@gmail.com>
> Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
> Cc: Remy Bohmer <linux@bohmer.net>
> Cc: Stefano Babic <sbabic@denx.de>
> ---
> Changes for v2:
>   - changed to proper patch
> Changes for v3:
>   - merged other USB patches from u-boot-pxa/efikasb
>   - offset-based access changed to struct-based access
>   - use {clrset,clr,set}bits_le32() calls
>   - CodingStyle and naming cleanup
> Changes for v4:
>    - split into patchset
>    - CodingStyle and naming cleanup
>    - remove endless loops
>    - silence compiler warnings
> Changes for v5:
>      - change order of arguments in ulpi* functions
>      - change type of reg argument
>      - rename offset macro
> Changes for v6:
>       - rebase on top of u-boot-imx/next
>       - cleanup of CodingStyle and comments
>       - use macro machine_is_efikasb()
>       - introduce header file efika.h
> Changes for v7:
>        - add proper header to efika.h
>        - include efika.h into efikamx.c
>        - check return values from ulpi_wait()
> Changes for v8:
> 	- change the return value of ulpi_wait()
> 	- CodingStyle cleanup
> 	- add proper header to efikamx-usb.c
> 
>  board/efikamx/Makefile      |    3 +
>  board/efikamx/efika.h       |   30 +++
>  board/efikamx/efikamx-usb.c |  420 +++++++++++++++++++++++++++++++++++++++++++
>  board/efikamx/efikamx.c     |    3 +
>  include/configs/efikamx.h   |   16 ++
>  5 files changed, 472 insertions(+), 0 deletions(-)
>  create mode 100644 board/efikamx/efika.h
>  create mode 100644 board/efikamx/efikamx-usb.c

Checkpatch says:

total: 1 errors, 0 warnings, 502 lines checked

Please clean up and resubmit.  Thanks.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Every little picofarad has a nanohenry all its own.      - Don Vonada

[U-Boot] [PATCH v8 4/4] Add USB support for Efika

[Jana Rapava]

2011/10/6 Wolfgang Denk <wd@denx.de>

>
> Checkpatch says:
>
> total: 1 errors, 0 warnings, 502 lines checked
>
> Please clean up and resubmit.  Thanks.
>
>
Last version of this patch is here:
http://lists.denx.de/pipermail/u-boot/2011-September/102803.html
(sorry for breaking the thread but I messed up some In-Reply-To: headers).
On the last version checkpatch says only two warnings, both are about
including files not from <linux/*> and doesn't make sense in this case.
Regards,
Jana Rapava